JPH0223119U - - Google Patents
Info
- Publication number
- JPH0223119U JPH0223119U JP9742188U JP9742188U JPH0223119U JP H0223119 U JPH0223119 U JP H0223119U JP 9742188 U JP9742188 U JP 9742188U JP 9742188 U JP9742188 U JP 9742188U JP H0223119 U JPH0223119 U JP H0223119U
- Authority
- JP
- Japan
- Prior art keywords
- load
- comparator circuit
- circuit
- transistor
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例のコンパレータの回
路図、第２図は従来のコンパレータの入力部の回
路図である。
FIG. 1 is a circuit diagram of a comparator according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of an input section of a conventional comparator.
Claims (1)
スタ２個を差動接続して比較部を構成したコンパ
レータ回路において、 上記負荷としてのトランジスタを常時動作状態
におくことを特徴とするコンパレータ回路。[Claims for Utility Model Registration] A comparator circuit in which a comparator circuit is configured by differentially connecting two transistors each having a transistor connected as a load, characterized in that the transistor serving as the load is kept in an operating state at all times. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9742188U JPH0223119U (en) | 1988-07-25 | 1988-07-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9742188U JPH0223119U (en) | 1988-07-25 | 1988-07-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0223119U true JPH0223119U (en) | 1990-02-15 |
Family
ID=31322878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9742188U Pending JPH0223119U (en) | 1988-07-25 | 1988-07-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0223119U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011199888A (en) * | 2004-04-02 | 2011-10-06 | Fujitsu Semiconductor Ltd | Differential amplifier |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61202518A (en) * | 1985-03-06 | 1986-09-08 | Fujitsu Ltd | Comparator circuit |
| JPS61224724A (en) * | 1985-03-29 | 1986-10-06 | Fujitsu Ltd | Gate circuit |
-
1988
- 1988-07-25 JP JP9742188U patent/JPH0223119U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61202518A (en) * | 1985-03-06 | 1986-09-08 | Fujitsu Ltd | Comparator circuit |
| JPS61224724A (en) * | 1985-03-29 | 1986-10-06 | Fujitsu Ltd | Gate circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011199888A (en) * | 2004-04-02 | 2011-10-06 | Fujitsu Semiconductor Ltd | Differential amplifier |