JPH02237067A - Solid-state image sensing device - Google Patents
Solid-state image sensing deviceInfo
- Publication number
- JPH02237067A JPH02237067A JP1057035A JP5703589A JPH02237067A JP H02237067 A JPH02237067 A JP H02237067A JP 1057035 A JP1057035 A JP 1057035A JP 5703589 A JP5703589 A JP 5703589A JP H02237067 A JPH02237067 A JP H02237067A
- Authority
- JP
- Japan
- Prior art keywords
- optical signal
- diffusion layer
- conductivity type
- time
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 31
- 230000003287 optical effect Effects 0.000 claims abstract description 26
- 238000006243 chemical reaction Methods 0.000 claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 238000003384 imaging method Methods 0.000 claims description 13
- 238000009792 diffusion process Methods 0.000 abstract description 27
- 238000000034 method Methods 0.000 abstract description 5
- 230000002093 peripheral effect Effects 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 238000010408 sweeping Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、電子シャッタ機能を有する固体撮像装直に関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a solid-state imaging device having an electronic shutter function.
従来の技術
従来より、例えばビデオカメラを使用して撮像する場合
、露出時間の制御を電気的に行なう手段として、1フィ
ールド期間の間の光信号電荷を、垂直レジスタに読み出
した時間から垂直プランキング時間までの期間を利用し
て、前記期間中に光電変換部に蓄積された光信号電荷を
前記垂直レジスタの読み出し、高速に転送して掃き出す
方法や、半導体基板に所定の電圧を供給して、前記期間
中に光電変換部に蓄積された光信号電荷を前記半導体基
板に掃き出す方法を用いた固体撮像装置については既に
提案されている。2. Description of the Related Art Conventionally, when taking an image using a video camera, for example, vertical planking is used as a means to electrically control the exposure time, from the time when the optical signal charge during one field period is read out to the vertical register. A method of reading out the optical signal charge accumulated in the photoelectric conversion unit during the period up to the time period from the vertical register and transferring it at high speed to sweep it out, and a method of supplying a predetermined voltage to the semiconductor substrate, A solid-state imaging device using a method of sweeping out optical signal charges accumulated in the photoelectric conversion section during the period to the semiconductor substrate has already been proposed.
第4図は従来の固体撮像装噛の光電変換部の断面図を示
すものである。第4図において、1はN型シリコン基板
、2はN型シリコン基板上に形成されたP型拡散層、3
はP型拡散層2の上に形成されたN型拡散層、4はN型
拡散層3の上に形成されたP型拡散層、5はスイッチ回
路で、一方は10Vの直流電圧源6に、もう一方は20
Vの直流電圧源7に接続され、固定端子はシリコン基板
1に接続され、8はスイッチ回路5を制御する信号入力
端子である。FIG. 4 shows a cross-sectional view of a photoelectric conversion section of a conventional solid-state imaging device. In FIG. 4, 1 is an N-type silicon substrate, 2 is a P-type diffusion layer formed on the N-type silicon substrate, and 3 is a P-type diffusion layer formed on the N-type silicon substrate.
is an N-type diffusion layer formed on the P-type diffusion layer 2, 4 is a P-type diffusion layer formed on the N-type diffusion layer 3, 5 is a switch circuit, and one is connected to a 10V DC voltage source 6. , the other is 20
The fixed terminal is connected to a DC voltage source 7 of V, the fixed terminal is connected to the silicon substrate 1, and 8 is a signal input terminal for controlling the switch circuit 5.
以上のように構成された固体撮像装置の充電変換部につ
いて、以下その動作について説明する。The operation of the charging conversion section of the solid-state imaging device configured as described above will be described below.
まず、信号入力端子8からスイッチ回路5を10Vの直
流電圧源6に接続するような信号が入力されている場合
、光電変換部の深さ方向のポテンシャルは第2図Xに示
すように、N型拡散層3のポテンシャルは、P型拡散層
2および4のポテンシャルよりも低いので、このN型拡
散層3に光電変換された光信号電荷を蓄積する。次に、
信号入力端子8からスイッチ回路5を20Vの直流電圧
源7に接続するような信号が入力されている場合、光電
変換部のポテンシャルは、第2図のZに示されているよ
うに,P型拡散層2のポテンシャルがN型拡散層3のポ
テンシャルよりも低くなるような電圧をシリコン基板に
印加する。従って、N型拡散層3に蓄積された光信号電
荷は、よりポテンシャルの低いシリコン基板1に掃き出
される。First, when a signal is input from the signal input terminal 8 to connect the switch circuit 5 to the 10V DC voltage source 6, the potential in the depth direction of the photoelectric conversion section is N, as shown in FIG. Since the potential of the type diffusion layer 3 is lower than the potential of the P type diffusion layers 2 and 4, the photoelectrically converted optical signal charges are accumulated in the N type diffusion layer 3. next,
When a signal is input from the signal input terminal 8 to connect the switch circuit 5 to the 20V DC voltage source 7, the potential of the photoelectric conversion section is P-type, as shown by Z in FIG. A voltage is applied to the silicon substrate such that the potential of the diffusion layer 2 is lower than the potential of the N-type diffusion layer 3. Therefore, the optical signal charges accumulated in the N-type diffusion layer 3 are swept out to the silicon substrate 1, which has a lower potential.
発明が解決しようとする課題
しかしながら前記の従来の構成では、光信号電荷の転送
に使用する垂直レジスタを使用して露出時間以外に光電
変換部に蓄積された光信号電荷を掃き出すので、光信号
電荷を読み出してから垂直プランキング時間までの間に
高速に転送を行なう必要がある。このため、露出時間は
何種類かの固定時間でしか変えられず、その上、余分な
電力を消費するという欠点を有していた。Problems to be Solved by the Invention However, in the conventional configuration described above, the vertical register used to transfer the optical signal charge is used to sweep out the optical signal charge accumulated in the photoelectric conversion section at times other than the exposure time. It is necessary to perform high-speed transfer between the time when the data is read and the vertical blanking time. For this reason, the exposure time can only be changed by several types of fixed times, and furthermore, it has the drawback of consuming excess power.
また、第4図例に示したように、垂直レジスタを使用せ
ずに半導体基板に掃き出す方法では、所望の露出時間に
可変制御できるが、前記半導体基板に大きな電圧を供給
し得る電圧源が必要であるという欠点を有していた。In addition, as shown in the example in Fig. 4, the method of sweeping onto the semiconductor substrate without using a vertical register allows variable control of the desired exposure time, but requires a voltage source that can supply a large voltage to the semiconductor substrate. It had the disadvantage of being
本発明は上記従来の問題点を解決するもので、光電変換
部の表面に所定の電圧を供給することによって、光電変
換部に蓄積された光信号電荷を低電圧で半導体基板に掃
き出し、所望の露出時間に可変制御することのできる固
体撮像装置を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and by supplying a predetermined voltage to the surface of the photoelectric conversion section, the optical signal charge accumulated in the photoelectric conversion section is swept out to the semiconductor substrate at a low voltage, and a desired signal is generated. An object of the present invention is to provide a solid-state imaging device that can variably control exposure time.
課題を解決するための手段
この課題を解決するために本発明の固体撮像装置は、第
1の導電型半導体基板と、この第1の導電型半導体基板
上に形成された第1の導電型とは反対の第2の導電型領
域と、この第2の導電型領域上に形成された第2の導電
型とは反対の第3の導電型領域と、この第3の導電型領
域上に前記第2の導電型領域と分離して形成された前記
第3の導電型領域とは反対の第4の導電型領域を有する
固体撮像装置の光電変換部において、第4の導電型領域
に所定電圧を供給し、充電変換部に蓄積された光信号電
荷を第1の半導体基板に低電圧で掃き出すことのできる
構成を有している。Means for Solving the Problems In order to solve the problems, the solid-state imaging device of the present invention includes a first conductivity type semiconductor substrate, a first conductivity type semiconductor substrate formed on the first conductivity type semiconductor substrate, and a first conductivity type semiconductor substrate formed on the first conductivity type semiconductor substrate. is a second conductivity type region opposite to the second conductivity type region, a third conductivity type region opposite to the second conductivity type formed on the second conductivity type region, and a third conductivity type region formed on the third conductivity type region. In a photoelectric conversion section of a solid-state imaging device having a fourth conductivity type region opposite to the third conductivity type region formed separately from the second conductivity type region, a predetermined voltage is applied to the fourth conductivity type region. The optical signal charge accumulated in the charge conversion section can be swept out to the first semiconductor substrate at a low voltage.
作用
この構成によって、第4の導電型領域に所定電圧を供給
し、光電変換部に蓄積された光信号電荷を第1の半導体
基板に掃き出せる様になされているので、先の光信号読
み出し時から次の光信号読み出し時までの任意の時間に
光信号電荷を掃き出すことができ、この電荷を掃き出し
た時間から次に光信号電荷を読み出す時間までが露出時
間とすることができる。すなわち、任意の所望の露出時
間に制御ができる。Function: With this configuration, a predetermined voltage is supplied to the fourth conductivity type region, and the optical signal charge accumulated in the photoelectric conversion section can be swept out to the first semiconductor substrate, so that it is possible to sweep out the optical signal charge accumulated in the photoelectric conversion section to the first semiconductor substrate. The optical signal charge can be swept out at an arbitrary time from the time of reading out the next optical signal, and the time from the time when this charge is swept out to the time when the next optical signal charge is read can be set as the exposure time. That is, it is possible to control the exposure time to any desired value.
また、光電変換部に蓄積された光信号電荷を掃き出すと
きに第4の導電型領域に供給する電圧は、第2の導電型
領域のポテンシャルよりも第3の導電型領域のポテンシ
ャルが高くなるような電圧で良いので、低電圧で掃き出
しができる。Further, the voltage supplied to the fourth conductivity type region when sweeping out the optical signal charges accumulated in the photoelectric conversion section is set such that the potential of the third conductivity type region is higher than the potential of the second conductivity type region. Sweeping can be done with a low voltage.
実施例
以下本発明の一実施例について、図面を参照しながら説
明する。EXAMPLE An example of the present invention will be described below with reference to the drawings.
第1図は本発明の一実施例における固体撮像装置の光電
変換部の断面図を示すものである。第1図において、9
はN型シリコンからなる半導体基板、10は半導体基板
9の表面に形成されたP型の拡散層、11はP型拡散層
10の表面に形成された光電変換部を構成するN型の拡
散層、12はN型拡散層11の表面にP型拡散層10と
は分離して形成されたP型の拡散層、13は半導体基板
に所定の電圧を供給する直流電圧源、14はスイッチ回
路であり、固定接点の一方は直流電圧源15に接続され
、もう一方は接地されている。16はスイッチ14を制
御する信号入力端子である。FIG. 1 shows a cross-sectional view of a photoelectric conversion section of a solid-state imaging device according to an embodiment of the present invention. In Figure 1, 9
10 is a P-type diffusion layer formed on the surface of the semiconductor substrate 9; 11 is an N-type diffusion layer forming the photoelectric conversion section formed on the surface of the P-type diffusion layer 10; , 12 is a P-type diffusion layer formed on the surface of the N-type diffusion layer 11 separately from the P-type diffusion layer 10, 13 is a DC voltage source that supplies a predetermined voltage to the semiconductor substrate, and 14 is a switch circuit. One of the fixed contacts is connected to the DC voltage source 15, and the other is grounded. 16 is a signal input terminal for controlling the switch 14.
以上のように構成された光電変換部を有する固体撮像装
置について、以下その動作を説明する。The operation of the solid-state imaging device having the photoelectric conversion section configured as described above will be described below.
まず、信号入力端子16からスイッチ14を接地側に接
続されるような信号が入力されている場合、第1図例に
示した光電変換部の深さ方向のポテンシャルは、第2図
のXで示すように、N型導電領域11はP型導電領域1
0および12よりもポテンシャルが低いので、このN型
導電領域11に光信号電荷を蓄積できる。さらに、P型
導電領域10はP型導電領域12よりもポテンシャルが
低いので、N型導電領域11に蓄積される光信号電荷が
増え続けてN型導電領域11のポテンシャルが高《なっ
たとしても、P型導電領域10のポテンシャルを越える
に相当する光信号電荷は半導体基板9に自動的に掃き出
され、いわゆるブルーミングの抑制ができる。First, when a signal that connects the switch 14 to the ground side is input from the signal input terminal 16, the potential in the depth direction of the photoelectric conversion section shown in the example in Fig. 1 is expressed as X in Fig. 2. As shown, the N-type conductive region 11 is connected to the P-type conductive region 1.
Since the potential is lower than that of 0 and 12, optical signal charges can be accumulated in this N-type conductive region 11. Furthermore, since the potential of the P-type conductive region 10 is lower than that of the P-type conductive region 12, even if the optical signal charge accumulated in the N-type conductive region 11 continues to increase and the potential of the N-type conductive region 11 becomes high. , optical signal charges corresponding to exceeding the potential of the P-type conductive region 10 are automatically swept out to the semiconductor substrate 9, so that so-called blooming can be suppressed.
また、信号入力端子l6からスイッチ14を直流電圧源
15に接続ずるような信号が入力されている場合、第1
図例に示した光電変換部の深さ方向のポテンシャルは、
第2図のYで示すように、P型導電領域12のポテンシ
ャルが引き上げられることによってN型導電領域11の
ポテンシャルはP型導電領域10のポテンシャルよりも
高くなり、N型導電領域11に蓄積されていた光信号電
荷は、さらにポテンシャルの低いN型シリコン基板9に
掃き出すことができる。In addition, if a signal that connects the switch 14 to the DC voltage source 15 is input from the signal input terminal l6, the first
The potential in the depth direction of the photoelectric conversion section shown in the example is
As shown by Y in FIG. 2, by raising the potential of the P-type conductive region 12, the potential of the N-type conductive region 11 becomes higher than the potential of the P-type conductive region 10, and the potential is accumulated in the N-type conductive region 11. The optical signal charges that have been stored can be swept out to the N-type silicon substrate 9, which has a lower potential.
さらに、垂直レジスタを使用せずに光信号電荷を掃き出
せるので、第3図のBに示す掃き出しパルスは任意の時
間に設定することができる。従って、露出時間は第3図
に示すように掃き出しパルスが供給されてから次の読み
出し/{ルスが供給されるまでの時間であり、任意の所
望の時間に制御できる。Furthermore, since the optical signal charge can be swept out without using a vertical register, the sweep pulse shown in B in FIG. 3 can be set at any desired time. Therefore, as shown in FIG. 3, the exposure time is the time from when the sweep pulse is supplied until the next readout pulse is supplied, and can be controlled to any desired time.
また、第2図のYのポテンシャルになるようなN型導電
領域11よりもP型導電領域10のポテンシャルを低く
するような電圧、例えばIOVの直流電圧源を直流電圧
源15に使用するが、半導体基板9に電圧を供給して前
記目的を達成するような従来例では、露出時間中に半導
体基板9に例えばIOVを供給しているので、前記目的
を達成するためには、例えば20Vの直流電圧源が必要
になる。従って本実施例では、消費電力を低減すること
ができる。Further, a DC voltage source 15 with a voltage such as IOV that makes the potential of the P-type conductive region 10 lower than that of the N-type conductive region 11, which has the potential of Y in FIG. 2, is used as the DC voltage source 15. In the conventional example in which the above objective is achieved by supplying voltage to the semiconductor substrate 9, for example, IOV is supplied to the semiconductor substrate 9 during the exposure time, so in order to achieve the above objective, for example, 20 V DC is required. A voltage source is required. Therefore, in this embodiment, power consumption can be reduced.
以上のように本実施例によれば、P型導電領域12に所
定の電圧を供給し得るスイッチ回路14を設けることに
より、任意の所望の露出時間の制御をすることができ、
また、低消費電力で動作することができる。As described above, according to this embodiment, by providing the switch circuit 14 capable of supplying a predetermined voltage to the P-type conductive region 12, any desired exposure time can be controlled.
Additionally, it can operate with low power consumption.
なお、第1図の実施例の周辺の垂直レジスタ部,水平レ
ジスタ部,出力部については図示せずも、従来周知のよ
うに構成する。The peripheral vertical register section, horizontal register section, and output section of the embodiment shown in FIG. 1 are not shown, but are constructed in a conventionally known manner.
発明の効果
以上のように本発明は、周辺から分離された第4の導電
型領域に所定の電圧を供給し得るスイッチ回路を接続す
ることにより、任意の露出時間に可変制御することがで
き、また、低電圧で光信号電荷を掃き出すので、消費電
力を低減することができる優れた固体撮像装置を実現で
きるものである。Effects of the Invention As described above, in the present invention, by connecting a switch circuit capable of supplying a predetermined voltage to a fourth conductivity type region separated from the surroundings, it is possible to variably control the exposure time at any desired time. Furthermore, since optical signal charges are swept out with a low voltage, an excellent solid-state imaging device that can reduce power consumption can be realized.
第1図は本発明の一実施例における固体撮像装置の光電
変換部の断面図、第2図は本発明の一実施例および従来
例における深さ方向のポテンシャル図、第3図は第1図
例の説明に要する電荷の読み出し・掃き出しのタイミン
グチャート、第4図は従来の固体撮像装置の光電変換部
の断面図である。
1・・・・・・N型シリコン基板、2・・・・・・P型
拡散層、3・・・・・・N型拡散層、4・・・・・・P
型拡散層、5・・・・・・スイッチ回路、6・・・・・
・直流電圧源、7・・・・・・直流電圧源、8・・・・
・・スイッチ制御端子、9・・・・・・N型シリコン基
板、10・・・・・・P型拡散層、22・・・・・・N
型拡散層、12・・・・・・P型拡散層、13・・・・
・・直流電圧源、14・・・・・・スイッチ回路、15
・・・・・・直流電圧源、16・・・・・・スイッチ制
御端子。
代理人の氏名゜弁理士 粟野重孝 ほか1名第
l
図
第
図
第
図
床11才句FIG. 1 is a cross-sectional view of a photoelectric conversion section of a solid-state imaging device according to an embodiment of the present invention, FIG. 2 is a potential diagram in the depth direction in an embodiment of the present invention and a conventional example, and FIG. 3 is a diagram similar to that shown in FIG. FIG. 4 is a timing chart for reading and sweeping out charges necessary for explaining an example, and is a sectional view of a photoelectric conversion section of a conventional solid-state imaging device. 1...N-type silicon substrate, 2...P-type diffusion layer, 3...N-type diffusion layer, 4...P
Type diffusion layer, 5...Switch circuit, 6...
・DC voltage source, 7...DC voltage source, 8...
...Switch control terminal, 9...N type silicon substrate, 10...P type diffusion layer, 22...N
type diffusion layer, 12...P type diffusion layer, 13...
...DC voltage source, 14...Switch circuit, 15
...DC voltage source, 16...Switch control terminal. Name of agent゜Patent attorney Shigetaka Awano and 1 other person
Claims (1)
形成された前記一導電型とは反対導電型の第1の領域と
、前記第1の領域上に形成された前記一導電型の第2の
領域と、前記第2の領域上に前記第1の領域と分離して
形成された前記反対導電型の第3の領域を有する光電変
換部の前記第3の領域に所定電圧を供給し、前記光電変
換部に蓄積された光信号電荷を前記半導体基板に掃き出
すことができることを特徴とする固体撮像装置。a semiconductor substrate having one conductivity type; a first region formed on the semiconductor substrate and having a conductivity type opposite to the one conductivity type; and a second region having the one conductivity type formed on the first region. and a third region of the opposite conductivity type formed on the second region and separated from the first region, supplying a predetermined voltage to the third region of the photoelectric conversion unit, A solid-state imaging device characterized in that optical signal charges accumulated in the photoelectric conversion section can be swept out to the semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1057035A JP2532645B2 (en) | 1989-03-09 | 1989-03-09 | Solid-state imaging device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1057035A JP2532645B2 (en) | 1989-03-09 | 1989-03-09 | Solid-state imaging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02237067A true JPH02237067A (en) | 1990-09-19 |
| JP2532645B2 JP2532645B2 (en) | 1996-09-11 |
Family
ID=13044187
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1057035A Expired - Fee Related JP2532645B2 (en) | 1989-03-09 | 1989-03-09 | Solid-state imaging device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2532645B2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62293672A (en) * | 1986-06-12 | 1987-12-21 | Nec Corp | Solid-state image sensor |
| JPS6446379A (en) * | 1987-08-14 | 1989-02-20 | Sony Corp | Solid-state image-pick up device |
-
1989
- 1989-03-09 JP JP1057035A patent/JP2532645B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62293672A (en) * | 1986-06-12 | 1987-12-21 | Nec Corp | Solid-state image sensor |
| JPS6446379A (en) * | 1987-08-14 | 1989-02-20 | Sony Corp | Solid-state image-pick up device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2532645B2 (en) | 1996-09-11 |
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