JPH02238530A - Test system for working of program - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an operation test of a program, and in particular a program that runs on a computer device or a simulation device that can execute the same instruction set as the computer device. It relates to a method of testing the operation of a program by giving various commands to the device during the development stage.

[Conventional technology]

Conventionally, as a method for testing a computer device and a program executed on it by sequentially giving commands, as described in Japanese Unexamined Patent Publication No. 1984-1.84647, a command sequence given from a command input device is tested. There is a method that stores the commands and calls and executes each command in the command sequence in order.

[Problem to be solved by the invention]

The above-described conventional technology stores a series of commands input from an input device such as a keyboard and sequentially executes them, thereby saving the operator the trouble of repeatedly inputting the same commands over and over again.

With this method, it is possible to check at the time of input whether the input command complies with the grammar recognized by the computer device.

However, no consideration is given to input errors in commands that become apparent when the commands are executed.

Therefore, there is a problem in that the operator has to wait and confirm the execution of the command.

In particular, if the above-mentioned input error occurs in a command executed after the program under test has been running for a long time, the efficiency of the operation test will be significantly reduced.

An object of the present invention is to detect the above-mentioned execution-time errors hidden in a stored command string and provide the operator with an opportunity to correct them before the start of a program operation test, thereby enabling efficient and highly reliable operation tests. It's about doing.

[Means to solve the problem]

The above purpose is to provide computer equipment whose instruction set includes invalid instructions that do not cause the computer equipment to operate.
This is achieved by providing the testing means for the program under test with invalid instruction replacement means for replacing the instructions constituting the program under test with invalid instructions.

[Operation] The command sequence is stored in advance in the test means. Next, the original instructions constituting the program under test are replaced with invalid instructions by invalid instruction replacement means. When the replaced program under test is tested by the testing means, the command strings stored in the testing means are sequentially executed, and errors that occur during execution hidden in the commands are discovered. Since the test program is replaced with an invalid instruction, the above test does not involve any operation of the computer equipment, and does not cause a processing loop within the program, so it is processed quickly.

After discovering and correcting the mistake in the command string using the above method,
Retest the program under test with the original instructions without replacing them with invalid instructions. This makes it possible to detect only abnormal operations caused by the program under test.

Since the invalid instruction replacement means operates completely independently of the test means, it can be easily provided.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. Figure 1 shows its configuration, where 1 is a test means;
2 is an invalid instruction replacement means, and 3 is a program under test input route switching means.

The flowchart in FIG. 2 shows the processing procedure of this embodiment. First, in step 20, a command is input from the operator command input means 8. The input command is stored in the main memory 17 by the command registering means 9 as a command string 15.
is stored as. At this time, a syntax error in the command is detected by the command error detection means 10. Next, in step 21, the program under test 7 stored in the external storage device 6 is replaced with an invalid instruction by the invalid instruction replacing means 2, and then the program under test input means rows 1- into the main storage device 17. At this time, the program under test input route switching means 3 is set to the replacement side 4X, 4Y.

Next, in step 22, a test is executed according to the command sequence 15. The command sequence 15 is sequentially executed by the command execution control means 11. Errors at this time are detected by command error detection means. The program under test 16 is read and processed by the instruction execution means 12, but since the instructions have been replaced with invalid instructions, in this case, the instruction execution means 12 can perform no substantial processing by simply reading out the program under test 16 sequentially. nothing is done. As described above, processing is performed at high speed.

As a result, in step 23, the operator determines whether the command sequence 15 is normal, and if there is an abnormality, the operator corrects the command in step 24. Commands are modified using the command input means 8 and the command registration means 9.

If the command string 15 is normal, in step 24, the program under test input route switching means 3 is set to the non-replacement side 5X, 5Y, and the program under test 7 is loaded into the main storage device 17 again.

Next, in step 25, a test is performed in the same manner as in step 22. Step 25 corresponds to conventional test execution. At this time, there is no latent error in the command sequence 15, and all abnormal operations are caused by the program under test 16. This abnormal operation is detected by the abnormal operation detection means 13.

As described above, according to this embodiment, command errors that cannot be detected unless the command sequence is executed can be detected in a short time, and the program under test can then be tested using a normal command sequence. Therefore, it is highly reliable and has the effect of allowing efficient testing.

〔Effect of the invention〕

According to the present invention, the program under test can be tested after storing command sequences all at once and ensuring in advance that they are normal, resulting in high reliability and high efficiency.

Further, the invalid instruction replacement means according to the present invention can operate independently of the testing means, and even when a simulator is used as the testing means, no modification of the simulator is required.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a computer device to which an embodiment of the present invention is applied, and FIG. 2 is a flowchart showing the processing procedure of an operation test according to the embodiment. 1. Program testing means, 2. Invalid instruction replacement means, 3. Tested program input route switching means, 4X, 4Y
... Substitution side, 5X, 5Y... Non-substitution side, 6...
External storage device, 7. Program under test.

Claims (1)

[Claims] In an operation test method for a program running on a computer device whose instruction set includes an invalid instruction, there is provided a means for storing a command sequence for controlling the execution of the program under test, and a means for sequentially calling the stored command sequence to execute each command. and means for replacing instructions constituting the program under test with invalid instructions, and verifying that the command sequence is correctly executed before testing the program under test. Operation test method.