JPH02238574A - Logic diagram input device - Google Patents

Logic diagram input device

Info

Publication number
JPH02238574A
JPH02238574A JP1060202A JP6020289A JPH02238574A JP H02238574 A JPH02238574 A JP H02238574A JP 1060202 A JP1060202 A JP 1060202A JP 6020289 A JP6020289 A JP 6020289A JP H02238574 A JPH02238574 A JP H02238574A
Authority
JP
Japan
Prior art keywords
wiring
input
pins
pin
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1060202A
Other languages
Japanese (ja)
Inventor
Masumi Yoshida
吉田 真澄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1060202A priority Critical patent/JPH02238574A/en
Publication of JPH02238574A publication Critical patent/JPH02238574A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To shorten a setting period by wiring output pins and input pins of elements directly without considering the angle of wiring, then generating only horizontally or vertical wiring automatically. CONSTITUTION:The output pins 2a - 2l and input pins 3a - 3p are wired 4 optionally. Then one output pin 2a and the corresponding input pin 3a are selected, horizontal wiring is performed as closely to the input pin 3a as possible within a range wherein wiring from the output pin 2a is possible, and then vertical wiring is carried out to obtain Manhattan wiring between the output pin 2a and input pin 3a. Similarly, other output pins 2b - 2l and the corresponding input pins 3a - 3p are extracted and Manhattan wiring is generated automatically as well. Consequently, the Manhattan wiring can be generated automatically, so input operation is speeded up and the design period is shortened.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は論理図入力装置に関し、特にその配線に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a logic diagram input device, and particularly to its wiring.

〔従来の技術〕[Conventional technology]

第3図は例えば従来の論理図入力装置で水平方向もしく
は垂直方向のみの配線(以下マンハッタン配線と呼ぶ)
した論理図で、図において、(la)〜(1d)は素子
の図形C以下シンボルと呼ぶ)、(2a)〜(2t!)
は出力ピン、(3a)〜(3p)は入力ピン、(5)は
マンハッタン配線、(6a)〜(6W)は配線方向の変
化点である。
Figure 3 shows, for example, wiring only in the horizontal or vertical direction (hereinafter referred to as Manhattan wiring) using a conventional logic diagram input device.
In the diagram, (la) to (1d) are called symbols below the element figure C), (2a) to (2t!)
are output pins, (3a) to (3p) are input pins, (5) is Manhattan wiring, and (6a) to (6W) are points of change in wiring direction.

次に動作について説明する。従来の論理図入力装置での
出力ピン(2a)〜(2l!)と入力ピン(3a)〜(
3p)とのマンハッタン配線は、配線方向を水平方向か
ら垂直方向へ、あるいは垂直方向から水平方向へ変化さ
せる時には全て人手でその変化点(6a)〜(6W)を
指定して配線方向を変化させていた。
Next, the operation will be explained. The output pins (2a) to (2l!) and input pins (3a) to (2l!) in the conventional logic diagram input device
For Manhattan wiring with 3p), when changing the wiring direction from horizontal to vertical or from vertical to horizontal, the wiring direction is changed by manually specifying the change points (6a) to (6W). was.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の論理図入力装置は以上のように構成されていたの
で、マンハッタン配線をする場合には配線方向を変化さ
せるたびにその点を指定する必要があり、入力に時間が
かかるという問題点があった。
Conventional logic diagram input devices were configured as described above, so when doing Manhattan wiring, it was necessary to specify the point each time the wiring direction was changed, which caused the problem that input took time. .

この発明は上記のような問題点を解決するためになされ
たもので、設計期間を短縮することのできる論理図入力
装置を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and an object thereof is to obtain a logic diagram input device that can shorten the design period.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る論理図入力装置は入力ピンと出力ピンと
を配線角度を間はず任意配線をしtこ後、自動でマンハ
ッタン配線を生成するようにしだものである。
The logic diagram input device according to the present invention automatically generates Manhattan wiring after arbitrary wiring is performed by changing the wiring angle between input pins and output pins.

〔作用〕[Effect]

この発明におけるマンハッタン配線は自動で生成される
Manhattan wiring in this invention is automatically generated.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第1
図において, (la)〜(1d)はシンボル、(2a
)〜(27?)は出力ピン、(3a)〜(3p)は入力
ピン、(4)は任意配線、(5)はマンハッタン配線で
ある。
An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (la) to (1d) are symbols, (2a
) to (27?) are output pins, (3a) to (3p) are input pins, (4) is arbitrary wiring, and (5) is Manhattan wiring.

第2図は第1図のフローチャートである。FIG. 2 is a flowchart of FIG. 1.

次に動作について説明する。まず、第1図に示した出力
ピン(2a)〜(2l)と入力ピン(3a)〜(3p)
を任意配線(4)をする。次に、ある出力ピン(2a)
とそれに対応する入力ピン(3a)を抽出し、出力ピン
(2a)から配線可能な範囲内で最大限入力ピン(3a
)に近づくまで、水平方向配線を行った後に、垂直方向
へ配線し、出力ピン(2a)と入力ピン(3a)とのマ
ンハッタン配線を得る。
Next, the operation will be explained. First, the output pins (2a) to (2l) and input pins (3a) to (3p) shown in Figure 1
Perform arbitrary wiring (4). Next, a certain output pin (2a)
and its corresponding input pin (3a), and connect the maximum input pin (3a) within the range that can be wired from the output pin (2a).
), and then vertical wiring to obtain Manhattan wiring between the output pin (2a) and the input pin (3a).

以下、順に他の出力ピン(2C)〜(2e)についても
対応する他の入力ピン(3a)〜(3p)を描出し、同
様にマンハッタン配線を自動生成させる。
Thereafter, corresponding input pins (3a) to (3p) are sequentially drawn for other output pins (2C) to (2e), and Manhattan wiring is automatically generated in the same way.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、マンハッタン配線を自
動で生成できるように構成したので、入力作業が早くで
き設計期間が短縮されるという効果がある。
As described above, according to the present invention, since the Manhattan wiring is configured to be automatically generated, input work can be done quickly and the design period can be shortened.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例によりあるステップまでマ
ンハッタン配線が生成された論理図、第2図は第1図の
フローチャート、第3図は従来の論理図入力装置でマン
ハッタン配線した論理図である。 図において、(la) 〜(ld)はシンボル、(2a
)〜(2e)は出力ピン、(3a)〜(3p)は入力ピ
ン、(4)は任意配線、(5)はマンハッタン配線、(
6a)〜(6W)は配線方向の変化点である。 なお、図中同一符号は同一、又は相当部分を示す。
Fig. 1 is a logic diagram in which Manhattan wiring is generated up to a certain step according to an embodiment of the present invention, Fig. 2 is a flowchart of Fig. 1, and Fig. 3 is a logic diagram in which Manhattan wiring is generated using a conventional logic diagram input device. be. In the figure, (la) to (ld) are symbols, (2a
) to (2e) are output pins, (3a) to (3p) are input pins, (4) is arbitrary wiring, (5) is Manhattan wiring, (
6a) to (6W) are points of change in the wiring direction. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 論理図を入力する装置において素子の図形間の配線を行
う場合、その素子の出力ピンと入力ピンとを配線の角度
を問わず直接配線した後に、自動で水平方向もしくは垂
直方向のみの配線を生成することを特徴とする論理図入
力装置。
When wiring between element figures in a logic diagram input device, after directly wiring the output pin and input pin of the element regardless of the wiring angle, automatically generate wiring only in the horizontal or vertical direction. A logic diagram input device characterized by.
JP1060202A 1989-03-13 1989-03-13 Logic diagram input device Pending JPH02238574A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1060202A JPH02238574A (en) 1989-03-13 1989-03-13 Logic diagram input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1060202A JPH02238574A (en) 1989-03-13 1989-03-13 Logic diagram input device

Publications (1)

Publication Number Publication Date
JPH02238574A true JPH02238574A (en) 1990-09-20

Family

ID=13135331

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1060202A Pending JPH02238574A (en) 1989-03-13 1989-03-13 Logic diagram input device

Country Status (1)

Country Link
JP (1) JPH02238574A (en)

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