JPH02246155A - semiconductor equipment - Google Patents

Abstract

PURPOSE:To obtain a transistor whose characteristic is stable without being influenced by an irregularity or the like of a gate electrode film by a method wherein a first insulating film and a conductive film used as a gate electrode are formed on side faces of a recessed part formed in a semiconductor substrate and a diffusion layer is formed at the bottom of the recessed part. CONSTITUTION:A transistor is constituted of the following: a first insulating film 102 formed on side faces of a recessed part formed in a semiconductor substrate 101; a conductive film 103 which is formed on sidewalls of the recessed part and which is used as a gate electrode; a diffusion layer 104 which has been formed on the surface of the substrate and at the bottom of the recessed part. By this constitution, it is possible to control a transistor characteristic by implanting ions from the upper part of the gate electrode after the gate electrode has been formed. In addition, even when a high-melting-point metal or the like is used for a gate metal, it is possible to adjust a Vth of the transistor characteristic.

Description

[Detailed description of the invention]

[Industrial application field 1 The present invention relates to improvements in the structure of semiconductor devices.

[Prior Art] The structure of a conventional semiconductor device is shown in FIG. The figure shows a part of a transistor with a conventional structure, in which 1 is a semiconductor substrate, 2 is a gate insulating film, 3 is a gate electrode, 4 is a sidewall insulating film, and 5 is a diffusion layer. In the conventional structure, the transistor is formed on the plane of the substrate, and the gate electrode is made of a high melting point metal, its silicide, or a polycide consisting of two layers of this and polycrystalline silicon in order to lower the wiring resistance. [Problem to be Solved by the Invention] In such a structure, for example, in an element such as a mask ROM in which information is written by changing the transistor characteristics during the process, ion implantation is performed from above the gate electrode. By using a high-melting point metal for the gate electrode, it is difficult for ions to pass through these metals, so P9 and As", for example, do not pass through MoSi*2500 at all, and B9
is transmitted through a general ion implanter (200Ke
At the maximum rating of Vmax), only the base portion of the injection distribution is included, and the characteristics are unstable due to variations in the gate electrode film. An object of the present invention is to solve the above-mentioned problems. [Means for Solving the Problems] The present invention provides a recess formed on a semiconductor substrate, a first insulating film formed on at least the side walls of the recess, and a conductive film forming a gate electrode formed on the side wall of the recess. The present invention is a semiconductor device characterized by having a transistor formed on the side wall of the recess, which is composed of a diffusion layer formed on the surface of the substrate and at the bottom of the recess, and a ROM having the structure. [Example] An example of the present invention is shown in FIG. In the figure, 101 is a semiconductor substrate, 102 is a gate insulating film, 103 is a gate electrode made of a high melting point metal or its silicide, or polycide made of two layers with polycrystalline silicon, and 104 is a diffusion layer. In the figure, the gate electrode is formed on the side wall surface of a recess formed in the substrate surface, and the portion that becomes the channel of the transistor consists of the side wall surface of the recess or part of the side wall surface and the bottom surface. Therefore, even if data is written by ion implantation as described above after forming the gate electrode, the S
i or SiO! The state is the same as the one in the middle, and LSS
The injection distribution according to theory is a Gaussian distribution, for example, 180
At KeV, in Si 3゛ P0 peak depth 4872 people, standard deviation 872 people,
``The B0 peak depth is 2279 people and the standard deviation is 719 people, making it possible to increase or decrease the vth of the transistor characteristics even with gate metals using high melting point metals etc. Figure 2 shows an example of the manufacturing process. (a) to (C), and FIG. 2(a) shows a state where a recess is formed in the substrate by anisotropic etching after forming an element isolation insulating film in a normal process.
In the figure, the same symbols as in Figure 1 indicate the same parts. Although the element isolation part is not shown in the figure, this may be done by the LOCO3 method or the Jiri method. Figure 2 (b) shows rounded oxidation of the corners of the recess. A rear gate insulating film 102 has been formed, and a conductive layer 103 for a gate electrode has been formed. FIG. 2(C) shows the conductor layer 103 is etched by anisotropic etching, leaving the conductor layer 103 only on the side surfaces of the recess and serving as the gate electrode. (The same is true.) FIG. 1 shows a state in which a diffusion layer 104 is further formed. As described above, the structure of the present invention has been realized.

【Effect of the invention】

By using the structure of the present invention, the transistor characteristics can be controlled by ion implantation from above the gate electrode even in a transistor using a high melting point metal, its silicide, or a polycide consisting of two layers of these and polycrystalline silicon as the gate metal. We were able to. 2,102 3,103 4 ・ ・ 5,104 Gate insulating film Gate electrode or gate electrode layer Sidewall insulating film Diffusion layer and above Applicant Seiko Epson Corporation Agent Patent attorney Kizobe Suzuki (1 other person)

[Brief explanation of drawings]

Figure 1 is a detailed explanatory diagram of the present invention, Figures 2 (a) to (C)
3 is a diagram showing an example of the manufacturing process of the present invention, and FIG. 3 is an explanatory diagram of a conventional structure. 1, lot...Semiconductor device Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] (1) A recess formed on a semiconductor substrate, a first insulating film formed on at least the side surfaces of the recess, a conductive film forming a gate electrode formed on the side wall of the recess, and a conductive film formed on the substrate surface and the bottom of the recess. What is claimed is: 1. A semiconductor device comprising a transistor formed on a side wall of the recess, the transistor being formed of a diffusion layer.