JPH02250525A - Operational amplifier - Google Patents

Abstract

PURPOSE:To shorten the turn-off time with the power consumption equivalent to that of a conventional operational amplifier by setting a bypass element in a conductive state and a nonconductive state when the output voltage of a differential amplifier is higher and lower than a fixed level respectively. CONSTITUTION:The voltage of a point A is applied to the gate of an FET 15 connected to an FET 16 to constitute a level shift circuit 14 serving as a bypass driving circuit. An FET 17 is connected between the output terminal of an operational amplifier 1 and the power voltage VSS and in parallel to an FET 10 for production of a bypass element. The bypass driving circuit sets the bypass element in a conductive state and a nonconductive state when the output voltage of a differential amplifier 12 is higher and lower than a fixed level respectively. As a result, the turn-off time can be shortened with the power consumption equivalent to that of a conventional operational amplifier.

Description

[Detailed description of the invention] "Industrial application field" The present invention relates to an operational amplifier.

"Conventional technology" FIG. 3 shows a voltage follower using a conventional operational amplifier.

In the figure, an input pulse voltage v1 is applied to the non-inverting input terminal of the operational amplifier 3.

This operational amplifier 3 has its output terminal and inverting input terminal connected, and constitutes a voltage follower as a whole. In addition, the operational amplifier 3 has a positive power supply voltage VDD and a negative power supply voltage VSI.
I is applied. 2 is the resistance component 2 of the resistance value Rt.
a and a capacitor component 2b having a capacitance value CL, and is connected to the output terminal of the operational amplifier 3. Inside the operational amplifier 3, numerals 4 to 8 are field effect transistors (FETs), which constitute a differential amplifier 'a12. In the figure, the voltage at point A (output voltage of differential amplifier 12) vA is applied to the gate of FET 9, and FET
The drain current 10 of 9 is controlled. 11 is a capacitor for preventing oscillation. A bias voltage (18) is applied from the bias circuit 18 to the gate of FET10, so FET10 serves as a constant current source. FE
If the current flowing through T10 is iB, the current iL flowing through load 2 is: ! L=tofa...(1). As described above, FET9, FET10, and capacitor 11 constitute final stage amplifier nN13.

Next, the operation of the circuit shown in FIG. 3 will be explained. First, an input pulse voltage vi is applied to the non-inverting input terminal of the operational amplifier 3. As shown in FIG. 4(A), the waveform of this human power pulse voltage vt rises from voltage O to ■ at time t. When the input pulse voltage (1) rises, the voltage vA at point A rapidly falls, as shown in FIG. 4 (c).

Since voltage VA is applied to the gate of FET9, F
ET9 has a drain current i. flows. drain current 1
゜, the current i L shown by equation (1) in the load 2
flows. When the current iL flows, an output signal voltage v0 expressed by the following equation (2) is generated at both terminals of the load 2.

y, )=RLit(1-ε-''1) (2) where α is the attenuation rate, which is the value of α-1/RLCL. Also, t is time, and at time t, (=0.

According to equation (2), the output signal voltage V. Figure 4 (b)
Time of 1. As shown from t to t, the voltage gradually increases (.In this way, as time passes, the voltage
1 and the output signal voltage V. The difference between
As shown in FIG. 4(c), the voltage vA at point A gradually approaches voltage VA8. Here, the voltage VAS is VAS” v when the voltage gain of the final stage amplifier 13 is g.
This is the value obtained by p/g '' (3). As mentioned above, the output signal voltage V. gradually grows larger, but in the middle of growing larger, V. ＞V
When p, the voltage vA at point A becomes larger than the voltage vAs. Here, in steady state, VA=VO/g...
Since the relationship (4) exists, if V A > V Ag, then v O < v p due to the relationship between equations (3) and (4).
Must. But now V. >V, so the output signal voltage is V. becomes gradually smaller so as to satisfy equation (4). Output signal voltage ■. When becomes small and V O < V again, VA < VA8, so
In contrast to the above operation, the output signal voltage V. gradually increases. While repeating the oscillations as described above, the output signal voltage V eventually increases. is the voltage V, + is stable, and the voltage VA at point A is the voltage ■. (See Figure 4 (b) and (c)).

Next, the operation when the input pulse voltage Vi drops from the voltage ■ to O at time t3 in FIG. 4(a) will be described. When the human power pulse voltage V decreases, the voltage VA at point A in FIG. 3 suddenly rises as shown in FIG. 4 (b). Did you stand up? [Pressure VA is F E 'r'
Since the drain current i of FET9 is applied to the gate of FET9. becomes O. Therefore, from the relationship in equation (1), i,=-iI! ...(5) is obtained. According to equation (5), from load 2 to FE1゛10
A constant current i5 will flow towards.

By the way, at time t3 in FIG. 4, the capacitor O
Since L is charged with a charge Q''CLVP, the current 1
When L=-ia flows through the load 2, an output signal voltage V expressed by the following equation (6) is generated across the load 2.

Vo= (Vp+ RLi E) ε-at [(L
i,...-(6) Here, t is time, and t=Q at time t. According to equation (6), the output signal voltage V. As shown at time t to t in FIG. 4(b), the value gradually decreases from the initial value 2.

When it becomes 0, v becomes <0, so a drain current of 1° (to>O) flows. When a drain current of 10 flows, it flows from the output terminal of the operational amplifier 3 to the load 2. As the current iL shown by equation (1) flows towards the direction, the output signal voltage V. increases (increases). When the output signal voltage V increases and becomes V again > 0, the voltage vA at point A becomes Since it becomes larger than O, it becomes i.-0 again. Therefore, the output signal voltage V. gradually decreases.

While repeating the oscillations as described above, the output signal voltage V eventually increases. is stabilized at O, and the voltage vA at point A is also stabilized at a constant value.

As explained above, in the circuit shown in FIG. 3, the output signal voltage v0 of the operational amplifier 3 follows the input pulse voltage Vi. However, as shown in FIG. 4 (b), the output signal voltage V. is the turn-on time t at startup. , and has a turn-off time (.□) at the falling edge.

"Problem to be Solved by the Invention" By the way, in the circuit shown in Fig. 3, the output signal voltage V
. There was a problem that the turn-off time (.□) was longer than the turn-on time t.H.

The reason for this is explained below.

First, according to equation (2), the larger the current iL, the higher the output signal voltage V. It can be seen that the rise is steep. Therefore, the larger the current iL, the higher the output signal voltage V. turn-on time t. N can be shortened. Also, according to equation (1), if the drain current 10 of the FET 9 is increased, the current iL can be made thicker.

Therefore, by using a FET with a large current capacity as the FET 9 and increasing the drain current 10, the turn-on time t can be shortened.

On the other hand, according to equation (6), the larger the current i6, the higher the output signal voltage V. It can be seen that the fall of is steep. Therefore, by increasing the current ig, the turn-off time t.FF can be shortened.

However, since the current 18 is a constant current that always flows through the FET 10, increasing the current iE increases the power consumption of the operational amplifier 3, and as a result, heat generation also increases. Also, the current i
Since L becomes small, the turn-on time t. N becomes longer.

Therefore, considering the practicality of operational amplifier 3, the current i
Since it was necessary to suppress E to a certain level, it was not possible to shorten the turn-off time (PF) very much.

An object of the present invention is to provide an operational amplifier that can shorten the turn-off time (FF) with the same power consumption as conventional operational amplifiers.

"Means for Solving the Problems" In order to solve the above problems, the present invention provides a final stage amplification element that supplies current from an output terminal to a load, a constant current element connected to the output terminal, and a final stage amplifier element that supplies current from an output terminal to a load. An operational amplifier comprising: a differential amplifier that drives an amplification element; a bypass that outputs the control signal so as to make the bypass element conductive when the output voltage of the differential amplifier becomes a certain value or more, and to make the bypass element non-conductive when the output voltage of the differential amplifier becomes below the certain value; It is equipped with a drive circuit.

"Operation" When the bypass element becomes conductive, it bypasses the current flowing through the constant current element. Further, the bypass drive circuit makes the bypass element conductive when the output voltage of the differential amplifier exceeds a certain value, and makes the bypass element non-conductive when the output voltage becomes less than the certain value.

"Example" Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, the same reference numerals are given to the parts corresponding to those in FIG. 3, and the explanation thereof will be omitted. In the figure, reference numeral 1 denotes an operational amplifier of the present invention, which as a whole constitutes a voltage follower similarly to FIG. 3. Reference numeral 16 denotes an FET, which serves as a constant current source by supplying a bias voltage (8) to its gate.

A voltage vA at point A is applied to the gate of FET 15 connected to FET 16, and constitutes level shift circuit 14. This becomes the bypass drive circuit. F
E Tl 7 is connected in parallel with FETl0 between the output terminal of operational amplifier 1 and power supply voltage Vsg. This becomes a bypass element. The voltage at the 0 point (output voltage of the level shift circuit 14) vc is applied to the gate of the FET 17. Therefore, the gate-drain voltage of FET17 is ■. 0 is Voc=l/c Vss=...(
7).

Next, the operation of the circuit shown in FIG. 1 will be explained.

First, an input pulse voltage V shown in FIG. 2(a) is applied to the non-inverting input terminal of the operational amplifier 1. time(.

When the human power pulse voltage V, rises from voltage 0 to Vp, the output signal voltage V, similar to the circuit shown in FIG.

gradually rises, and the voltage vA at point A falls rapidly. Then, after the turn-on time toN, the output signal voltage v
0 is stabilized at voltage ■2, and voltage vA at point A is stabilized at voltage VA8. At this time, the voltage VC at point 0 in the figure is ? as shown in FIG. 2 (d), at point A? [The waveform is a level shift of VA to the negative side. V·r shown in FIG. 2 (d) is the threshold voltage of FET 17, and when the input terminal vi rises, (7)
The voltage Vpa shown in the formula is smaller than the threshold voltage VTR. Therefore, the FET 17 becomes non-conductive, so that the drain current ip of the FET 17 does not flow.

Next, the operation when the human power pulse voltage V falls from the voltage ■ to 0 at time t3 in FIG. 2(A) will be described. When the input pulse voltage Vm falls, the voltage vA at point A suddenly rises, similar to the circuit shown in FIG. When the voltage vA at point A rises, the voltage at point 0 V
Since c also rises, during the shaded period in FIG. 2(d), the voltage . 0 is greater than the threshold voltage VTH. therefore,
During the above period, the FET 17 becomes conductive, and a drain current 1r (ip>0) flows. When the drain current 11 flows, the output signal voltage V of the operational amplifier l. is Vo= (
Vp+Rt (f E+ IF) l l: -a
tRt, (it+ip) ... (8
). However, at time t, t=Q.

Thereafter, similar to the circuit shown in Fig. 3, the turn-off time (.F
Output signal voltage V after F. is stabilized at O, and the voltage vA is stabilized at a constant value.

By the way, according to equation (8), the larger the current iF is, the more the output signal voltage V. Since the fall of t becomes steep, the turn-off time t can be reduced by increasing the current iF. It can be seen that it is possible to shorten the FF. Increasing the current i v can be easily achieved by using a FET with a large current capacity as the FET 17. The current i is indicated by the diagonal line in FIG. This is a current that flows instantaneously only during the indicated period.Therefore, even if the current iP is increased, the power consumption and heat generation of the operational amplifier I hardly change.

"Effects of the Invention" As explained above, according to the present invention, the turn-off time t OFF can be shortened with the same power consumption as a conventional operational amplifier.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a voltage waveform diagram of each part of the circuit shown in Fig. 1, Fig. 3 is a circuit diagram of a conventional voltage follower circuit, and Fig. 4 is a circuit diagram of a conventional voltage follower circuit. FIG. 3 is a waveform diagram of voltages at various parts of the circuit shown in the figure. l...Operational amplifier, 2...Load, 9.
...FET (final stage amplification element), 10...
PET (constant current element), 12... differential amplifier, 13... final stage amplifier, 14 level shift circuit (bypass drive circuit), 17... FET (
bypass element).

Claims (1)

[Claims] In an operational amplifier comprising a final stage amplification element that supplies current from an output terminal to a load, a constant current element connected to the output terminal, and a differential amplifier that drives the final stage amplification element, the current is supplied to a control terminal. A bypass element conducts or non-conducts between both ends of the constant current element depending on the value of a control signal, and when the output voltage of the differential amplifier reaches a certain value or more, the bypass element becomes conductive and and a bypass drive circuit that outputs the control signal so as to make the bypass element non-conductive when the output voltage of the dynamic amplifier becomes below the certain value.