JPH02257342A - Information processor - Google Patents

Abstract

PURPOSE:To speed up the read and supply of instruction words by an instruction supply means by issuing continuously read requests for instruction words in plural blocks succeeding to a block which contains an instruction word when the control circuit of the instruction supply means issues the read requests for the instruction words to a buffer storage means. CONSTITUTION:When the instruction supply means 2 is requested to read the instruction words out of the buffer storage means 3, the control circuit 20 is provided to issue the read requests for the instruction words contained in plural blocks succeeding the block which contains the instruction word. Therefore, while the instruction supply means 2 requests and processes the instruction word of the block stored first in the buffer storage means 3, the instruction words in the blocks following the 1st block are stored in the buffer storage means 3. Consequently, the instruction words are read fast out of the buffer storage means 3 by the instruction supply means 2 to speed up the supply of instructions to an instruction processing means 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device, and more particularly to an instruction supply means for reading and supplying instruction words.

[Conventional technology]

Conventionally, in this type of information processing apparatus, the instruction supply means issues only a read request for a command word to be supplied to the instruction processing means to the buffer storage means.

Therefore, if there is no valid instruction word in the buffer storage means, the buffer storage means issues a read request for a block containing the instruction word to the main storage means and sends the block from the main storage means. The received block is stored, and the requested command is sent to the command supply means.

Thereafter, the instruction supply means issues read requests for instruction words one after another to the buffer storage means, but the instruction word requested to be read from the instruction supply means is first sent from the main memory means. When the next block is reached, the buffer storage means issues a read request for the next block to the main storage means. [Problem to be Solved by the Invention] In the conventional information processing device described above, Until a valid instruction word is accumulated in the buffer storage means, when the instruction word issued by the instruction supply means for which a read request is issued is in the next block of the block sent from the main storage means. Since a read request for the next block is issued to the main storage means, the probability that the instruction word requested to be read by the instruction supply means exists in the buffer storage means is low, and reading and supply of the instruction word by the instruction supply means is slow. It has the disadvantage of becoming.

In view of the above-mentioned points, an object of the present invention is to store a plurality of blocks consecutive to a block containing an instruction word in a buffer storage means when there is no valid instruction word in the buffer storage means. Reading of the command word by the supply means and d
An object of the present invention is to provide an information processing device that speeds up supply.

[Means to solve the problem]

The information processing device of the present invention includes a main storage means for storing instruction words, an instruction processing means for decoding and processing the instruction words, and an information processing device located between the main storage means and the instruction processing means, and storing information in the main storage means. an instruction supplying means for reading and supplying the instruction word to the instruction processing means, and blocking a copy of a part of the instruction word stored in the main storage means, which is located between the main storage means and the instruction supplying means. In the information processing apparatus, the instruction supplying means, when issuing a read request for an instruction word to the buffer storage means, stores the instruction word in a plurality of blocks consecutive to the block containing the instruction word. A control circuit is provided for successively issuing read requests for each included instruction word.

(Function) In the information processing device of the present invention, when the control circuit of the instruction supply means issues a read request for an instruction word to the buffer storage means, the instructions included in each of the plurality of blocks consecutive to the block containing the instruction word are Continuously issue consecutive requests for words.

(Example〕 Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an information processing apparatus according to an embodiment of the present invention.
Instruction processing means 1, instruction supplying means 2, and buffer storage means 3
The main part thereof is composed of a main memory means 4 and a main storage means 4.

When the instruction supply means 2 issues a read request for an instruction word to the buffer storage means 3, it continuously issues read requests for instruction words included in each of a plurality of blocks consecutive to the block containing the instruction word. A control circuit 20 is provided.

Next, the operation of the information processing apparatus of this embodiment configured as described above will be explained.

The instruction supply means 2 issues an instruction word read request to the buffer storage means 3 in order to supply the instruction word to the instruction processing means 1, and at the same time, when there is only one valid instruction word in the buffer storage means 3.
If the instruction word does not exist, the control circuit 20 also issues a request to read a plurality of blocks of instruction words consecutive to the block containing the instruction word for which the read request was made.

The buffer storage means 3 sequentially processes the read requests issued from the instruction supply means 2, but since there is no valid instruction word in the buffer storage means 3, as a result, the read requests issued by the instruction supply means 2 are not processed by the main storage means 4. Block read requests are issued sequentially.

The main storage means 4 sequentially processes block read requests issued from the buffer storage means 3 and sends the blocks to the buffer storage means 3.

The buffer storage means 3 selects the instruction word requested by the instruction supply means 2 when the first block is sent and supplies it to the instruction processing means 1.

Thereafter, the instruction supply means 2 issues read requests for instruction words to be supplied to the instruction processing means l to the buffer storage means 3 one after another. The transfer of blocks continues, and before the instruction word requested to be read by the instruction supplying means 2 becomes the next instruction word of the block initially stored in the buffer storage means 3, the instruction words of all blocks are transferred to the buffer storage means 3. Stored within 3.

Therefore, when the command word for which a read request has been made is the next block after the block sent from the main memory means 4, the buffer memory means 3 requests the main memory means 4 to read the next block. As a result, the instruction supply means 2 can read out the instruction word at high speed, and the instruction processing means 1 can be supplied with the instruction at high speed.

〔Effect of the invention〕

As explained above, the present invention enables the instruction supply means to issue read requests for instruction words included in each of a plurality of blocks consecutive to the block containing the instruction word when issuing a read request for the instruction word to the buffer storage means. By providing a control circuit for successive issuance, multiple blocks subsequent to the first block are issued while the instruction supply means requests and processes the instruction words of the first block stored in the buffer storage means. instruction words are stored in the buffer storage means, the instruction supply means can read out the instruction words from the buffer storage means at high speed, and the supply of instructions to the instruction processing means can be speeded up. Effective

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an information processing apparatus according to an embodiment of the present invention. In the figure, l: instruction processing means, 2: instruction supply means, 3: buffer storage means, 4: main storage means, 20: control circuit.

Claims (1)

[Scope of Claims] Main storage means for storing instruction words; instruction processing means for decoding and processing the instruction words; an instruction supplying means for reading an instruction word stored in the instruction processing means and supplying the instruction word to the instruction processing means; and a copying unit of a part of the instruction word stored in the main storage means located between the main storage means and the instruction supplying means in units of blocks. In the information processing apparatus, the instruction supplying means, when issuing a read request for an instruction word to the buffer storage means, stores information contained in each of a plurality of blocks consecutive to a block containing the instruction word. 1. An information processing device comprising: a control circuit for continuously issuing read requests for command words that are read.