JPH02260525A - Crystalline semiconductor film and its formation method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention relates to a method for forming a crystalline semiconductor film, and in particular, the present invention relates to a method of forming a crystalline semiconductor film, and in particular, to forming a plurality of semiconductor single crystals on a deposition surface by controlling their positions, The position of grain boundaries formed where crystals touch each other,
The present invention also relates to a method for forming a crystalline semiconductor film that controls the size of the semiconductor single crystal.

The present invention is applied, for example, to a method for forming a crystalline semiconductor film used in electronic devices such as semiconductor integrated circuits, magnetic circuits, optical devices, magnetic devices, piezoelectric devices, surface acoustic devices, and the like.

[Prior art and problems to be solved by the invention] In the field of SOI technology in which a semiconductor single crystal is grown on a base material such as an insulating substrate, for example, selective nucleation due to a difference in nucleation density between surface materials has been proposed. A method based on T, Yonehara et al. (19
87) Ex-tended Abstracts o
f the 19th SSDM, 191). This crystal formation method will be explained using FIG. 4. First, Figure 4(a)
As shown in FIG. 1, on a base material 1 having a surface 3 having a low nucleation density, regions 7 having a surface having a higher nucleation density than the surface 3 are arranged with a constant diameter and at regular intervals. If this substrate is subjected to a predetermined crystal formation treatment, crystal nuclei 9 of the deposit will be generated only on the surface of the region 7, but not on the surface 3 (Fig. 4 (b)
)). Therefore, the surface of region 7 is the nucleation surface (S,,L),
Surface 3 will be referred to as the non-nucleation surface (S, O,). If the nuclei 9 generated on the nucleation surface 7 are allowed to grow further, crystal grains 1 will be formed.
0 (FIG. 4(c)), grows beyond the region of the nucleation surface 7 and onto the non-nucleation surface 3, and eventually grows on the adjacent nucleation surface 7.
Grain boundaries 12 are formed in contact with crystal grains 10' that have grown from '. Conventionally, in this crystal formation method, amorphous 5isNn is used for the nucleation surface 7, SiOx is used for the non-nucleation surface 3, and a plurality of SL single crystals are formed by the CVD method (
(Refer to the above-mentioned literature), SiO□ is used as the non-nucleation surface 3, Si ions are implanted into the non-nucleation surface 3 using a focused ion beam to form a region that will become the nucleation surface 7, and the SL is formed by CVD.
An example of forming a plurality of single crystals (1988, 35th Applied Physics Conference 289-M-9) was reported.

However, when forming crystal grains using a crystal formation method that controls the formation position of these single crystals,
When using a vapor phase crystal growth method such as the CVD method in the conventional example, the following problems occur.
This poses significant difficulties in forming semiconductor integrated circuits or other devices.

In other words, when crystal growth is performed by generating crystal nuclei on the nucleation surface using a vapor phase crystal growth method such as the CVD method, the crystal growth rate in the horizontal direction (v7) and the crystal growth rate in the vertical direction with respect to the substrate are determined. The ratio V,/V, of (V,) is close to 1, and granular crystals are formed, resulting in large irregularities on the top surface.
Elements such as MoS transistors and diodes cannot be directly formed on the obtained crystal. In order to form elements, a planarization process such as etching or polishing must be introduced after the crystal formation process. However, it is necessary to shave off more than half of the upper part of the crystal to form a flat upper surface, resulting in the problem of an increase in process steps and the loss of deposited crystals and required deposition time during the flattening process. Moreover, the technology required for the planarization process has not yet been technically established in two respects: controllability of film thickness over a large area and ensuring surface flatness.

On the other hand, in recent years, several hundred to several thousand amorphous semiconductor thin films such as SL are deposited on a substrate such as an amorphous insulator substrate, and solid state thermal annealing is performed at about 600°C in N3, for example.
A method for forming a crystalline semiconductor thin film has been reported in which the amorphous semiconductor thin film is crystallized to become a polycrystalline thin film with a maximum grain size of about 5 μm (T, Noguchi, H, Haya
shi, H, 0hsin+a, Polysili-
con and Interfaces, Bosto
n, 1987. Mater.

Res, Soc, Sy+++p, Proc, vol, 1
06 (Elsevier SciencePubli
shing, New York 1988) p, 2
93) Since the surface of the crystal obtained by this method maintains the flatness of the surface of the amorphous semiconductor thin film, it is possible to form a flat crystal film without the need for surface flattening treatment. Therefore, it is possible to form elements such as MOS transistors and diodes on the polycrystalline thin film. However, in this crystal formation method, the crystal grain size is larger than that of polycrystalline silicon etc. produced by the usual LPCVD method. However, since the positions of grain boundaries are not controlled, there are problems as shown below.

For example, in a MOS transistor, the gate size is about the same as or larger than the crystal grain size, so
The gate portion may contain no grain boundaries, one grain boundary, or a plurality of grain boundaries. Electrical characteristics vary greatly between regions that do not include these grain boundaries, or between one and two grain boundaries that do include them, so in MOS transistors or other devices, there may be large changes in characteristics between elements. Variations occur, which poses a significant problem when forming integrated circuits and the like.

Therefore, an object of the present invention is to provide a crystalline semiconductor film having a flat surface and controlled positions of crystal grain boundaries, and a method for forming the same.

[Means for Solving the Problems] According to the present invention, a single-crystalline seed crystal is placed on a base material, and then an amorphous semiconductor is deposited on the base material so as to cover the seed crystal. Provided is a method for forming a crystalline semiconductor film, characterized in that the amorphous semiconductor is grown in a solid phase from the seed crystal by heat treatment at a temperature of , and a crystalline semiconductor film obtained by the method. Ru.

Hereinafter, a crystalline article and a method for forming the same according to the present invention will be explained using FIGS. 1, 2, and 3.

(1) The surface of the base material 1 is made the non-nucleation surface 3, or a thin film is deposited on the base material to make it the non-nucleation surface 3.
The nucleation surface 7 is made sufficiently small so that only a single seed crystal is formed, and placed at a desired position on the non-nucleation surface. Here, the base material may be any material and any shape as long as it is suitable for the subsequent crystal formation process, such as silicon wafers, glass substrates, quartz substrates, stainless steel, etc.

It is important that the non-nucleation surface and the nucleation surface have a difference of about 101 times in nucleation density on the surface.

When crystal-growing silicon, such materials include, for example, silicon oxide (Sin-) and silicon nitride (SiN).

In the CVD method using 5iHiClt.HCI.Ha, the nucleation density can be controlled by controlling the composition of silicon oxide or silicon nitride. The composition of silicon oxide or silicon nitride may be changed by implanting silicon ions or the like into a film with a stoichiometric ratio, or by changing the composition of a gas introduced in a plasma CVD method or the like. The component composition ratio of the resulting film may be controlled by changing the ratio of . Figure 2 shows an example of controlling the nucleation density by implanting Sl ions into silicon oxide, and Figure 3 shows an example of controlling the nucleation density by changing the composition of silicon nitride.
Further, the non-nucleation surface and the nucleation surface are not limited to these materials, and may be any material that can provide a sufficient difference in the nucleation density of the deposited materials. [Figure 1 (a)] (2) Next, the base material subjected to the treatment in (1) is subjected to a gas phase crystal formation treatment, and a single crystal of silicon such as silicon is formed only on the nucleation surface. A nucleus (seed crystal) 9 is formed. As the vapor phase crystal formation treatment, in addition to thermal CVD, plasma CVD, and vacuum evaporation, any method that can selectively form a single nucleus only on the nucleation surface may be used. [
FIG. 1(b)] (3) Next, an amorphous thin film 1 of silicon or the like is placed on the base material.
Deposit 1. The method of deposition includes thermal CVD for the nucleation.
When method D is used, an amorphous film may be deposited by lowering the reaction temperature and changing the introduced gas within the same furnace. Or, ordinary CVD method, vacuum evaporation method, plasma CVD
It is also possible to use a method such as a sputtering method or a sputtering method.

[Figure 1 (C)] (4) Next, when solid phase annealing is performed as a heat treatment, crystal growth starts from the single crystalline nucleus, and the amorphous thin film grows from the single crystalline core. It inherits the crystallinity of the nucleus and crystallizes [Fig. 1(d)]. Finally, grain boundaries 12 are formed near the perpendicular bisector of the line segment connecting the nucleation surfaces arranged on the base material, and the sizes of the grain boundaries 12 and the grains 10 are controlled. It becomes a polycrystalline film. [FIG. 1(e)] It is important to set the temperature of solid phase annealing so that no unnecessary nucleation occurs in the amorphous state other than the single nucleation during annealing.

[Example] The present invention will be explained below with reference to Examples.

Example 1 (1) First, as shown in FIG.
, its surface is the non-nucleation surface 3, and SiH*C is formed on the surface.
A silicon nitride film was deposited by 500 people by low pressure CVD using 1a and NHs. Next, SL ions were implanted at an acceleration voltage of 10 keV to 2 × I O”cm.
-" was implanted. At this time, due to the ion implantation, the silicon nitride film surface had a composition with an excess of silicon compared to the stoichiometric ratio, and the nucleation density was approximately 106 times higher than that on the quartz substrate surface. Next, by a normal resist process, this ion-implanted nitride film 5 is formed into a film with a side of 1.0 μm.
These squares were arranged in a square lattice shape with an interval of 15 μm to serve as the nucleation surface 7, and the other areas were patterned to expose the surface of the quartz substrate.

Etching treatment was then performed using RIE (reactive ion etching) to remove unnecessary portions of the nitride film.

(2) Si crystal nuclei were formed by CVD method. The deposition conditions are as follows.

Gas used (flow rate ratio): SiH*C1i/HCI/H
n ”0, 53/1.9/100.0 (1/a+in)
Substrate temperature, pressure: 1000℃, 150Torr
Deposition time: 5 m1n As a result, only one single-crystalline Si crystal grain 9 with a grain size of about 0.1 to 0.3 μm was formed on almost all of the nitride film arranged in the form of lattice points.

(3) Next, the temperature was lowered to 550° C. in the reactor in which the deposition in (2) was performed, and the introduced raw material gas was changed to SiH 4 to deposit about 500 amorphous silicon films 11.

(4) The substrate was heat-treated at 580° C. for 100 hours in a nitrogen atmosphere. As a result of observing this substrate with an electron microscope,
In the amorphous silicon film, solid-phase crystal growth occurs using the Si crystal grains as seed crystals, and grain boundaries 12 of the crystal grains 10 are formed in the vicinity of the perpendicular bisector of a line connecting adjacent crystal nuclei.
was formed.

Example 2 (1) First, in FIG. 6, a Si (100) wafer substrate was used as the base material 1, and a zero oxide silicon film with a thickness of about 1000 was formed by thermal oxidation.

Next, using a focused ion beam, Si ions are deposited on the surface of the silicon oxide film in a minute area with a diameter of 0.6 μm at an acceleration voltage of 80 μm.
Only 5×10 “cm−” was injected at keV. Sl
It is known that when the composition ratio of silicon and oxygen on the film surface is made to be in excess of the stoichiometric ratio by ion implantation, the nucleation density increases. The formation density is 1 for the non-nucleation surface 3.
It was about 0.01 times.

(2) Si crystal nuclei were formed by CVD method. The deposition conditions are as follows.

Gas used (flow rate ratio): S18mC1*/HCI/H
0, 53/1.8/100.0 (1/5in) Substrate temperature, pressure 71000℃, 150Torr Deposition time: 10inch Only one single-crystalline Si crystal grain 9 of about 0.5-1 μm was formed.

(3) 2000 amorphous Si films were deposited by sputtering.

(4) The substrate was heat-treated at 580° C. for 110 hours in a nitrogen atmosphere. As a result of observing this substrate with an electron microscope,
In the amorphous silicon film, solid-phase crystal growth occurs using the S1 crystal grain as a seed crystal, and grain boundaries of crystal grains 10 are formed in the vicinity of the perpendicular bisector of a line connecting adjacent crystal nuclei. 1
2 was formed.

Example 3 (1) First, in Fig. 7, a high melting point glass substrate was used as the base material 1, and a silicon nitride film was deposited on the surface by 500 people by low pressure CVD using SiH*Clt and NHm. By implanting Si ions into the
Only 2 x 10 "cm" was implanted at 0 keV. At this time, due to the ion implantation, the silicon nitride film surface has a composition with an excess of silicon compared to the stoichiometric ratio, and the nucleation density is approximately 101 times higher than that of the silicon oxide surface. By the CVD method used,
Silicon oxide film (thin film made of material that serves as a non-nucleation surface)
This ion-implanted nitride film 5 is formed with a thickness of 2.0 μm on each side using a zero-order normal resist process in which 1,000 layers of nitride film 2 are deposited.
m square, which was exposed as a nucleation surface 7 arranged in the form of square lattice points with an interval of 15 μm, and the other areas were buttered to leave a silicon oxide film (this surface is the non-nucleation surface 3). . Then, wet etching treatment was performed to remove unnecessary portions of the silicon oxide film.

(2) Si crystal nuclei were formed by CVD method. The deposition conditions are as follows.

Gas used (flow rate ratio): SiH*C1m/HCI/H
a ”0, 53/1.8/100.0 (1/+ll1
n) Substrate temperature, pressure 71000°C, 150 Tor
r Deposition time: 15 m1n As a result, only one single-crystalline St crystal grain with a grain size of approximately 0.5-1.5 μm was formed on almost all of the nitride film arranged in the form of lattice points.

(3) Next, about 2000 amorphous silicon films 11 were deposited by vacuum evaporation using an electron beam in an ultra-high vacuum.

(4) The substrate was heat-treated at 590° C. for 120 hours in a nitrogen atmosphere. As a result of observing this substrate with an electron microscope,
In the amorphous silicon film, solid-phase crystal growth occurs using the S1 crystal grain as a seed crystal, and grain boundaries 12 of the crystal grains 10 are formed near the perpendicular bisector of a line connecting adjacent crystal nuclei.
was formed.

[Effects of the Invention] According to the method for forming a crystalline semiconductor thin film according to the present invention, an amorphous semiconductor film can be crystal-grown in a solid phase using a single-crystalline seed crystal formed on a nucleation surface as a starting point. As a result, a crystalline film with controlled grain boundary positions and a flat surface can be obtained, so there is no need for a flattening process such as etching or polishing. Furthermore, since the grain boundary positions are controlled, elements such as MOS transistors, which have characteristics such as mobility that are equivalent to those on bulk single crystals, are placed on a substrate such as an insulator at positions that do not involve grain boundaries on the crystalline thin film. Further, since none of the elements have grain boundaries, the variation in characteristics is small, so even when an integrated circuit is constructed, it operates stably and with high yield.

[Brief explanation of drawings]

FIGS. 1(a) to 1(e) are diagrams illustrating the steps of forming a crystalline article by the method of the present invention. FIG. 2 is a diagram illustrating the relationship between the nucleation density when the composition of silicon oxide is changed by ion implantation. FIG. 3 is a diagram illustrating the relationship between the composition of silicon nitride and the nucleation density. FIG. 4 is a cross-sectional diagram illustrating a method of forming a crystalline article according to the prior art. FIG. 5 is a diagram illustrating the process of forming a crystal article according to the method of the present invention in Example 1. FIG. 6 is a diagram illustrating the process of forming a crystal article according to the method of the present invention in Example 2. FIG. 7 is a diagram illustrating the process of forming a crystal article according to the method of the present invention in Example 3. l: Base material 2: Thin film 3 made of material that will be a non-nucleation surface:
Non-nucleation surface 5.5': Ion-implanted nitride film 7.7°: Nucleation surface 9.9°: Nucleus (seed crystal) 10, 10°: Crystal grain: Amorphous body: Grain boundary

Claims (1)

[Claims] 1. After placing a single-crystalline seed crystal on a base material and then depositing an amorphous semiconductor on the base material so as to cover the seed crystal, heat treatment is performed at a temperature below the melting point. A method for forming a crystalline semiconductor film, characterized in that the amorphous semiconductor is crystal-grown in a solid phase from the seed crystal. 2. Single-crystalline seed crystals are formed by nucleation in a region small enough to form single-crystalline seed crystals when vapor phase crystal growth is performed on the non-nucleation surface covering the surface of the underlying material. 2. The method of forming a crystalline semiconductor film according to claim 1, wherein the seed crystal is a single-crystalline seed crystal formed on the nucleation surface by applying a vapor phase crystal growth method to a substrate having a surface. 3. The method of forming a crystalline semiconductor film according to claim 1, wherein the temperature of the heat treatment is such that crystal growth can occur from the seed crystal as a starting point, but no nuclei can be generated in the amorphous semiconductor. 4. The method of forming a crystalline semiconductor film according to any one of claims 1 to 3, wherein the amorphous semiconductor is silicon. 5. A crystalline semiconductor film obtained by the method according to claims 1 to 4.