JPH03132016A - Method of forming crystal - Google Patents

Method of forming crystal

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Publication number
JPH03132016A
JPH03132016A JP26911289A JP26911289A JPH03132016A JP H03132016 A JPH03132016 A JP H03132016A JP 26911289 A JP26911289 A JP 26911289A JP 26911289 A JP26911289 A JP 26911289A JP H03132016 A JPH03132016 A JP H03132016A
Authority
JP
Japan
Prior art keywords
nucleation
crystal
forming
iii
nucleation surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26911289A
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Japanese (ja)
Inventor
Hiroyuki Tokunaga
博之 徳永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP26911289A priority Critical patent/JPH03132016A/en
Publication of JPH03132016A publication Critical patent/JPH03132016A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はIII −V族化合物結晶およびその形成法に
関し、特に堆積面材料の種類による堆積材料の核形成密
度の差を利用して作成したIII −V族化合物単結晶
ないし粒径が制御されたIII −V族化合物多結晶の
形成方法に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a III-V group compound crystal and a method for forming the same, and in particular, a crystal formed by utilizing the difference in the nucleation density of the deposited material depending on the type of the deposition surface material. The present invention relates to a method for forming a III-V group compound single crystal or a III-V group compound polycrystal with controlled particle size.

本発明は、例えば半導体集積回路、光集積回路、光素子
等に使用される単結晶や多結晶等の結晶の形成に適用さ
れる。
The present invention is applied to the formation of crystals such as single crystals and polycrystals used for, for example, semiconductor integrated circuits, optical integrated circuits, optical devices, and the like.

[従来の技術] 従来、半導体電子素子や光素子等に用いられる単結晶薄
膜は、単結晶基板上にエピタキシャル成長させることで
形成されていた。例えば、Si単結晶基板(シリコンウ
ェハ)上には、SL、 Ge、 GaAs等を液相、気
相または固相からエピタキシャル成長することが知られ
ており、またGaAs単結晶基板上にはGaAs、 G
aAlAs等の単結晶がエピタキシャル成長することが
知られている。このようにして形成された半導体薄膜を
用いて、半導体素子および集積回路、半導体レーザーや
LED等の発光素子等が作製される。
[Prior Art] Conventionally, single-crystal thin films used in semiconductor electronic devices, optical devices, and the like have been formed by epitaxial growth on single-crystal substrates. For example, it is known that SL, Ge, GaAs, etc. are epitaxially grown on a Si single crystal substrate (silicon wafer) from a liquid phase, gas phase, or solid phase, and GaAs, Ge, etc. are grown on a GaAs single crystal substrate (silicon wafer).
It is known that single crystals such as aAlAs can be epitaxially grown. Using the semiconductor thin film thus formed, semiconductor elements, integrated circuits, light emitting elements such as semiconductor lasers and LEDs, etc. are manufactured.

また、最近、二次元電子ガスを用いた超高速トランジス
タや、量子井戸を利用した超格子素子等の研究開発が盛
んであるが、これらを可能にしたのは、例えば超高真空
を用いたMBE (分子線エピタキシー)やMOCVD
 (有機金属化学気相法)等の高精度エピタキシャル技
術である。
In addition, recently there has been much research and development into ultrahigh-speed transistors using two-dimensional electron gas and superlattice devices using quantum wells. (molecular beam epitaxy) and MOCVD
(organometallic chemical vapor phase method) and other high-precision epitaxial technologies.

このような単結晶基板上のエピタキシャル成長では、基
板の単結晶材料とエピタキシャル成長層との間に、格子
定数と熱膨張係数とを整合をとる必要がある。この整合
が不十分であると格子欠陥がエピタキシャル層に発達す
る。また基板を構成する元素がエピタキシャル層に拡散
することもある。
In such epitaxial growth on a single crystal substrate, it is necessary to match the lattice constant and thermal expansion coefficient between the single crystal material of the substrate and the epitaxial growth layer. If this alignment is insufficient, lattice defects will develop in the epitaxial layer. Additionally, elements constituting the substrate may diffuse into the epitaxial layer.

このように、エピタキシャル成長による従来の単結晶薄
膜の形成方法は、その基板材料に太き(依存することが
分る。Mathews等は、基板材料とエピタキシャル
成長層との組合せを調べている(EPITAXIAL 
GROWTH,Academic Press、 Ne
w York。
In this way, it can be seen that the conventional method of forming a single crystal thin film by epitaxial growth is highly dependent on the substrate material.Mathews et al.
GROWTH, Academic Press, Ne
w York.

1975 ed、by J、W、Mathews)。1975 ed. by J.W. Mathews).

また、基板の大きさは、現在Siウェハで6インチ程度
であり、GaAs、サファイア基板の大型化は更に遅れ
ている。加えて、単結晶基板は製造コストが高いために
、チップ当りのコストが高くなる。
Furthermore, the size of the substrate is currently about 6 inches for Si wafers, and the increase in the size of GaAs and sapphire substrates is even slower. In addition, single crystal substrates are expensive to manufacture, resulting in a high cost per chip.

このように、従来の方法によって、良質な素子が作製可
能な単結晶層を形成するには、基板材料の種類が極めて
狭い範囲に限定されるという問題点を有していた。
As described above, in order to form a single-crystal layer from which a high-quality device can be manufactured by the conventional method, there is a problem in that the types of substrate materials are limited to an extremely narrow range.

一方、半導体素子を基板の法線方向に積層形成し、高集
積化および多機能化を達成する三次元集積回路の研究開
発が近年盛んに行われており、また安価なガラス上に素
子をアレー状に配列する太陽電池や液晶画素のスイッチ
ングトランジスタ等の大面積半導体装置の研究開発も年
々盛んになりつつある。
On the other hand, research and development of three-dimensional integrated circuits, in which semiconductor elements are stacked in the normal direction of a substrate to achieve high integration and multi-functionality, has been actively conducted in recent years, and there has also been active research and development in three-dimensional integrated circuits, in which semiconductor elements are stacked in the normal direction of a substrate. Research and development of large-area semiconductor devices, such as solar cells arranged in a pattern and switching transistors for liquid crystal pixels, is becoming more active year by year.

これら両者に共通することは、半導体薄膜を非晶質絶縁
物上に形成し、そこにトランジスタ等の電子素子を形成
する技術を必要とすることである。その中でも特に、非
晶質絶縁物上に高品質の単結晶半導体を形成する技術が
望まれている。
What these two methods have in common is that they require a technique for forming a semiconductor thin film on an amorphous insulator and forming electronic elements such as transistors thereon. Among these, a technique for forming a high quality single crystal semiconductor on an amorphous insulator is particularly desired.

−膜内に、SiO□等の非晶質絶縁物基板上に薄膜を堆
積させると、基板材料の長距離秩序の欠如によって、堆
積膜の結晶構造は非晶質または多結晶となる。ここで非
晶質膜とは、最近接原子程度の近距離秩序は保存されて
いるが、それ以上の長距離秩序はない状態のものであり
、多結晶膜とは、特定の結晶方位を持たない単結晶粒が
粒界で隔離されて集合したものである。
- When depositing a thin film on an amorphous insulating substrate such as SiO□, the crystal structure of the deposited film becomes amorphous or polycrystalline due to the lack of long-range order in the substrate material. Here, an amorphous film is one in which short-range order at the level of the nearest neighbor atoms is preserved, but no longer-range order, and a polycrystalline film is one that has a specific crystal orientation. It is a collection of single crystal grains separated by grain boundaries.

例えば、SiO□上にSLをCVD法によって形成する
場合、堆積温度が約600℃以下であれば非晶質シリコ
ンとなり、それ以上の温度であれば粒径が数百〜数千人
の間で分布した多結晶シリコンとなる。ただし、多結晶
シリコンの粒径およびその分布は形成方法によって大き
く変化する。
For example, when forming SL on SiO□ by the CVD method, if the deposition temperature is below about 600°C, it will become amorphous silicon, and if the temperature is higher than that, the grain size will be between several hundred and several thousand. This results in distributed polycrystalline silicon. However, the grain size and distribution of polycrystalline silicon vary greatly depending on the formation method.

更に、非晶質または多結晶膜をレーザや棒状ヒータ等の
エネルギビームによって溶融固化させることによって、
ミクロンあるいはミリメートル程度の大粒径の多結晶薄
膜が得られている(Single−crystal 5
ilicon on non−single−crys
talinsulators、Journal of 
Crystal Growth vol。
Furthermore, by melting and solidifying the amorphous or polycrystalline film using an energy beam such as a laser or a rod-shaped heater,
Polycrystalline thin films with large grain sizes on the order of microns or millimeters have been obtained (Single-crystal 5
ilicon on non-single-crys
talinsulators, Journal of
Crystal Growth vol.

63、 No、3.0ctober 1983 edi
ted by G、 W。
63, No, 3.0ctober 1983 edi
ted by G, W.

Cu1len)。Cullen).

このようにして形成された各結晶構造の薄膜にトランジ
スタを形成し、その特性から電子易動度を測定すると、
非晶質シリコンでは〜0.1 cm” /V・sec、
数百人の粒径を有する多結晶シリコンでは1〜10cm
”/V−sec 、溶融固化による大粒径の多結晶シリ
コンでは単結晶シリコンの場合と同程度の易動度が得ら
れている。
When a transistor is formed in the thin film of each crystal structure formed in this way and the electron mobility is measured from its characteristics,
~0.1 cm”/V・sec for amorphous silicon,
1-10 cm for polycrystalline silicon with a grain size of several hundred
”/V-sec, large-grain polycrystalline silicon obtained by melting and solidification has a mobility comparable to that of single-crystal silicon.

この結果から、結晶粒内の単結晶領域に形成された素子
と、粒界にまたがって形成された素子とは、その電気的
特性に大きな差異のあることが分る。すなわち、従来法
で得られていた非晶質上の堆積膜は非晶質または粒径分
布をもった多結晶構造となり、そこに作製された素子は
、単結晶層に作製された素子に比べて、その性能が大き
く劣るものとなる。そのために、用途としては簡単なス
イッチング素子、太陽電池、光電変換素子等に限られる
This result shows that there is a large difference in electrical characteristics between an element formed in a single crystal region within a crystal grain and an element formed across a grain boundary. In other words, the deposited film on an amorphous layer obtained by the conventional method has an amorphous or polycrystalline structure with a grain size distribution, and the devices fabricated there have a higher level of performance than those fabricated on a single crystal layer. As a result, its performance will be greatly degraded. Therefore, its applications are limited to simple switching elements, solar cells, photoelectric conversion elements, etc.

また、溶融固化によって大粒径の多結晶薄膜を形成する
方法は、ウェハごとに非晶質または単結晶薄膜をエネル
ギビームで走査するために、大粒径化に多大な時間を要
し、量産性に乏しく、また大面積化に向かないという問
題点を有していた。
In addition, the method of forming polycrystalline thin films with large grain sizes by melting and solidifying requires a large amount of time to increase the grain size because the amorphous or single crystal thin film is scanned with an energy beam on each wafer. It has the problem that it has poor performance and is not suitable for large-area applications.

方、III −V族化合物半導体は、超高速デバイス、
光素子などの、SLでは実現できない新しいデバイスを
実現し得る材料として期待されているが、III −V
族化合物結晶は、これまでSi単結晶上あるいはIII
 −V族化合物単結晶上にしか成長させることができず
、デバイス作製上の大きな障害となっていた。
On the other hand, III-V compound semiconductors can be used for ultra-high-speed devices,
III-V is expected to be a material that can realize new devices such as optical devices that cannot be realized with SL.
Group compound crystals have so far been produced on Si single crystals or III
It can only be grown on single crystals of -V group compounds, which has been a major obstacle in device fabrication.

上記従来の問題点を解決するものとして、本発明者は核
形成密度の小さい非核形成面に該非核形成面材料より核
形成密度が十分に大きく、かつ単一の核だけが成長する
程度に十分微細な核形成面が設けられ、該核形成面に成
長した単一の核を中心として成長を続けさせることによ
って結晶を形成する形成方法を提案し、非単結晶基体上
にもIII −V族化合物単結晶形成が可能なことを示
した。
In order to solve the above-mentioned conventional problems, the present inventor has proposed that the nucleation density is sufficiently higher than that of the non-nucleation surface material on a non-nucleation surface with a low nucleation density, and is sufficient to the extent that only a single nucleus grows. We proposed a formation method in which a fine nucleation surface is provided and a crystal is formed by continuing growth centered on a single nucleus grown on the nucleation surface. It was shown that single crystal formation of the compound is possible.

この形成方法は、結晶成長して単結晶となる核を所望の
距離まで人工的に離別させて、選択的に形成させ、必要
な大きさの結晶領域に成長させるまで結晶粒の接触・衝
突を回避するものである。
This formation method involves artificially separating the nuclei that will grow into a single crystal to a desired distance, allowing them to form selectively, and then contacting and colliding the crystal grains until they grow into a crystal region of the required size. It is something to avoid.

結晶成長の方法としては、成長速度が速(量産性に優れ
、結晶性が良好な有機金属化学輸送法(MOCVD法)
が主に用いられる。
As a crystal growth method, the metal organic chemical transport method (MOCVD method) has a fast growth rate (excellent mass productivity and good crystallinity).
is mainly used.

一方、GaAsの単結晶基板と5102+ 5INXI
 WSIXなどのマスク材料を用いたGaAsの単結晶
の選択成長については多くの研究が報告されている。そ
の中で、■族と■族の原料のモル比とマスク上のGaA
s多結晶粒の析出の関係についてT、HAGA、 K、
旧RUMAらが電子通信情報学会技報(ED88−82
. P、 29)で報告している。それによればGaA
s単結晶にSing 、WSixのマスクを用いた系に
おいては、径においては原料のV / IIIのモル比
が大きい場合にはWsLマスク上にGaAs多結晶粒の
核発生が見られV/Inのモル比が小さい場合にはSi
O□マスク上にGaAs多結晶粒の核発生が見られれる
。しかし、上記報文には結晶成長中にV/Iのモル比を
変動させることによる影響、効果については記載されて
いなかった。
On the other hand, GaAs single crystal substrate and 5102+ 5INXI
Many studies have been reported on the selective growth of GaAs single crystals using mask materials such as WSIX. Among them, the molar ratio of group ■ and group ■ raw materials and the GaA on the mask
Regarding the relationship between precipitation of polycrystalline grains, T, HAGA, K,
Former RUMA et al.
.. It is reported in p. 29). According to it, GaA
In the system using Sing and WSix masks for the S single crystal, when the V/III molar ratio of the raw material is large, nucleation of GaAs polycrystalline grains is observed on the WsL mask, and the V/In ratio is large. When the molar ratio is small, Si
Nucleation of GaAs polycrystalline grains is observed on the O□ mask. However, the above report did not describe the influence or effect of varying the V/I molar ratio during crystal growth.

[発明が解決しようとしている課題] しかしながら、上記の非核形成面に微細な核形成面を設
けて結晶を形成させる方法は、MOCVD法により微細
な核形成面上の核発生を制御するのには不十分な点もあ
り、非核形成面上に核発生が起きたり、核形成面上に核
発生が起きなかったりするなどの課題が生ずることがあ
った。
[Problems to be Solved by the Invention] However, the above method of forming crystals by providing a fine nucleation surface on a non-nucleation surface is not suitable for controlling nucleation on a fine nucleation surface by the MOCVD method. There were also some inadequacies, and problems such as nucleation occurring on the non-nucleation surface or no nucleation occurring on the nucleation surface occurred.

従って、本発明者の目的は、核形成初期段階と結晶成長
段階にそれぞれ適応した成長条件を設定することによっ
て、非核形成面上の制御されない核の発生を抑え、良質
のIII −V族化合物単結晶を成長する方法を提供す
ることにある。
Therefore, the inventor's objective is to suppress the uncontrolled generation of nuclei on non-nucleation surfaces and to produce high-quality III-V compound monomers by setting growth conditions that are suitable for the initial stage of nucleation and the stage of crystal growth. The objective is to provide a method for growing crystals.

[課題を解決するための手段] 上記問題点を解決するものとして、有機金属化学輸送法
によるIII −V族化合物の結晶の形成方法において
、核形成密度の小さい非核形成面と、該非核形成面の核
形成密度より大きい核形成密度を有し、結晶成長して単
結晶になる核が唯一形成され得るに十分小さい面積を有
する核形成面とが隣接して配された自由表面を有する基
体に、核形成初期段階では原料ガス中の周期律表第V族
原子と第III族原子との比率V / IIIを高くし
、かつ結晶成長段階では比率V / Illを核形成初
期段階より低(する結晶成長処理を施すことを特徴とす
る結晶の形成方法が提供される。
[Means for Solving the Problems] In order to solve the above problems, in a method for forming a crystal of a group III-V compound by an organometallic chemical transport method, a non-nucleation surface with a low nucleation density, and a non-nucleation surface of the non-nucleation surface are provided. A substrate having a free surface adjacent to a nucleation surface having a nucleation density greater than the nucleation density of At the initial stage of nucleation, the ratio V/III of Group V atoms to Group III atoms of the periodic table in the raw material gas is made high, and at the crystal growth stage, the ratio V/Ill is lowered (lower than the initial stage of nucleation). A method for forming a crystal is provided, which comprises performing a crystal growth treatment.

本発明の結晶の形成方法は、非核形成面、核形成面、結
晶表面のそれぞれの面における結晶材料の原子の付着係
数X、Y、Zがz>y>xなる関係があることから、非
核形成面に設けられた核形成面に単一の核が形成される
核形成初期段階においては、核形成の選択性を高くする
ために、■族とIll族原料の比率V / Inを高く
する。そして、核形成面上への核形成が完了し、非核形
成面上への横方向成長が始まった段階(結晶成長段階)
になったら、V / mを下げて結晶成長をさせるもの
である。
The crystal formation method of the present invention is based on the fact that the adhesion coefficients X, Y, and Z of atoms of the crystal material on each of the non-nucleation surface, the nucleation surface, and the crystal surface have a relationship such that z>y>x. In the initial stage of nucleation, in which a single nucleus is formed on the nucleation surface provided on the nucleation surface, the ratio V/In of the group ■ and group Ill raw materials is increased in order to increase the selectivity of nucleation. . Then, the stage where nucleation on the nucleation surface is completed and lateral growth begins on the non-nucleation surface (crystal growth stage)
When this happens, V/m is lowered to allow crystal growth.

次に、非核形成面上での結晶核の発生とV / 111
モル比の関係について説明する。
Next, the generation of crystal nuclei on the non-nucleation surface and V/111
The relationship between molar ratios will be explained.

第4図に、各種の膜上におけるGaAs結晶核の発生密
度とV / 111モル比の関係を示す。
FIG. 4 shows the relationship between the density of GaAs crystal nuclei generated on various films and the V/111 molar ratio.

成長条件 トリメチルガリウム(TMG) アルシン(AsH−) 反応圧力   80torr 基板温度   640℃ 成長時間   5分 第4図から明らかなように、核形成密度の高い材料(例
えばAlaOs、 Ta20g)はV / 111モル
比を大きく変化させても核形成密度の変化は小さいが、
核形成密度の低い材料(例えばSiO□、 313N4
 )はV / 111モル比と核形成密度に強い相関を
持っている。特に高いV/IIIモル比の領域ではA1
.0.。
Growth conditions Trimethylgallium (TMG) Arsine (AsH-) Reaction pressure 80 torr Substrate temperature 640°C Growth time 5 minutes As is clear from Figure 4, materials with high nucleation density (e.g. AlaOs, Ta20g) have a V/111 molar ratio. Although the change in nucleation density is small even if
Materials with low nucleation density (e.g. SiO□, 313N4
) has a strong correlation between the V/111 molar ratio and the nucleation density. Especially in the region of high V/III molar ratio, A1
.. 0. .

Ta=Osと5iOa、 5isN4の間の核形成密度
の差はかなり太き(なり、良好な選択性が得られること
がわかる。
The difference in nucleation density between Ta=Os, 5iOa, and 5isN4 is quite large, indicating that good selectivity can be obtained.

次に、本発明の実施態様を図面により説明する。Next, embodiments of the present invention will be described with reference to the drawings.

第1図(A)〜(E)は本発明の方法により選択的核形
成を行ない■−v族化合物の単結晶を成長させる概略工
程図である。
FIGS. 1(A) to 1(E) are schematic process diagrams for growing single crystals of group 1-v compounds by selective nucleation according to the method of the present invention.

(A):下地材料1 (たとえばA1□03.AIN、
 BNなどのセラミック、石英、高融点ガラスやW、M
(A): Base material 1 (for example, A1□03.AIN,
Ceramics such as BN, quartz, high melting point glasses, W, M
.

などの高融点金属)上に結晶核形成密度の低い材料から
なる薄膜2(例えば非晶質、多結晶質等の非単結晶質の
Sin、 5ixN4など)を堆積し非核形成面3とす
る。この薄膜の形成にはCVD法、スパッター法、蒸着
法、分散媒を使った塗布法などの方法を用いる。また、
第1図(F)のように下地材料lを用いず前記核形成密
度の低い材料からなる支持体5を用いてもよい((第1
図(A))(B):非核形成面より核形成密度の高い材
料(非単結晶質のAl2O3,AIN、 Taxes、
 Ti0z、WO2など)を結晶成長して単結晶となる
核を唯一形成され得るに十分な程小さい面積(好ましく
は10μm四方以下、最適には2μm四方以下)を形成
し核形成面4とする。また、このように薄膜を微細にパ
ターニングする他、第1図(G)のように下地に核形成
密度の高い材料からなる薄膜6を堆積し、その上に核形
成密度の低い材料からなる薄膜2を積み重ね非核形成面
3とし、エツチングにより微細な窓を開けて核形成面4
を露出させてもよく、第1図(H)のように核形成密度
の低い材料からなる薄膜2に凹部を形成し、その凹部の
底面に微細な窓を開けて核形成面4を露出させてもよい
(この場合前記凹部内に結晶を形成させる)。
A thin film 2 made of a material with a low crystal nucleation density (for example, amorphous, polycrystalline, non-single-crystalline Sin, 5ixN4, etc.) is deposited on the non-nucleation surface 3. A method such as a CVD method, a sputtering method, a vapor deposition method, or a coating method using a dispersion medium is used to form this thin film. Also,
As shown in FIG. 1(F), the support 5 made of the material with low nucleation density may be used without using the base material 1 ((first
Figures (A)) (B): Materials with higher nucleation density than non-nucleation surfaces (non-single crystal Al2O3, AIN, Taxes,
Ti0z, WO2, etc.) is grown to form a sufficiently small area (preferably 10 μm square or less, optimally 2 μm square or less) to form a single single crystal nucleus, and this is used as the nucleation surface 4. In addition to finely patterning the thin film in this way, as shown in FIG. 2 are stacked to form a non-nucleation surface 3, and fine windows are opened by etching to form a nucleation surface 4.
Alternatively, as shown in FIG. 1 (H), a recess is formed in the thin film 2 made of a material with a low nucleation density, and a minute window is opened at the bottom of the recess to expose the nucleation surface 4. (in this case, crystals are formed within the recess).

さらに、第1図(I)〜(T)のように微細な領域を残
し他をレジスト7でカバーし、イオン(As 、P、 
Ga 、Al 、Inなど)を核形成密度の低い材料か
らなる薄膜2に打込んで、核形成密度の高いイオン打込
領域8を形成してもよい。(第1図(B)) (C):こうして得られた基板上に、MOCVD法によ
ってIII −V族化合物(例えばGaAs、 GaA
lAs。
Furthermore, as shown in FIG. 1 (I) to (T), leaving a fine region and covering the rest with resist 7, ions (As, P,
The ion implantation region 8 with a high nucleation density may be formed by implanting ions (Ga, Al, In, etc.) into the thin film 2 made of a material with a low nucleation density. (Figure 1 (B)) (C): On the substrate thus obtained, a III-V compound (e.g. GaAs, GaA
lAs.

GaP、 GaAsP、 InP、GaInAsP)結
晶核9を発生させる。この核形成初期段階(発生した核
の底面積が核形成面よりも小さい間)では、V / 1
11モル比は高くして(■練原料が液体有機原料の場合
、好ましくは10以上、より好ましくは20以上、最適
には30以上;気体原料の場合、好ましくは30以上、
より好ましくは45以上、最適には60以上)■族原子
の欠乏による欠陥の発生を抑える。(第1図(C)) (D):III−V族化合物結晶核9が成長したIII
 −V族化合物単結晶IOが核形成面4の面積より広が
って成長する段階(結晶成長段階)になったら、V /
 111モル比は前記核形成初期段階のV/II+の値
よりも低く (V族が液体有機原料の場合、好ましくは
5以上、より好ましくは7以上、最適には15以上。気
体原料の場合、好ましくは20以上、より好ましくは3
5以上、最適には40以上。)設定を変更しV練原料を
効率よ(利用し、無駄に消費することを避ける。(第1
図(D))(E):核を中心にIII−V族化合物結晶
の成長を進め、非核形成面上へ横方向に結晶を成長させ
ていく。
GaP, GaAsP, InP, GaInAsP) crystal nuclei 9 are generated. At this early stage of nucleation (while the basal area of the generated nucleus is smaller than the nucleation surface), V/1
11 molar ratio should be high (i. If the raw material is a liquid organic raw material, preferably 10 or more, more preferably 20 or more, optimally 30 or more; if the raw material is a gaseous raw material, preferably 30 or more,
(more preferably 45 or more, optimally 60 or more) to suppress the occurrence of defects due to the deficiency of group (II) atoms. (Figure 1(C)) (D): III-V compound crystal nucleus 9 has grown
- When the group V compound single crystal IO grows to expand beyond the area of the nucleation surface 4 (crystal growth stage), V/
The 111 molar ratio is lower than the value of V/II+ at the initial stage of nucleation (if group V is a liquid organic raw material, preferably 5 or more, more preferably 7 or more, optimally 15 or more; in the case of a gaseous raw material, Preferably 20 or more, more preferably 3
5 or more, optimally 40 or more. ) Change the settings to make efficient use of the V-kneading material and avoid wasting it. (1st
Figures (D)) and (E): Group III-V compound crystals grow around the nucleus, and the crystals grow laterally on the non-nucleation surface.

前述のしたように、結晶表面、核形成面、非核形成面の
それぞれの面における結晶材料の原子の付着係数をそれ
ぞれx、y、zとおくと次のような関係となる。
As described above, when the adhesion coefficients of atoms of the crystal material on each of the crystal surface, nucleation surface, and non-nucleation surface are respectively expressed as x, y, and z, the following relationships are obtained.

x>y>z 核形成初期段階においては、結晶材料の原子に対する表
出面は、非核形成面及び核形成面だけである。そのため
、核は選択的に核形成面上で形成される。続いて、核が
成長し核形成面を覆いつくしてしまうと、そこには結晶
表面と非核形成面のみが存在するようになるので核発生
の選択性はさらに高くなる。さらに結晶が成長しその表
面積が大きくなるに従い、さらに選択性は高くなるので
、非核形成面上の制御されない核発生はほとんど起らな
(なる。つまり、選択性を維持する条件は、結晶の成長
につれて徐々に変化する。
x>y>z At the initial stage of nucleation, the only exposed surfaces for the atoms of the crystalline material are the non-nucleation surface and the nucleation surface. Therefore, nuclei are selectively formed on the nucleation surface. Subsequently, when the nucleus grows and completely covers the nucleation surface, only the crystal surface and non-nucleation surface exist, and the selectivity of nucleation becomes even higher. Furthermore, as the crystal grows and its surface area increases, the selectivity becomes even higher, so that uncontrolled nucleation on non-nucleating surfaces becomes almost impossible (i.e., the conditions for maintaining selectivity are It changes gradually over time.

従って、選択性を制御する製造条件である■/IIIも
連続的に変化させることも好ましい。
Therefore, it is also preferable to continuously change the production conditions (1)/III which control the selectivity.

また最適の堆積条件は、非核形成面上への核形成面の配
置の形態や、密度によっても異ってくる。(第1図(E
)) [実施例] 以下、本発明を実施例により説明する。
Optimal deposition conditions also vary depending on the arrangement and density of the nucleation surface on the non-nucleation surface. (Figure 1 (E
)) [Examples] The present invention will be explained below using Examples.

実施例1 第2図(A)〜(F)に、本発明の方法によりGaAs
結晶を形成する概略工程図を示す。
Example 1 FIGS. 2(A) to 2(F) show that GaAs was produced by the method of the present invention.
A schematic process diagram for forming crystals is shown.

(A)二石英基板11の上に真空蒸着法によってTa2
’s膜12を1500人堆積した。蒸着条件は、基板温
度は室温、蒸着源はTa2es 、 O□ガスを4×1
0−’torrまで導入し、堆積速度1人/seeであ
った。(第2図(A)) (B)二次にプラズマCVD法で非晶質SiNx膜13
を300人堆積した。堆積条件は基板温度350℃、反
応圧力0.2torr、原料ガスは5iH4100cc
、NHs 200ccであった。(第2図(B))(C
):フォトリソグラフィー技術を使ってパターニングし
、リアクティブイオンエツチングによってSiNx膜1
3を部分的に取り去って、60μmの間隔で2μm四方
の微細な窓14を作りTa、0゜を露出させた。この部
分がGaAsの核形成面4となる。(第2図(C)) (D):H,雰囲気で850℃、10分間の熱処理を行
い、次にMOCVD法によってGaAs結晶核15をT
agOs上に発生させた。
(A) Ta2 is deposited on the diquartz substrate 11 by vacuum evaporation method.
's film 12 was deposited by 1,500 people. The evaporation conditions were: the substrate temperature was room temperature, the evaporation source was Ta2es, and the O□ gas was 4×1.
It was introduced down to 0-'torr, and the deposition rate was 1 person/see. (Fig. 2 (A)) (B) Amorphous SiNx film 13 is secondarily formed by plasma CVD method.
300 people deposited. The deposition conditions were a substrate temperature of 350°C, a reaction pressure of 0.2 torr, and a raw material gas of 5iH4100cc.
, NHs 200cc. (Figure 2 (B)) (C
): The SiNx film 1 is patterned using photolithography and reactive ion etching.
3 was partially removed to create fine windows 14 of 2 μm square at 60 μm intervals to expose Ta at 0°. This portion becomes the nucleation surface 4 of GaAs. (Fig. 2 (C)) (D): Heat treatment was performed at 850°C for 10 minutes in an H atmosphere, and then the GaAs crystal nuclei 15 were removed by the MOCVD method.
was generated on agOs.

原料にはトリメチルガリウム(TMG)とターシャルブ
チルアルシン(TBAs)、希釈ガスにはH2を用いた
。原料ガスのモル比TMG : TBAsはl:35で
、反応圧力80torr、基板温度670℃であった。
Trimethyl gallium (TMG) and tertiary butyl arsine (TBAs) were used as raw materials, and H2 was used as a diluent gas. The molar ratio of raw material gases TMG:TBAs was 1:35, the reaction pressure was 80 torr, and the substrate temperature was 670°C.

(第2図(D)) (E):成長開始後約10分でGaAsの結晶核15が
成長したGaAs単結晶16がTa1lsの窓14の領
域を埋めたところで、反応圧力を150torrに上げ
、TMGとTBAsの比を1=20に設定変更した。
(Fig. 2 (D)) (E): About 10 minutes after the start of growth, when the GaAs single crystal 16 in which the GaAs crystal nucleus 15 had grown filled the region of the Ta1ls window 14, the reaction pressure was increased to 150 torr. The ratio of TMG and TBAs was changed to 1=20.

(第2図(E)) (F):さらにGaAsの単結晶16が成長を続は他の
GaAs単結晶との粒界17を形成し、結晶径が60μ
mになったところで成長を止めた。(第2図(F))つ
いで表面を研磨により平坦化した後でInSnの電極を
蒸着により付け、Ar中で500℃でアニールした。こ
れを用いてホール測定をしたところ、ホール移動度24
00cm”/Vs(300K ) 、キャリア濃度8 
X 10”70m”のn型の結晶が得られていることが
分った。
(Figure 2 (E)) (F): As the GaAs single crystal 16 continues to grow, it forms grain boundaries 17 with other GaAs single crystals, and the crystal diameter becomes 60 μm.
It stopped growing when it reached m. (FIG. 2(F)) After the surface was flattened by polishing, an InSn electrode was attached by vapor deposition, and annealing was performed at 500° C. in Ar. When Hall measurements were performed using this, the Hall mobility was 24
00cm”/Vs (300K), carrier concentration 8
It was found that an n-type crystal of X 10"70m" was obtained.

実施例2 第3図(A)〜(F)に、本発明の方法によりGaAl
As結晶を形成する概略工程図を示す。
Example 2 FIGS. 3(A) to 3(F) show that GaAl
A schematic process diagram for forming an As crystal is shown.

(A):シリコンウエハ21上に5IH4と02を用い
たCVD法によって非晶質SiO□膜22を1500人
堆積した。(第3図(A)) (B)二次にフォトレジスト23で開口部24を有する
所望のパターンにSiO□膜上をマスクして、イオンイ
ンブランターを用いてAIイオン25を打ち込んだ、打
込み量は1xlO1′/cffl!であった。(第3図
(B)) イオン打込み部分の大きさは2μm四方、打ち込み部分
の間隔は30μmであった。
(A): 1,500 amorphous SiO□ films 22 were deposited on a silicon wafer 21 by the CVD method using 5IH4 and 02. (Fig. 3 (A)) (B) Second, the SiO□ film was masked with a photoresist 23 into a desired pattern having openings 24, and AI ions 25 were implanted using an ion implanter. The amount is 1xlO1'/cffl! Met. (FIG. 3(B)) The size of the ion implantation portion was 2 μm square, and the interval between the implantation portions was 30 μm.

(C):Atイオンの打込まれていないSiO□表面2
6では結晶の核発生確率は低く、A1イオン打込み領域
27では結晶の発生確率が高く、該領域27に結晶成長
して単結晶になる核が発生する。
(C): SiO□ surface 2 where At ions are not implanted
The probability of crystal nucleation is low in A1 ion implantation region 27, and the probability of crystal nucleation is high in A1 ion implantation region 27, in which a nucleus grows into a single crystal.

(第3図(C)) (D):H,雰囲気の中で850℃、10分間の熱処理
行って、次にMOCVD法によって、Alがイオン打込
領域27の上にGaAlAs結晶核28を発生させた。
(Fig. 3 (C)) (D): Heat treatment is performed at 850°C for 10 minutes in an H atmosphere, and then by MOCVD method, Al generates GaAlAs crystal nuclei 28 on the ion implantation region 27. I let it happen.

原料にはトリメチルガリウム(TMG)とトリメチルア
ルミニウム(TMA) 、アルシン(Ashs)を使い
、希釈ガスにはH2を用いた。原料ガスのモル比はTM
G : TMA : ASH3は3 : 2 : 30
0  (V/III=60)で、圧力は80torr、
基板温度は700℃であった。
Trimethylgallium (TMG), trimethylaluminum (TMA), and arsine (Ashs) were used as raw materials, and H2 was used as a diluent gas. The molar ratio of raw material gas is TM
G:TMA:ASH3 is 3:2:30
0 (V/III=60), the pressure is 80 torr,
The substrate temperature was 700°C.

(第3図(D)) (E):成長開始後15分でGaAlAs結晶核28が
成長したGaAlAs単結晶29が、Al打ち込み領域
15を覆いつくしたところで、原料のモル比をTMG 
: TMA : AsHs= 3 : 2 : 225
  (V/ III =45)に設定変更した。(第3
図(E)) (F):さらに成長を続けGaAIASの結晶がぶつか
り合うまで成長させた。30は粒界である。
(Fig. 3 (D)) (E): When the GaAlAs single crystal 29 in which the GaAlAs crystal nuclei 28 have grown completely covers the Al implantation region 15 15 minutes after the start of growth, the molar ratio of the raw materials is changed to TMG.
: TMA : AsHs = 3 : 2 : 225
The setting was changed to (V/III = 45). (3rd
Figure (E)) (F): Growth continued until the GaAIAS crystals collided with each other. 30 is a grain boundary.

(第3図(F)) [発明の効果] 本発明の結晶成長法によれば、核形成面上に制御された
■−V族化合物の単結晶を成長させることができ、各成
長段階で適切なV/mモル比を設定することにより、V
族原料を余分に使用することな(効率的に、良質なII
I−V族化合物の単結晶を得ることが可能になる。
(Figure 3 (F)) [Effects of the Invention] According to the crystal growth method of the present invention, a controlled single crystal of the ■-V group compound can be grown on the nucleation surface, and at each growth stage, By setting an appropriate V/m molar ratio, V
No need to use excess group raw materials (efficiently, high quality II)
It becomes possible to obtain a single crystal of a group IV compound.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の結晶の形成方法を示す概略工程図、第
2図は本発明の方法をGaAs結晶の形成に用いた場合
の概略工程図、第3図は本発明の方法をGaAlAs結
晶の形成に用いた場合の概略工程図、第4図は核発生密
度とV / mモル比との関係図である。 l・・・下地材料 2・・・核形成密度の低い材料からなる薄膜3・・・非
核形成面   4・・・核形成面5・・・核形成密度の
低い材料からなる支持体6・・・核形成密度の高い材料
からなる薄膜7・・・フォトレジスト 8・・・イオン
打込領域9・・・nl −V族化合物結晶核 lO・・弓n−v族化合物単結晶 11・・・石英基板    12・・・Taxes膜1
3・・・SiN、膜     14・・・窓15・・・
GaAs結晶核   16・・・GaAs単結晶17・
・・粒界      21・・・シリコンウェハ22・
・・非晶質5iOi膜  23・・・フォトレジスト2
4・・・開口部     25・・・A1イオン26・
・・Alイオンの打込まれていない領域27・・・At
イオン打込領域 2B−−−GaAlAs結晶核 29−・・GaAlAs単結晶 30・・・粒界
Fig. 1 is a schematic process diagram showing the method of forming a crystal of the present invention, Fig. 2 is a schematic process diagram when the method of the present invention is used to form a GaAs crystal, and Fig. 3 is a schematic process diagram showing the method of the present invention for forming a GaAlAs crystal. FIG. 4 is a diagram showing the relationship between nucleation density and V/m molar ratio. l... Base material 2... Thin film made of a material with low nucleation density 3... Non-nucleation surface 4... Nucleation surface 5... Support body 6 made of material with low nucleation density... - Thin film made of material with high nucleation density 7... Photoresist 8... Ion implantation region 9... nl -V group compound crystal nucleus lO... Arch n-V group compound single crystal 11... Quartz substrate 12...Taxes film 1
3...SiN, film 14...Window 15...
GaAs crystal nucleus 16...GaAs single crystal 17.
...Grain boundary 21...Silicon wafer 22.
...Amorphous 5iOi film 23...Photoresist 2
4... Opening 25... A1 ion 26.
...Region 27 where Al ions are not implanted...At
Ion implantation region 2B---GaAlAs crystal nucleus 29---GaAlAs single crystal 30---grain boundary

Claims (1)

【特許請求の範囲】 1、有機金属化学輸送法によるIII−V族化合物の結晶
の形成方法において、核形成密度の小さい非核形成面と
、該非核形成面の核形成密度より大きい核形成密度を有
し、結晶成長して単結晶になる核が唯一形成され得るに
十分小さい面積を有する核形成面とが隣接して配された
自由表面を有する基体に、核形成初期段階では原料ガス
中の周期律表第V族原子と第III族原子との比率V/II
Iを高くし、かつ結晶成長段階では比率V/IIIを核形成
初期段階より低くする結晶成長処理を施すことを特徴と
する結晶の形成方法。 2、前記核形成初期段階における前記周期律表第V族原
子と第III族原子との比率V/IIIが10以上であ
る請求項1記載の結晶の形成方法。 3、前記結晶成長段階における前記周期律表第V族原子
と第III族原子との比率V/IIIが5以上である請求項1
記載の結晶の形成方法。 4、前記核形成面を前記非核形成面の内部に形成する請
求項1記載の結晶の形成方法。 5、前記核形成面を前記非核形成面の面上に形成する請
求項1記載の結晶の形成方法。 6、前記核形成面を区画化して複数形成する請求項1記
載の結晶の形成方法。 7、前記核形成面を規則的に区画化して複数形成する請
求項1記載の結晶の形成方法。 8、前記核形成面を不規則に区画化して複数形成する請
求項1記載の結晶の形成方法。 9、前記核形成面を格子状に形成する請求項1記載の結
晶の形成方法。 10、前記核形成面を区画化して複数設け、該核形成面
のそれぞれより、単結晶を成長させる請求項1記載の結
晶の形成方法。 11、各核形成面より成長する単結晶を、隣り合う核形
成面間で隣接する大きさまで成長させる請求項1記載の
結晶の形成方法。 12、前記核形成面を、イオン打込み法によって形成す
る請求項1記載の結晶の形成方法。 13、前記基体の表面を非単結晶質で構成する請求項1
記載の結晶の形成方法。 14、前記非核形成面を形成する材料が非晶質SiO_
2である請求項1記載の結晶の形成方法。 15、前記III−V族化合物が二元系III−V族化合物で
ある請求項1記載の結晶の形成方法。 16、前記III−V族化合物が混晶III−V族化合物であ
る請求項1記載の結晶の形成方法。 17、前記結晶形成処理がMOCVD法である請求項1
記載の結晶の形成方法。
[Claims] 1. A method for forming a crystal of a III-V compound using an organometallic chemical transport method, which includes a non-nucleation surface with a low nucleation density and a nucleation density higher than the nucleation density of the non-nucleation surface. In the initial stage of nucleation, the substrate has a free surface adjacent to a nucleation surface having a small enough area to form a unique nucleus that grows into a single crystal. Ratio of Group V atoms to Group III atoms of the periodic table V/II
1. A method for forming a crystal, which comprises performing a crystal growth process in which I is increased and the ratio V/III is lowered in the crystal growth stage than in the initial stage of nucleation. 2. The method for forming a crystal according to claim 1, wherein the ratio V/III of the group V atoms to the group III atoms of the periodic table in the initial stage of nucleation is 10 or more. 3. Claim 1, wherein the ratio V/III of the group V atoms to the group III atoms of the periodic table in the crystal growth stage is 5 or more.
Method of forming the described crystals. 4. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed inside the non-nucleation surface. 5. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed on the non-nucleation surface. 6. The method for forming a crystal according to claim 1, wherein the nucleation surface is divided into a plurality of sections. 7. The method for forming a crystal according to claim 1, wherein the nucleation surface is regularly partitioned to form a plurality of them. 8. The method for forming a crystal according to claim 1, wherein the nucleation surface is irregularly partitioned to form a plurality of them. 9. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed in a lattice shape. 10. The method for forming a crystal according to claim 1, wherein a plurality of the nucleation surfaces are divided and provided, and a single crystal is grown from each of the nucleation surfaces. 11. The method for forming a crystal according to claim 1, wherein the single crystals grown from each nucleation surface are grown to adjacent sizes between adjacent nucleation surfaces. 12. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed by an ion implantation method. 13. Claim 1, wherein the surface of the substrate is made of non-single crystal material.
Method of forming the described crystals. 14. The material forming the non-nucleation surface is amorphous SiO_
2. The method for forming a crystal according to claim 1. 15. The method for forming a crystal according to claim 1, wherein the III-V group compound is a binary III-V group compound. 16. The method for forming a crystal according to claim 1, wherein the III-V group compound is a mixed crystal III-V group compound. 17. Claim 1, wherein the crystal formation treatment is an MOCVD method.
Method of forming the described crystals.
JP26911289A 1989-10-18 1989-10-18 Method of forming crystal Pending JPH03132016A (en)

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