JPH02260809A - Automatic gain stabilizing circuit - Google Patents
Automatic gain stabilizing circuitInfo
- Publication number
- JPH02260809A JPH02260809A JP8064689A JP8064689A JPH02260809A JP H02260809 A JPH02260809 A JP H02260809A JP 8064689 A JP8064689 A JP 8064689A JP 8064689 A JP8064689 A JP 8064689A JP H02260809 A JPH02260809 A JP H02260809A
- Authority
- JP
- Japan
- Prior art keywords
- gain
- modulator
- output
- voltage
- variable power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000087 stabilizing effect Effects 0.000 title description 2
- 230000006641 stabilisation Effects 0.000 claims description 5
- 238000011105 stabilization Methods 0.000 claims description 5
- 238000001514 detection method Methods 0.000 abstract description 4
- 230000002238 attenuated effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は位相変調器又は周波数変調器における利得を安
定化するための回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit for stabilizing the gain in a phase modulator or a frequency modulator.
例えば、同相合成スペースダイパーシティ方式等のよう
に、複数の入力信号が存在し、変調器を通った信号と別
の信号を振幅に関して同一条件で合成又は比較を行う場
合には、これに用いられる位相変調器又は周波数変調器
では、その人力から合成器又は比較器までの利得を同一
にすることが要求される。For example, it is used when there are multiple input signals and the signal that has passed through the modulator and another signal are to be synthesized or compared under the same conditions in terms of amplitude, such as in the in-phase synthesis space diversity method. A phase modulator or frequency modulator requires the same gain from its input to the combiner or comparator.
従来、この種の位相変調器又は周波数変調器においては
、振幅制限器(リミッタ)又は自動利得制御(AGC)
増幅回路によって一定レベルの変調波出力を得られるよ
うにしていた。また、変調器での利得又は変換損失を一
定しなければならない場合には、変調信号を制御して変
調信号に対する変調器自体の利得の偏差が小さくなるよ
うにしていた。Conventionally, in this type of phase modulator or frequency modulator, an amplitude limiter (limiter) or an automatic gain control (AGC) is used.
The amplifier circuit made it possible to obtain a constant level of modulated wave output. Furthermore, when the gain or conversion loss in the modulator must be kept constant, the modulation signal is controlled so that the deviation in the gain of the modulator itself with respect to the modulation signal is reduced.
上述した従来の出力レベルを一定にした変調器では、利
得を一定にすることが要求される場合には不適当となる
。また、変調信号を制御して変調信号に対する利得偏差
を小さくする変調器では、利得偏差を変調信号で補正す
るための補正回路が必要となり、この回路が複雑になる
とともに、その補正のために連続した変調信号を取扱う
ことができないという問題がある。The above-described conventional modulator with a constant output level is not suitable when constant gain is required. In addition, in a modulator that controls the modulation signal to reduce the gain deviation with respect to the modulation signal, a correction circuit is required to correct the gain deviation with the modulation signal, which makes this circuit complex and requires a continuous There is a problem in that it cannot handle modulated signals.
本発明はこれらの問題を解消して変調器の利得を安定に
保持することを可能にした自動利得安定化回路を提供す
ることを目的とする。An object of the present invention is to provide an automatic gain stabilization circuit that solves these problems and makes it possible to stably maintain the gain of a modulator.
本発明の自動利得安定化回路は、入力信号を分岐して夫
々増幅する第1及び第2の固定利得増幅器と、第1の固
定利得増幅器の出力を可変する可変電力減衰器と、この
可変電力減衰器の出力を変調する変調器と、この変調器
の出力を検波する第1の検波器と、前記第2の固定利得
増幅器の出力を検波する第2の検波器と、これら第1及
び第2の検波器の出力を比較する差動増幅器と、この差
動増幅器の比較出力により前記可変電力減衰器を制御す
る自動利得安定(AGS)制御回路とを備えている。The automatic gain stabilization circuit of the present invention includes first and second fixed gain amplifiers that branch and amplify input signals, a variable power attenuator that varies the output of the first fixed gain amplifier, and a variable power attenuator that varies the output of the first fixed gain amplifier. a modulator that modulates the output of the attenuator; a first detector that detects the output of the modulator; a second detector that detects the output of the second fixed gain amplifier; The present invention includes a differential amplifier that compares the outputs of two wave detectors, and an automatic gain stabilization (AGS) control circuit that controls the variable power attenuator based on the comparison output of the differential amplifier.
〔作用〕
上述した構成では、第2の固定利得増幅器の利得と変調
器を通した後の利得とを比較して両者が一致するように
可変電力減衰器を制御することで、変調器における利得
の変動を吸収することができ、変調信号に対する変調器
の特性に関係なく、利得を安定に保持する。[Operation] In the configuration described above, the gain of the second fixed gain amplifier and the gain after passing through the modulator are compared and the variable power attenuator is controlled so that the two match, thereby adjusting the gain in the modulator. This allows the gain to be kept stable regardless of the characteristics of the modulator with respect to the modulated signal.
〔実施例] 次に、本発明を図面を参照して説明する。〔Example] Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例のブロンク図である。FIG. 1 is a bronc diagram of one embodiment of the present invention.
同図において、1.2は夫々第1.第2の各固定利得増
幅器、3は可変電力減衰器、4は変調信号又は制御信号
に対して利得変動される変調器、5゜6は夫々第1.第
2の各検波器、7は差動を増幅器、8はAGS制御回路
である。In the same figure, 1.2 is the 1st. 3 is a variable power attenuator, 4 is a modulator whose gain is varied with respect to a modulation signal or a control signal, 5 and 6 are respectively second fixed gain amplifiers; In each of the second detectors, 7 is a differential amplifier, and 8 is an AGS control circuit.
入力信号(被変調信号)はまず2つに分岐されて、一方
は基準の利得として比較するための第2の固定利得増幅
器2によって一定利得で増幅され、その出力を第2の検
波器6で検波して基準検波電圧を得ている。The input signal (modulated signal) is first branched into two, one is amplified with a constant gain by a second fixed gain amplifier 2 for comparison as a reference gain, and its output is amplified by a second detector 6. The reference detection voltage is obtained by detection.
分岐された他方の入力信号は第1の固定利得増幅器1に
よって増幅され、可変電力減衰器3でAGS制御回路8
の出力であるAGS制御電圧によって決まる減衰量の減
衰を受けた後、変調器4で変調される。この変調出力は
第1の検波器5で検波され、この検波電圧と前記基準検
波電圧を比較して差電圧を差動増幅器7によって得て、
この利得の誤差電圧によりA G S IJ御回路8が
前記可変電力減衰器のAGS制御電圧を制御している。The other branched input signal is amplified by the first fixed gain amplifier 1, and the AGS control circuit 8 is amplified by the variable power attenuator 3.
After being attenuated by an amount determined by the AGS control voltage output from the AGS control voltage, the signal is modulated by the modulator 4. This modulated output is detected by a first detector 5, this detected voltage is compared with the reference detected voltage, and a differential voltage is obtained by a differential amplifier 7.
The AGS IJ control circuit 8 controls the AGS control voltage of the variable power attenuator using this gain error voltage.
したがって、誤差電圧が0となるようにループが制御さ
れる結果、入出力信号で見た利得は安定化され、その利
得は常に基準利得としての第2の固定利得増幅器2の利
得に等しくなる。Therefore, as a result of controlling the loop so that the error voltage becomes 0, the gain seen in the input/output signal is stabilized, and the gain is always equal to the gain of the second fixed gain amplifier 2 as the reference gain.
[発明の効果]
以上説明したように本発明は、第2の固定利得増幅器の
利得と変調器を通した後の利得とを比較して両者が一致
するように可変電力減衰器を制御しているので、変調器
における利得の変動を吸収して利得を安定に保持するこ
とができる効果がある。[Effects of the Invention] As explained above, the present invention compares the gain of the second fixed gain amplifier and the gain after passing through the modulator, and controls the variable power attenuator so that the two match. This has the effect of absorbing gain fluctuations in the modulator and stably maintaining the gain.
第1図は本発明の一実施例のブロック図である。
1・・・第1の固定利得増幅器、2・・・第2の固定利
得増幅器、3・・・可変電力減衰器、4・・・変調器、
5・・・第1の検波器、6・・・第2の検波器、7・・
・差動増幅器、8・・・AGS制御回路。FIG. 1 is a block diagram of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... First fixed gain amplifier, 2... Second fixed gain amplifier, 3... Variable power attenuator, 4... Modulator,
5...First detector, 6...Second detector, 7...
-Differential amplifier, 8...AGS control circuit.
Claims (1)
定利得増幅器と、第1の固定利得増幅器の出力を可変す
る可変電力減衰器と、この可変電力減衰器の出力を変調
する変調器と、この変調器の出力を検波する第1の検波
器と、前記第2の固定利得増幅器の出力を検波する第2
の検波器と、これら第1及び第2の検波器の出力を比較
する差動増幅器と、この差動増幅器の比較出力により前
記可変電力減衰器を制御する自動利得安定制御回路とを
備えることを特徴とする自動利得安定化回路。1. First and second fixed gain amplifiers that branch and amplify input signals, a variable power attenuator that varies the output of the first fixed gain amplifier, and modulation that modulates the output of the variable power attenuator. a first detector for detecting the output of the modulator, and a second detector for detecting the output of the second fixed gain amplifier.
a differential amplifier that compares the outputs of the first and second detectors, and an automatic gain stabilization control circuit that controls the variable power attenuator using the comparison output of the differential amplifier. Features an automatic gain stabilization circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8064689A JPH02260809A (en) | 1989-03-31 | 1989-03-31 | Automatic gain stabilizing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8064689A JPH02260809A (en) | 1989-03-31 | 1989-03-31 | Automatic gain stabilizing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02260809A true JPH02260809A (en) | 1990-10-23 |
Family
ID=13724133
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8064689A Pending JPH02260809A (en) | 1989-03-31 | 1989-03-31 | Automatic gain stabilizing circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02260809A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244645A (en) * | 1993-02-17 | 1994-09-02 | Nec Corp | Amplifier circuit |
-
1989
- 1989-03-31 JP JP8064689A patent/JPH02260809A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244645A (en) * | 1993-02-17 | 1994-09-02 | Nec Corp | Amplifier circuit |
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