JPH0226375B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that achieves high yield and high reliability of multilayer wiring.

BACKGROUND ART In semiconductor integrated circuits, multilayer interconnections are becoming absolutely essential as elements become more densely packed. One of the major problems in realizing multilayer wiring is the insulating film between layers. It is necessary for the interlayer insulating film to satisfy the following three requirements structurally.

(1) Excellent insulation properties.

(2) The surface to which the metal is applied must be flat.

(3) Mechanical strength must be sufficient.

Conventionally, plasma silicon nitride films (referred to as P-SiN films) have been often used as interlayer insulating films because they satisfy the above items (1) and (3), but the above (2)
There are some difficulties in this section. That is, as shown in the cross-sectional view of FIG. 1, a first layer of metal wiring 3 is formed on a silicon substrate 1 with an insulating film 2 interposed therebetween.
Further, in a multilayer wiring structure in which a plasma silicon nitride film (P-SiN film) 4 is formed covering the metal wiring 3, and a second layer of metal wiring 5 is formed on top of the plasma silicon nitride film (P-SiN film) 4, the P-
The SiN interlayer insulating film 4 has a shape having a steep stepped portion S, and a problem arises in that the second layer metal wiring 5 is disconnected at this portion.

On the other hand, although the oxide film formed by spin coating and baking with silica liquid satisfies item (2) above, it has problems with items (1) and (3) above, especially item (1). Since it is not satisfactory, it is not used alone as an interlayer insulating film. Therefore, the spin-coated/baked oxide film and the above P-SiN film are
By having a multilayer structure, all of the above three items can be satisfied.

FIG. 2 is a cross-sectional view of a double structure of a P-SiN film and a spin-coated/baked oxide film. A spin-coated and fired oxide film 6 is interposed in between.The oxide film 6 eliminates the steep steps of the P-SiN film and prevents disconnection of the second layer metal wiring 5. , as seen in circle A in Fig. 2, the bonding pad part, which is subjected to a large mechanical force, has a P-
A problem arises in that the interface between the SiN film 4 and the oxide film 6 peels off.

An object of the present invention is to provide a semiconductor device having a multilayer wiring structure, which does not cause disconnection of metal wiring on a P-SiN film and is less likely to cause wiring peeling due to external mechanical forces, as described above. is to provide.

The features of the present invention include a lower layer wiring provided on an insulating film on a semiconductor substrate, an interlayer insulating film provided on the lower layer wiring and the insulating film, and the interlayer insulating film covering the lower layer wiring. In a semiconductor device, the interlayer insulating film has an upper layer wiring provided above the bonding pad, and a bonding pad to which an external force is applied, which is provided on the interlayer insulating film on which the lower layer wiring is not located. a plasma silicon nitride film provided continuously from to on the insulating film, and an oxide film formed by spin coating and baking provided on the plasma silicon nitride film; An oxide film is deposited on the upper surface of the plasma silicon nitride film over the lower layer interconnection, so that the upper layer interconnection covers the lower layer interconnection with its entire lower surface covered with the oxide film, and , the oxide film on a predetermined portion of the plasma silicon nitride film where the lower wiring is not located below is selectively removed to expose the upper surface of the predetermined portion, and the upper surface of the exposed plasma silicon nitride is removed. The semiconductor device includes the bonding pad provided on the lower surface of the semiconductor device.

Next, the present invention will be explained by examples.

FIGS. 3A to 3D are cross-sectional views of the substrate in the order of steps for explaining the manufacturing process of an embodiment of the present invention. As shown in FIG. 1a, a first layer of aluminum is deposited on a semiconductor substrate 1 via an insulating film 2 to a thickness of 1 μm by sputtering, and then etched into a predetermined pattern 3. Next, as shown in Figure b, a plasma silicon nitride film 4 is grown to a thickness of 1 μm on the entire surface of the substrate, and a silica liquid is spin-coated on the P-SiN film 4, and then heated at 400°C for about 1 hour. A heat treatment is performed to form a baked and hardened oxide film 6. The thickness of the oxide film 6 at the flat portion is approximately 800 Å after heat treatment. next,
As shown in figure c, a photoresist film 7 is applied,
An opening 7a is made in the part that will become the bonding pad. Next, as shown in Figure d, the oxide film 6 at the opening 7a is removed with hydrofluoric acid, and then the photoresist 7 is removed, and a second metal film is deposited on the entire surface in a predetermined pattern. Etching is performed to form second layer metal wiring 5 and bonding pad 5a.

In this way, since there is no oxide film 6 in the part of the bonding pad 5a that is subjected to a large external force during assembly, it will not peel off even if an external force is applied, and the second layer overlapping the first layer wiring will not be peeled off. In the metal wiring 5 of the second layer, the step part of the P-SiN film between the layers is smoothed by the oxide film 6, so that the metal wiring 5 is different from the conventional one.
The second layer wiring no longer breaks at this point. Therefore, according to the present invention, it is possible to obtain a semiconductor device having a multilayer interconnection without the risk of disconnection or peeling, and in which sufficient interlayer insulation is maintained.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view for explaining disconnection in a semiconductor device with conventional multilayer wiring, Figure 2 is a cross-sectional view for explaining wire separation in a semiconductor device with conventional multilayer wiring, and Figure 3a. -D are cross-sectional views of substrates in the order of steps for explaining the manufacturing steps of an embodiment of the present invention. 1... Semiconductor substrate, 2... Insulating film, 3... First layer metal wiring, 4... Plasma silicon nitride film (P-
SiN), 5... Second layer metal wiring, 5a... Bonding pad, 6... Spin coat/baked oxide film, 7... Photoresist.

Claims (1)

[Claims] 1. A lower wiring provided on an insulating film on a semiconductor substrate, an interlayer insulating film provided on the lower wiring and the insulating film, and an interlayer insulating film provided on the interlayer insulating film so as to cover the lower wiring. In a semiconductor device having an upper layer wiring and a bonding pad to which an external force is applied, which is provided on the interlayer insulating film on which the lower layer wiring is not located below, the interlayer insulating film is formed from above the lower layer wiring to above the insulating film. a plasma silicon nitride film provided continuously over the plasma silicon nitride film, and an oxide film formed by spin coating and baking provided on the plasma silicon nitride film,
The oxide film covers the lower wiring and is deposited on the upper surface of the plasma silicon nitride film, so that the upper wiring covers the lower wiring with its entire lower surface covered with the oxide film, The oxide film on a predetermined portion of the plasma silicon nitride film where the lower wiring is not located below is selectively removed to expose the upper surface of the predetermined portion, and the oxide film is removed on the exposed plasma silicon nitride film. 1. A semiconductor device, characterized in that the bonding pad is provided with its lower surface adhered to the front surface.