JPH02267996A - Manufacture of thin film multilayer wiring board - Google Patents
Manufacture of thin film multilayer wiring boardInfo
- Publication number
- JPH02267996A JPH02267996A JP8932589A JP8932589A JPH02267996A JP H02267996 A JPH02267996 A JP H02267996A JP 8932589 A JP8932589 A JP 8932589A JP 8932589 A JP8932589 A JP 8932589A JP H02267996 A JPH02267996 A JP H02267996A
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- Prior art keywords
- coating film
- film
- thin film
- coating
- organic insulating
- Prior art date
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Abstract
Description
【発明の詳細な説明】
〔概 要〕
薄膜多層配線基板の製造方法に関し、
複数層の微細な薄膜導体パターンを有機絶縁層上に高精
度で形成し得るよう、各有機絶縁層の上面を略平坦化す
ることを目的とし、
基板上又は有機絶縁層上に形成された導体パターンを有
機絶縁材料(ポリイミド)の塗布膜で埋め込んだ後、該
第一の塗布膜の導体パターン直上部分を除去し、次に加
熱して第一の塗布膜を収縮させて第一の塗布膜と導体パ
ターンの上面の段差を無(し、更にそれらの上に存a絶
縁材料を塗布して第二の塗布膜を形成した後加熱して第
二の塗布膜を収縮させて、第一及び第二の塗布膜よりな
る有機絶縁層を得るように構成する。[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a thin film multilayer wiring board, the upper surface of each organic insulating layer is roughly formed so that multiple layers of fine thin film conductor patterns can be formed on the organic insulating layer with high precision. For the purpose of planarization, a conductor pattern formed on a substrate or an organic insulating layer is buried with a coating film of an organic insulating material (polyimide), and then a portion of the first coating film directly above the conductor pattern is removed. Next, heat is applied to shrink the first coating film to eliminate the level difference between the first coating film and the upper surface of the conductor pattern, and then an insulating material is coated on top of them to form a second coating film. After forming, the second coating film is contracted by heating to obtain an organic insulating layer composed of the first and second coating films.
本発明は、薄膜多層配線基板の製造方法に関する。 The present invention relates to a method for manufacturing a thin film multilayer wiring board.
コンピュータ等に使用されるLSI搭載用多層配線基板
としては、従来は主としてガラスエポキシ多層基板が使
用されて来たが、コンピュータの演算速度の高速化等の
高性詣化や小型化等を進めるために、配線基板の実装密
度、寄生容量、耐熱性、熱膨張等に対する要求は厳しさ
を増し、ガラスエポキシ多層基板では充分に対処し切れ
なくなって来ている。他にセラミック厚膜多層基板も用
いられており、これは耐熱性や熱膨張の点で優れている
ものの微細パターンを精度良く形成することは困難であ
り、LSI搭載用としては適当とは言えない。そこで電
源回路等、微細パターンを含まない配線をこのセラミッ
ク厚膜多層基板に収容し、この基板上に信号回路等の微
細パターンの配線をポリイミドを介して薄膜で複数層設
けることが試みられており、一部で実用化している。こ
の薄膜多層部分は実装密度、寄生容量、耐熱性の点で優
れ、熱膨張はセラミック基板に従うため問題はない、し
かし薄膜層は精々2〜3層しか実用化されておらず、今
後多数層よりなる薄膜多層配線基板の実用化が望まれて
いる。Conventionally, glass epoxy multilayer boards have been mainly used as multilayer wiring boards for mounting LSIs used in computers, etc., but in order to promote higher performance and miniaturization such as increasing the calculation speed of computers, etc. In addition, requirements for wiring boards, such as packaging density, parasitic capacitance, heat resistance, thermal expansion, etc., are becoming more and more severe, and glass epoxy multilayer boards are no longer able to meet these requirements satisfactorily. Ceramic thick film multilayer substrates are also used, and although they are excellent in terms of heat resistance and thermal expansion, it is difficult to form fine patterns with high precision, so they are not suitable for LSI mounting. . Therefore, attempts have been made to accommodate wiring that does not include fine patterns, such as power supply circuits, in this ceramic thick film multilayer substrate, and to provide multiple layers of fine pattern wiring such as signal circuits with thin films on this substrate via polyimide. , has been put into practical use in some areas. This thin film multilayer part has excellent packaging density, parasitic capacitance, and heat resistance, and thermal expansion follows the ceramic substrate, so there is no problem. It is desired to put a thin film multilayer wiring board into practical use.
第2図(a)〜(e)は、従来技術による薄119多層
配線基板の製造方法を示す。FIGS. 2(a) to 2(e) show a method of manufacturing a thin 119 multilayer wiring board according to the prior art.
第2図(a)において、1はセラミック基板、2は銅の
導体パターンである。In FIG. 2(a), 1 is a ceramic substrate and 2 is a copper conductor pattern.
この上全面にポリイミド液をスピンコード法で塗布し、
第2図(b)に示すように表面の平坦な有機絶縁層3を
形成する。Apply polyimide liquid to the entire surface using the spin code method,
As shown in FIG. 2(b), an organic insulating layer 3 with a flat surface is formed.
次にこれを約100’cで約1時間加熱してポリイミド
液中の溶剤を蒸発させた後、更に約400″Cで約30
分加熱すると樹脂がイミド化する。これらの加熱で有機
絶縁層3は収縮し、第2図(C)に示すように表面に凹
凸を生ずる。Next, this was heated at about 100'C for about 1 hour to evaporate the solvent in the polyimide liquid, and then heated at about 400'C for about 30 minutes.
When heated for 1 minute, the resin becomes imide. This heating causes the organic insulating layer 3 to contract, producing irregularities on the surface as shown in FIG. 2(C).
この有機絶縁層3の上に図示はないがスパック法等で銅
を付着させ、フォトエツチング法で第3図(d)に示す
ように第2層目の導体パターン2を形成する。以下、有
機絶縁M3と導体パターン2を交互に形成して薄膜多層
配線基板を製造する。Copper (not shown) is deposited on this organic insulating layer 3 by a spattering method or the like, and a second layer conductor pattern 2 is formed by a photoetching method as shown in FIG. 3(d). Thereafter, organic insulation M3 and conductor patterns 2 are alternately formed to manufacture a thin film multilayer wiring board.
第2図(、e)はこのようにして得られた薄膜多層配線
基板の一例を示す図であるが、この図の第3層目の導体
パターンのように有機絶縁層の平坦でない部分にも導体
パターンを形成しなければならない。Figure 2 (, e) shows an example of a thin film multilayer wiring board obtained in this way. A conductor pattern must be formed.
以上の説明ではポリイミド液を1回塗布することにより
有機絶縁層3を得ているが、所望の厚さが厚い場合等で
はこれを複数回に分けて塗布する。In the above description, the organic insulating layer 3 is obtained by applying the polyimide liquid once, but if the desired thickness is desired, the organic insulating layer 3 is applied in multiple times.
尚、ポリイミド液のわ1度を下げて多数回の塗布で所望
の厚さの有機絶縁層3を形成する場合は、表面の凹凸が
減少すると言う利点はあるが、処理時間が大幅に増加す
ることになるため実用的ではない。In addition, when forming the organic insulating layer 3 of a desired thickness by lowering the degree of stiffness of the polyimide liquid and applying it multiple times, there is an advantage that surface irregularities are reduced, but the processing time is significantly increased. Therefore, it is not practical.
(発明が解決しようとする課題〕
このような従来の製造方法による薄膜多層配線基板では
各有機絶縁層の上面が平坦ではないため、フォトエツチ
ング工程では平坦なフォトマスクのパターンを凹凸のあ
る面に転写することになり、全面にわたり微細な薄膜導
体パターンを精度良(形成することが困難となる。しか
も層数が増加するに従って有機絶縁層上面の凹凸の程度
が増す傾向にあるため、層数を多くすることが出来ない
と言う問題があった。(Problem to be Solved by the Invention) Since the top surface of each organic insulating layer is not flat in a thin film multilayer wiring board produced by such a conventional manufacturing method, the photo-etching process involves converting a flat photomask pattern onto an uneven surface. As the number of layers increases, the degree of unevenness on the top surface of the organic insulating layer tends to increase as the number of layers increases. The problem was that I couldn't do much.
本発明は、このような問題を解決して、多数層の微細な
薄膜導体パターンを有する薄膜多層配線基板を製造する
方法を提供することを目的とする。An object of the present invention is to solve these problems and provide a method for manufacturing a thin film multilayer wiring board having multiple layers of fine thin film conductor patterns.
〔課題を解決するための手段]
この目的は、本発明によれば、有機絶縁材料を塗布して
なる第一の塗布膜の導体パターン直上部分を除去した後
、該第一の塗布膜を加熱収縮させる工程と、該加熱収縮
後の第一の塗布膜及び導体パターンの上に新たに有機絶
縁材料を塗布して第二の塗布膜を形成した後、該第二の
塗布膜を加熱収縮させる工程とを有して、第一及び第二
の塗布膜よりなる有機絶縁層を形成する製造方法とする
ご七により、達成される。[Means for Solving the Problems] According to the present invention, after removing the portion of the first coating film coated with an organic insulating material directly above the conductor pattern, the first coating film is heated. Shrinking step, and after forming a second coating film by newly applying an organic insulating material on the first coating film and the conductor pattern after the heat shrinkage, heating and shrinking the second coating film. This is achieved by a manufacturing method of forming an organic insulating layer consisting of first and second coating films.
ポリイミド樹脂は殆どの溶剤に溶解しない安定な樹脂で
あるため、ポリイミド膜を生成するにはポリアミック酸
の状態で溶剤に溶かして(これをポリイミド液と呼んで
いる)これを塗布し、先ず低温加熱で溶剤を蒸発させ、
次いで高温加熱で脱水縮合反応を起こさせてポリイミド
樹脂化する方法を取る。従って加熱による体積減少は避
けられない、塗布膜の場合は平面方向には殆ど収縮出来
ないため、膜厚の減少だけとなる。Polyimide resin is a stable resin that does not dissolve in most solvents, so in order to generate a polyimide film, it is dissolved in a solvent in the form of polyamic acid (this is called a polyimide liquid) and then applied, and then heated at a low temperature. Evaporate the solvent with
Next, a method is adopted in which a dehydration condensation reaction is caused by high temperature heating to form a polyimide resin. Therefore, volume reduction due to heating is unavoidable; in the case of a coated film, it can hardly shrink in the plane direction, so only the film thickness decreases.
ここで凹凸のある基板上に凸部が埋没するようにポリイ
ミド液を塗布すると当初は略平坦な表面が得られるが、
基板の凸部と凹部とではポリイミドの膜厚が異なるため
に加熱時の収縮量に差を生じ、平坦でな(なる。即ち樹
脂分濃度Nのポリイミド液を凹凸差もの基板上に平坦に
塗布した場合の塗布膜厚を基板凹部がり、基板凸部がd
とすると、D−t/Nならば基板凹部では加熱収縮後は
Lとなるが、基板凸部上ではtの上にdXNが加わるこ
とになり、dXNの段差を生じることになる。If the polyimide liquid is applied to the uneven substrate so that the protrusions are buried, a substantially flat surface will be obtained initially, but
Since the polyimide film thickness is different between the convex and concave parts of the substrate, there is a difference in the amount of shrinkage during heating, and the polyimide solution is not flat. When the coating film thickness is
If D-t/N, the concave portion of the substrate will be L after heat shrinkage, but dXN will be added above t on the convex portion of the substrate, resulting in a step of dXN.
そこでポリイミド膜の形成を2回に分け、1回目は加熱
収縮後の厚さが基板の凹凸差と等しくなる程度の厚さに
ポリイミド液を塗布した後凸部上の塗布膜を除去し、そ
の後加熱収縮させてポリイミドB2上面とf6出した基
板凸部上面とを揃える。Therefore, the formation of the polyimide film is divided into two steps.In the first step, the polyimide liquid is applied to a thickness such that the thickness after heat shrinkage is equal to the difference in unevenness of the substrate, and then the coating film on the convex portions is removed. Heat shrink to align the top surface of polyimide B2 and the top surface of the protrusion of the substrate f6.
2回目はポリイミド膜の膜厚不足を補うものであり、塗
布膜厚は元々略均−であるから加熱により一様に収縮し
、表面は平坦となる。このようにすればこの上に何層重
ねても平坦なポリイミド膜が得らる。The second coating is to compensate for the lack of thickness of the polyimide film, and since the coated film thickness is originally approximately uniform, it shrinks uniformly by heating, and the surface becomes flat. In this way, a flat polyimide film can be obtained no matter how many layers are stacked on top of it.
本発明に基づく薄1模多層基板の製造方法の一実施例を
第1図(a)〜(h)により説明す゛る。第1図(a)
において、1はセラミック基板であり、図示はないがそ
れ自体が多層構造となっており、電源回路等、複数層の
厚膜導体パターンが形成されている。2は銅の導体パタ
ーンである。An embodiment of the method for manufacturing a thin one-dimensional multilayer substrate according to the present invention will be described with reference to FIGS. 1(a) to 1(h). Figure 1(a)
1, reference numeral 1 denotes a ceramic substrate, which itself has a multilayer structure, although not shown, and has a plurality of layers of thick film conductor patterns such as a power supply circuit formed thereon. 2 is a copper conductor pattern.
この上全面に感光性ポリイミド液をスピンコード法によ
り塗布し、第1図(b)に示すように第一の塗布F!!
3aを形成する。この第一の塗布r1.3aの厚さは、
導体パターン2の厚さが5μm、感光性ポリイミド液の
樹脂分濃度が50%の場合は10μmとする。A photosensitive polyimide liquid is coated on the entire surface by a spin code method, and as shown in FIG. 1(b), the first coating F! !
Form 3a. The thickness of this first application r1.3a is:
When the thickness of the conductor pattern 2 is 5 μm and the resin concentration of the photosensitive polyimide liquid is 50%, the thickness is 10 μm.
次に約50°Cでプリベークした後、導体パターン2と
同一・のパターンを有するフォトマスクを用いて塗布W
3.3aの導体パターン2直上部分以外を紫外線露光し
、更に現像処理を施すと、感光性ポリイミド液がネガ型
フォトレジストと同様の性質を持つため、第1図(C)
に示すように塗布膜3aの導体パターン2直上部分が除
去される。Next, after pre-baking at about 50°C, apply W using a photomask having the same pattern as conductor pattern 2.
3. If the area other than the part directly above the conductor pattern 2 in 3a is exposed to ultraviolet rays and further developed, the photosensitive polyimide liquid has properties similar to those of a negative photoresist, and as shown in Fig. 1 (C).
As shown in FIG. 2, a portion of the coating film 3a directly above the conductor pattern 2 is removed.
次に約100″Cで約1時間加熱して溶剤を蒸発させた
後、約400″Cで約30分加熱すると樹脂はポリイミ
ド化して塗布膜3aは収縮し、厚さが約5μmとなって
第1図(d)に示すように導体パターン2との段差が無
くなる。Next, the solvent is evaporated by heating at about 100"C for about 1 hour, and then heated at about 400"C for about 30 minutes, the resin turns into polyimide and the coating film 3a shrinks to a thickness of about 5 μm. As shown in FIG. 1(d), the level difference with the conductor pattern 2 is eliminated.
この上に第1図(e)に示すように再びポリイミド液を
塗布し、加熱すると第1図(f)に示すように第二の塗
布膜3bが形成される。ポリイミド液の樹脂分濃度が5
0%の場合、当初の膜厚1071mならば加熱収縮後に
5 // mとなり、第一の塗布膜3aと合わせて10
μmの、表面が平坦な有機絶縁層3が出来上がる。When the polyimide liquid is applied again on this as shown in FIG. 1(e) and heated, a second coating film 3b is formed as shown in FIG. 1(f). The resin concentration of the polyimide liquid is 5
In the case of 0%, if the initial film thickness is 1071 m, it becomes 5 // m after heat shrinkage, and the total thickness is 10 m in total with the first coating film 3a.
An organic insulating layer 3 with a flat surface of .mu.m is completed.
この上にスパッタ法等により導体層を形成し、これをフ
ォトエツチング法でエツチングすることにより第2層目
の導体パターン2が形成される。A conductor layer is formed thereon by sputtering or the like, and this is etched by photoetching to form the second layer conductor pattern 2.
この手法を繰り返すことにより第1図の如き薄膜多層配
線基板を製造する。By repeating this method, a thin film multilayer wiring board as shown in FIG. 1 is manufactured.
以りの説明では、第一の塗布膜3a、第二の塗布膜3b
共にそれぞれ1回のポリイミド液塗布で形成しているが
、複数回に分けても良い。In the following explanation, the first coating film 3a, the second coating film 3b
Although both are formed by applying the polyimide liquid once, they may be applied in multiple times.
又、感光性のないポリイミド液を使用しても良く、この
場合は第一の塗布r!3aのプリベーク後のフォトレジ
スト塗布、現像後のフォトレジスト除去等の工程追加が
必要となる。Alternatively, a non-photosensitive polyimide liquid may be used; in this case, the first coating r! Additional steps such as photoresist application after pre-baking and removal of the photoresist after development are required in step 3a.
尚、加熱収縮後の第一の塗布膜3aと導体パターン2の
厚さは必ずしも精確に一致している必要はなく、多少の
段差は許容される。Note that the thicknesses of the first coated film 3a and the conductive pattern 2 after heat shrinkage do not necessarily have to be exactly the same, and some level difference is allowed.
以上説明したように、本発明の薄膜多層配線基板の製造
方法によれば、有機絶縁材料を塗布してなる第一の塗布
膜の導体パターン直上部分を除去上後、該第一の塗布膜
を加熱収縮させる工程と、該加熱収縮後の第一の塗布膜
及び導体パターンの上に新たに有機絶縁材料を塗布して
第二の塗布膜を形成した後、第二の塗布膜を加熱収縮さ
せる工程とを存して、該第一の塗布膜及び第二の塗布膜
よりなる平坦な有機絶縁層を形成することにより、複数
層の微細な薄膜導体パターンを精度良く形成することが
可能となり、コンピュータ等の高性能化、小型化に寄与
するところが大きい。As explained above, according to the method for manufacturing a thin film multilayer wiring board of the present invention, after removing the portion directly above the conductor pattern of the first coating film coated with an organic insulating material, the first coating film is coated with an organic insulating material. Heat-shrinking step, and after forming a second coated film by newly applying an organic insulating material on the first coated film and conductor pattern after the heat-shrinking, heat-shrinking the second coated film. By forming a flat organic insulating layer consisting of the first coating film and the second coating film through the steps, it becomes possible to form multiple layers of fine thin film conductor patterns with high precision, It greatly contributes to improving the performance and downsizing of computers, etc.
第1図(a)〜(h)は本発明の実施例の製造工程を説
明するための側断面図、
第2図(a)〜(e)は従来技術に基づく製造工程を示
す側断面図である。
図中、1 二 基板、
2 ; 導体パターン、
本−¥−Egt)XI;=f!Jt)r程り、ajイW
づ)t’lt1mlZ第1 図(【の1)
3a : 第一の塗布膜、
3b : 第二の塗布膜、
3 : 有機絶縁層。
木俗ビ可の実プセイグ・[01不口示す狽・12斤面区
′第1 閃Cで02)FIGS. 1(a) to (h) are side sectional views for explaining the manufacturing process of an embodiment of the present invention, and FIGS. 2(a) to (e) are side sectional views showing the manufacturing process based on the conventional technology. It is. In the figure, 1 2 board, 2 ; conductor pattern, book-¥-Egt)XI;=f! Jt) r degree, aj i W
Figure 1 ([1) 3a: First coating film, 3b: Second coating film, 3: Organic insulating layer. Mokuzokubika no Mi Pseig・[01 Mutual Demonstration・12 Catty Face Ward'1st flash C in 02)
Claims (1)
パターン(2)を有する薄膜多層配線基板の製造におい
て、 有機絶縁材料を塗布してなる第一の塗布膜(3a)の前
記導体パターン(2)直上部分を除去した後、該第一の
塗布膜(3a)を加熱収縮させる工程と、該加熱収縮後
の第一の塗布膜(3a)及び該導体パターン(2)の上
に新たに有機絶縁材料を塗布して第二の塗布膜(3b)
を形成した後、該第二の塗布膜(3b)を加熱収縮させ
る工程とを有して、該第一及び第二の塗布膜(3a,3
b)よりなる有機絶縁層(3)を形成することを特徴と
する薄膜多層配線基板の製造方法。[Claims] In the production of a thin film multilayer wiring board having a plurality of layers of conductor patterns (2) on a substrate (1) with an organic insulating layer (3) interposed therebetween, After removing the portion of the coating film (3a) directly above the conductive pattern (2), heating and shrinking the first coating film (3a); A second coating film (3b) is formed by newly applying an organic insulating material on the conductor pattern (2).
After forming the first and second coating films (3a, 3), the second coating film (3b) is heated and shrunk.
A method for manufacturing a thin film multilayer wiring board, which comprises forming an organic insulating layer (3) consisting of b).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8932589A JPH02267996A (en) | 1989-04-07 | 1989-04-07 | Manufacture of thin film multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8932589A JPH02267996A (en) | 1989-04-07 | 1989-04-07 | Manufacture of thin film multilayer wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02267996A true JPH02267996A (en) | 1990-11-01 |
Family
ID=13967517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8932589A Pending JPH02267996A (en) | 1989-04-07 | 1989-04-07 | Manufacture of thin film multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02267996A (en) |
-
1989
- 1989-04-07 JP JP8932589A patent/JPH02267996A/en active Pending
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