JPH0442992A - Forming method for conductor pattern multilayer structure - Google Patents

Abstract

PURPOSE:To flatten a conductor pattern multilayer structure by forming an insulating layer, forming first insulating layers having substantially the same thickness on the periphery of a conductor pattern, and forming a second insulating layer on the pattern and the first layer. CONSTITUTION:A first conductor pattern 1a is formed on a ceramic laminated board 4. A coating layer 2a' is formed to cover the pattern 1a. The upper part of the pattern 1a of the layer 2a' is removed to expose the upper surface of the pattern 1a. The layer 2a' containing solvent is dried and cured. The layer 1a' becomes a first insulating layer 2a. Thereafter, a second layer 2b is formed on a layer 11. Since the upper surface of the layer 11 is flat, the layer 2a is formed in a state that the surface 2b-1 is flat.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for forming a conductor pattern multilayer structure, the purpose is to make it possible to flatten the conductor pattern multilayer structure, by sequentially laminating a plurality of conductor patterns on a substrate via an insulating layer. In the method for forming a multilayer conductor pattern structure, the step of forming the insulating layer comprises forming a first insulating layer around the conductor pattern and having a thickness substantially the same as that of the conductor pattern; The method includes a step of forming a second insulating layer on the conductor pattern and the first insulating layer.

[Industrial application field]

The present invention relates to a method for forming a multilayer conductor pattern structure on the surface of, for example, a ceramic printed wiring board.

FIG. 5 shows a general ceramic printed wiring board 10. As shown in FIG.

Reference numeral 4 denotes a ceramic laminated substrate formed by firing a plurality of green sheets or a laminated green sheet laminate, and has vias 5 and an inner layer conductor pattern 6.

Furthermore, a surface conductor pattern 1 is formed on the surface of the ceramic laminated substrate 4.

With the recent increase in density, the surface conductor pattern 1 also tends to be multilayered.

In this case, it is necessary to provide a hanging structure that reliably prevents disconnection of the surface conductor pattern l.

[Conventional technology]

Conventionally, the formation of the above-mentioned surface conductor pattern l has been carried out in a process as shown in FIG. Here, a case where the conductor pattern 1 has a three-layer structure will be explained with reference to FIG.

First, in step 601 in FIG. 4, as shown in FIG.
First conductor pattern 1a on the surface of ceramic multilayer substrate 4
is formed by sputtering and plating.

Next, in step 602, an inorganic or growing material is applied over and around the first conductor pattern 1a to form an insulating layer 2a.

Then, in step 603, the second conductor pattern 1b is formed in the overlapping portion of the first conductor pattern 1a and the insulating layer 2a.

Hereinafter, in step 604, the second
An insulating layer 2b is formed on and around the conductor pattern lb, and in step 605, a third conductor pattern IC is formed on the insulating layer 2b.

As a result, a conductor pattern multilayer structure is formed as shown in an enlarged view in FIG.

[Problem to be Solved by the Invention] As can be seen from FIG. 5, the overlapping portions of the conductor patterns 1a to 1c surrounded by the broken line circle A are raised higher than the surrounding flat areas surrounded by the broken line circle B. It became a state of
A difference in level will occur.

There is a step of heating the printed wiring board when curing the resist or mounting other IC components.

In this case, thermal stress is generated due to the difference in thermal expansion coefficient between the conductive pattern and the insulating layer. This thermal stress is concentrated at the step portion, and this may cause an accident in which, for example, the conductor patterns Ib, 1c are disconnected.

As the number of stacked conductor patterns increases, the level difference becomes larger, thermal stress becomes more likely to concentrate, and wire breakage becomes more likely to occur.

In view of the above problems, the present invention provides the following means for the purpose of providing a method for forming a conductor pattern multilayer structure that enables flattening of the conductor pattern multilayer structure.

[Means to solve the problem]

In order to solve the problem described in item 1, the present invention provides a method for forming a conductor pattern multilayer structure in which a plurality of conductor patterns are sequentially laminated on a substrate through an insulating layer, the step of forming the insulating layer being formed. , a step of forming a first insulating layer having substantially the same thickness around the conductor pattern, and a step of forming a second insulating layer between the conductor pattern and the first insulating layer. Composition and 17.

[Effect]

forming a first insulating layer with substantially the same thickness as the conductor pattern;
By removing the upper part of the conductor pattern from the first insulating layer, a first insulating layer having substantially the same thickness as the conductor pattern is placed around the conductor pattern. By forming the second insulating layer thereon, the surface becomes flat. Therefore, the next conductor pattern is formed on a flat surface.

That is, the conductor pattern is always formed on the flat surface of the insulating layer.

Further, the second conductor pattern 2b electrically insulates the conductor patterns under "1" from each other.

〔Example〕

Hereinafter, two embodiments of the present invention will be described using a surface conductor pattern of a green sheet multilayer wiring board as an example. In general, many materials used for insulating layers do not function as an insulating material unless they are finally thermally cured. During the heat curing process, the coating layer undergoes volumetric shrinkage. Therefore, in the embodiment described below, a configuration is adopted that takes this volumetric contraction into consideration. In addition, the case where the insulating material is a photosensitive insulating material and the case where a non-photosensitive insulating material is used will be explained separately.

A first embodiment of the present invention will be described in the case where a photosensitive insulating material is used as the insulating material. Examples of the photosensitive insulating material include photosensitive polyimide.

FIG. 1 is a block diagram showing the steps of a method for forming a multilayer conductor pattern structure according to the present invention. FIG. 2 shows the conditions in each step.

First, in step 101, a first conductor pattern 1a is formed on the surface of the ceramic multilayer substrate 4, as shown in FIG. 2(A). The conductor pattern 1a is formed parallel to the ceramic multilayer substrate 4, and the film thickness of the conductor pattern 1a is t.

Next, a coating layer forming step 102 is performed. As shown in FIG. 2(B), the iron applies coating 1!2a' to conductor pattern
Form by covering a. The thickness of the coating layer 2a'' is t, which is the second thicker layer. Volume shrinkage occurs due to heat curing, which will be described later, and the thickness becomes approximately the same as 1+ (t+ #).
The film thickness is made thicker than the film thickness 1+ of the +5 conductor pattern due to the shrinkage so that the thickness becomes t*).

That is, t, ++ is the thickness shrunk by heat curing. The portion 2a'-1 where the coating layer 2a' and the first conductor pattern 1a overlap is in a state where it is more raised than the surrounding portions.

Next, in step 103, an exposure and development step is performed to remove the upper part of the first conductor pattern 1a from the coating layer 2a' to expose the upper surface of the first conductor pattern 1a.

First, as shown in Figure 2 (C), apply J! On top of i2a',
Cover with exposure mask 3. This mask 3 has the same pattern as the first conductor pattern. In other words, the pattern is opaque in the 1ai portion and transparent in the rest.

In this state, exposure is performed and then development is performed.

As a result, the coating layer portion 2a of the conductor pattern Ia1 portion
'-1 is removed, and as shown in FIG. 2(D), the upper surface of the layer 11 consisting of the first conductive pattern 1a and the first insulating layer 2a' is made flat and parallel to the substrate. Ru.

Next, in step 104, a thermosetting step is performed to dry and harden the coating layer 2a' containing the solvent. This allows the second
As shown in Figure (E), the coating layer 2a' has a thickness t, which is approximately the same as 1+, as described above. Volume shrinkage due to heat curing is generally about 40% to 50% of the original volume. Note that, depending on the heat curing, the coating layer 2a"
This becomes the insulating layer 2a.

The above steps 102 to 104 are steps for forming the first insulating layer 2a.

Thereafter, step 105 is performed to form a second insulating layer 2b on the layer 11, as shown in FIG. 2(F). Second
The insulator covering the insulating layer 2b is made of the same material as the first insulating layer 2a. The second insulating layer 2b is the second insulating layer laminated thereafter.
The conductive pattern lb and the conductive pattern 1a are electrically insulated from each other. Further, since the upper surface of the layer 11 is flat, the second insulating layer 2a is formed with its surface 2b-1 flattened.

Next, step 106 is performed, and as shown in FIG. 2(G),
It is formed parallel to 2 cm 1 of the surface of the second insulating layer 2b. This second conductor pattern lb is arranged parallel to the substrate even in the portion where it overlaps with the first conductor pattern 1a.

Thereafter, step 107 is performed in the same manner as step 102 to form a coating layer 2c' on and around the second conductor pattern 1b. Subsequently, step 108 is performed in the same manner as step 103, and the coating layer on the top of the second conductor pattern 1b is removed, and the second conductor pattern 1b is removed.
The upper surface of the conductor pattern 1b is exposed. Step 109 is carried out in the same manner as step 104, and a heat curing treatment is carried out, followed by drying and curing, and a coating layer 2c having approximately the same thickness as the second conductor pattern is disposed. Finally, step 110 is performed in the same manner as step 105 to form the second insulating layer 2d.

The upper surface 2d-1 of the second insulating layer 2d is flat. and,
Step 111 is performed to form a third conductive pattern IC on the surface 2d-1 of the second insulating layer 2d, as shown in FIG. 2(H).
form.

By laminating the layers by the method of the present invention, a multilayer structure of conductive patterns is formed on the surface of the ceramic multilayer substrate 4 in a flattened state as shown in FIG. 2(G).

For this reason, insulating layers 2a to 2d and conductor patterns 1a to IC
Even if thermal stress occurs due to the difference in coefficient of thermal expansion between the conductor patterns 1a and 1c, this will not be concentrated in the areas where the conductor patterns 1a-1c overlap. A~IC disconnection is reliably prevented.

A second embodiment of the present invention will be described in the case where a non-photosensitive insulating material is used as the insulating material. Examples of the non-photosensitive insulating material include non-photosensitive polyimide.

FIG. 3 is a block diagram showing the steps of a method for forming a multilayer conductor pattern structure according to a second embodiment of the present invention. The difference from FIG. 1 is that after forming a coating layer of a non-photosensitive insulating material, thermal curing and etching are performed to arrange the first insulating layer around the conductive pattern. A concrete explanation will be given below with reference to FIGS. 3 and 4. FIG. 4 shows the state in each step of FIG. 3.

First, step 301 in FIG. 3, which is similar to step 101 in FIG. 1, is performed to form a first conductor pattern 1a having a thickness of t1 on the surface of the ceramic multilayer substrate 4, as shown in FIG. 4(A).

Next, step 302 in FIG. 3, which is similar to step 102 in FIG.
As shown in FIG. 4(B), a coating layer 2a'' having a thicker thickness t is formed in consideration of shrinkage due to heat curing.

Next, a heat curing process in step 303 is performed to form the coating layer 2a.
” has a function as an insulating layer, and the coating layer 2a
” contracts, and as shown in FIG. 4(C), the film thickness t2 becomes t.
The film thickness t3 is approximately the same as l. In addition, due to heat curing,
The coating layer 2a'' becomes an insulating layer 2a''-1.

Subsequently, in step 304, an etching process is performed to expose the upper part of the first conductor pattern 1a. First, an etching mask 7 having a pattern opposite to that of the conductor pattern is formed on the insulating layer 2a''-1 as shown in FIG. The part not covered by the mask 7 is etched, and then the etching mask 7 is removed.After removal, as shown in FIG. A first insulating layer 2a having a thickness is formed.

Below, Step 3 in Figure 3, which is similar to Steps 105 and 106 in Figure 1.
05 and 306 are performed, and as shown in FIGS. 4(F) and 4(G), the second insulating layer 2b and the second conductor pattern 1b are formed. Thereafter, steps 308 and 309 similar to steps 303 and 304 in FIG. 3 are performed, and after thermal curing and etching, a step 311 similar to step 301 is performed to form a third conductor pattern lc. It goes without saying that the multilayer structure formed by the second embodiment of the present invention also has the same features as the first embodiment.

Note that the method for forming a conductor pattern multilayer structure according to the present invention is not limited to the surface of a ceramic printed wiring board, but can be applied by forming a plurality of conductor patterns on a substrate such as a general polyimide through an R layer. It can be applied to all methods of forming printed wiring boards that are formed by sequentially laminating layers.

〔Effect of the invention〕

As explained above, according to the present invention, by dividing the formation of an insulating layer into two steps, it is possible to flatten the overlapping portion of the conductor patterns in the formation of a multilayer conductor pattern structure. This avoids the concentration of thermal stress and prevents the conductor pattern from breaking. Furthermore, it is possible to improve the accuracy of printed wiring boards.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the steps of a method for forming a multilayered conductor pattern structure according to the first embodiment of the present invention, and FIG. 2 is a diagram illustrating the method for forming a multilayered conductor pattern structure according to the first embodiment of the present invention. , FIG. 3 is a block diagram showing the steps of a method for forming a multilayered conductor pattern structure according to the second embodiment of the present invention, and FIG. 4 illustrates a method for forming a multilayered conductor pattern structure according to the second embodiment of the present invention. Figure 5 is a sectional view of the main parts of a ceramic printed wiring board, Figure 6 is a diagram showing the steps of a conventional method for forming a multilayer conductor pattern structure, and Figure 7 is an explanation of a conventional method for forming a multilayer conductor pattern structure. This is a diagram. In the figure, (2) is a conductor pattern formed on the surface layer, 1a is a first conductor pattern, 11) is a second conductor pattern, Ic is a third conductor pattern, 2 is an insulating layer, 2a', 2a'' is a coating layer, 2a and 2c are first insulating layers, 2b and 2d are second insulating layers, 3 is an exposure mask, 4 is a ceramic laminated board, 5 is a via, 6 is a conductive pattern inside the wiring board , 7 is an etching mask, IO is a ceramic printed wiring board, 11 is a layer consisting of a first conductor pattern 1a and a first insulating layer 2a, OL is a first conductor pattern forming process, 02 is a coating layer forming process, 03 is an exposure/development process, 04 is a thermosetting process, and 05 is a second insulating layer forming process.The conductor pattern forming process of Saihide 2, the first conductor pattern forming process, and the coating layer forming process , a heat curing process, an etching process, a second insulating layer formation process, a second conductor pattern formation process

Claims (3)

[Claims] (1) A method for forming a conductor pattern multilayer structure in which a plurality of conductor patterns (1a) are sequentially laminated on a substrate (4) via an insulating layer (2), the step of forming the insulating layer (2). forming a first insulating layer (2a) having substantially the same thickness as the conductor pattern around the conductor pattern (1a); 2a
) A method for forming a multilayer conductor pattern structure, characterized in that the method comprises the step of forming a second insulating layer (2b) on top of the conductor pattern. (2) A method for forming a conductor pattern multilayer structure in which a plurality of conductor patterns (1a) are sequentially laminated on a substrate (4) via an insulating layer (2), the step of forming the insulating layer (2). a step (102) of forming a coating layer (2a') by applying a photosensitive insulating material to a thickness (t_2) that is thicker than the thickness (t_1) of the conductor pattern (1) by the amount of curing shrinkage; A step (103) of removing the upper part (2a'-1) of the conductor pattern (1) of the coating layer to expose the conductor pattern, and thermally curing the partially removed coating film to form the conductor pattern. The first insulating layer (2
a); and a step (105) of forming a second insulating layer (2b) on the conductive pattern (1a) and the first insulating layer (2a). A method for forming a multilayer conductor pattern structure, characterized in that: (3) A method for forming a conductor pattern multilayer structure in which a plurality of conductor patterns (1a) are sequentially laminated on a substrate (4) via an insulating layer (2), the step of forming the insulating layer (2). a step (302) of applying a non-photosensitive insulating material to a thickness (t_2) that is thicker than the thickness (t_1) of the conductor pattern (1a) by the amount of curing shrinkage to form a coating layer (2a''); a thermosetting step (303) of thermosetting the applied layer to form a first insulating layer (2a'') having a thickness (t_3) substantially the same as the thickness of the conductor pattern; 2a″), the above conductor pattern (
1a) to expose a conductor pattern by removing the upper part of the conductor pattern (1) and the first insulating layer (2a'');
) A method for forming a multilayer conductor pattern structure, characterized in that the method comprises the step of forming a second insulating layer (2b) on top of the conductor pattern.