JPH02268524A - Digital/analog converter - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to digital-to-analog converters.

[Prior Art 1] As shown in FIG. 2, the power supply voltage was used as the gate signal of the Ranjisk field effect type (MOS) which switches the resistance value used in a conventional digital-to-analog converter.

[Problem to be solved by the invention]

In conventional digital-to-analog converters, when the power supply voltage changes, the on-resistance of the field effect transistor shown in Figure 2 changes with the change in power supply voltage, so the resistance value seen from the operational amplifier terminals changes, causing the output voltage to change. It will change.

Therefore, in conventional digital-to-analog converters, the on-resistance must be sufficiently smaller than the resistance value used in the digital-to-analog converter so that changes in on-resistance due to changes in power supply voltage can be ignored, so the size of the field-effect transistor is not increased. It was not possible to obtain stable output against changes in power supply voltage.

[Means for Solving the Problems] The digital-analog converter of the present invention is a resistor network type digital-analog converter that controls the output voltage of the operational amplifier by switching the resistance value placed between one input of the operational amplifier and GND. The converter is characterized in that a field effect transistor is used as the means for switching the resistance value, and the gate electrode of the field effect transistor is driven with a constant voltage higher than the voltage decomposed by the digital-to-analog converter.

〔Example〕

FIG. 1 shows a ladder resistance type 3-bit digital-to-analog converter according to an embodiment of the present invention. The voltage at the terminals of the operational amplifier is determined by the states of inverters a, b, and c and the resistance. , p, q, r
, s, t and the on-resistance of the MOS transistor used in the inverter.

For example, the states of inverters a, b, and c are Off and Off.
, on will be explained. In a ladder resistance type digital-to-analog converter, the resistance q is the sum of the resistances p, r, t and the on-resistance of the MOS transistor.

It is twice the size of S and is the same as resistance 0.

The voltage at the terminals of an operational amplifier can be expressed by the following formula.

Vin=V ref* (b +/2 + bJ2”
+ bi/2 ”) Here, Vin is the voltage at the terminal of the operational amplifier, V ref is the voltage decomposed by the digital-to-analog converter, b 1.bz , bs is the voltage at the inverter a,
In the case of 0 cases in states b and c, V in = V re
It becomes f/2.

The on-resistance of the MOS l-transistor, which is a problem here, is determined by the voltage difference between the drain and source and the gate voltage. In the present invention, since the gate is driven by inverters d, e, and f, the gate voltage is a constant voltage V con or G which is higher than V ref.
It becomes ND. The drain current of a non-saturated MOS transistor can be expressed by the following equation.

I 61=βffvqq−vtl* Vo −1/
2 * Vo”) where I 66 is the drain current,
β is the current amplification factor, ■1. is the gate voltage and vo is the train voltage. The on-resistance of a MOS transistor is 0,
If it is sufficiently smaller than the resistance of p, q, r, s, and t, the first
In the circuit shown in the figure, the voltage difference between the drain and source is small, so the term 172*Voo'' in the above equation can be ignored, so the MOS l-transistor can be regarded as a resistance whose value can be expressed as β (V Q, -V -). .

Furthermore, this value does not depend on the power supply voltage, so even if the power supply voltage changes, the on-resistance of the MOS1 transistor does not change. However, in the conventional circuit shown in Figure 2, the voltage of the signal input to the gate of the MOS1 transistor is Since it is a voltage, the on-resistance of the MOS l-transistor is the resistance o, p, q, r
, s, and t, so that the on-resistance is β(VQ, -V
,) Even if it becomes flooded with the power supply voltage ■9
．． The value of on-resistance changes because of the change in . In this way, in the conventional circuit, when the power supply voltage changes, the on-resistance of the switching MOS transistor changes, so the output voltage changes, but in the circuit using the present invention, the power supply voltage changes. Although the above example describes a ladder resistance type 3-bit digital-to-analog converter, the same applies to n-bit ladder resistance type and weighted resistance type digital-to-analog converters.

[Effects of the Invention] As described above, according to the invention, the power supply voltage can be reduced by driving the gate electrode of the field effect transistor, which is a means for switching the resistance value, with a constant voltage higher than the voltage decomposed by the digital-to-analog converter. A stable and highly accurate output voltage can be obtained even when the voltage changes.

Furthermore, since the on-resistance of the field-effect transistor is constant, the on-resistance of the field-effect transistor can be taken into consideration when determining the resistance value of the digital-to-analog converter. The size of the effect transistor can be reduced, and the chip size of the semiconductor integrated circuit can be reduced.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the digital-analog converter of the present invention. FIG. 2 is a circuit diagram showing a conventional digital-analog converter. o, p, q, r, s, t...
Resistance a, b, e 2° 9 VDD” VCON' ・Inverter ・Operational amplifier ・Power supply voltage ・Constant voltage Applicant Seiko Epson Corporation Representative Patent attorney Kizobe Suzuki (1 other person) Figure 1

Claims (1)

[Claims] In a resistor network type digital-to-analog converter that controls the output voltage of the operational amplifier by switching a resistance value placed between one input of the operational amplifier and GND,
A digital-to-analog converter, characterized in that a field-effect transistor is used as the means for switching the resistance value, and the gate electrode of the field-effect transistor is driven with a constant voltage higher than the voltage decomposed by the digital-to-analog converter.