JPH022705A - Driving circuit for semiconductor switching device - Google Patents

Abstract

PURPOSE:To obtain a satisfactory switching characteristic with high efficiency by controlling the voltage of a control power source supplied to a pair of switching devices for driving corresponding to the ON-state duty of a control signal. CONSTITUTION:A voltage control means is equipped with a means A to discriminate the ON-state duty of the control signal Va, transistors Q4 and Q5 turned on selectively by the means A, a DC power source Vcc1 which becomes the control power source Vcc for transistors Q1 and Q2 at the time of turning on the Q4, and a DC power source Vcc2 which becomes the control power source Vcc for the transistors Q1 and Q2 at the time of turning on the Q5. The discrimination means A discriminates whether or not the ON-state duty of the control signal Va exceeds 50%, and turns on the Q4 when it is less than 50%, and turns on the Q5 when it exceeds 50%. Therefore, when the ON-state duty of the control signal shows a large value, a sufficient voltage VGS between the gate and the source of a FETQ3 can be supplied and switching loss can be eliminated by increasing the voltage of the control power source Vcc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] The present invention relates to a drive circuit that controls switching of a semiconductor switching element.

[Prior Art 1] A conventional drive circuit for a semiconductor switching element is shown in FIG. This drive circuit is a semiconductor switching element MO
8FETQ: An insulated type that drives l, NPN type and PNP type that are interconnected complementary and turn on and off alternately.
1) A capacitor C7 as an auxiliary power supply that is charged when transistor Q is turned on and discharged when transistor Q2 is turned on, and an input winding Ll+ is connected in series with this capacitor CI. Output @ IIA L due to charging/discharging current of capacitor CI
, 2 to the date of FETQ, thereby turning on and off FETQ. Note that the transistors Q, Q2 operate using a control N source Vcc, which is a DC power source, as a power source, and are alternately turned on and off by a control signal Va applied to their commonly connected bases. In addition, the output winding L of the pulse transformer PT
The voltage induced in 12 is applied to FETQ through a bias circuit consisting of bias resistors R, R2, and diode D.
is applied to.

The control signal VIL applied to the bases of transistors Q, , Q2 is shown in FIG. 6(g). Now, for example, time t.

As shown at ~t2, when the control signal Va is at a high level, the transistor Q1 is turned on, and the control power supply Vcc connects the transistor Q, the input winding Ll+, and the capacitor C.
1 and a current flows, and the voltage VC5 between the gate and source of FETQ becomes as shown in FIG. 6(c). That is, when transistor Q is on, voltage VC9+ is applied between the date and source of FET Q, and FET Q3 is forward biased and turned on.

Further, when the control signal Va is at a low level as shown from time t2 to time t, the charge charged in the capacitor CI when the transistor Q is turned on is used as a power source.
Capacitor C input winding L l 1, transistor Q2
A current flows, a voltage VC5- is applied between the data source and the source of FETQ, and FETQ is reverse biased and turned off. In this drive circuit, when the transistor Q1 is turned on, the FET Q3 is forward biased via the pulse transformer PT, and at the same time, the capacitor C5 is charged, and the charge charged in the capacitor C1 is used as an auxiliary power source to drive the FET
Since Q is reverse biased, it has the advantage of good efficiency.

By the way, the electric charge charged in the capacitor C1 depends on the on-duty (= T orb/T ) of the control signal Va. For example, when the on-duty is large,
The on time of transistor Q becomes longer, and capacitor C
1's voltage Vcl increases. Therefore, when transistor Q is turned on, input winding #1 of pulse transformer PT
The voltage applied to jL11 is the voltage obtained by subtracting the voltage Vc across the capacitor C1 from the voltage of the control power supply VcC, and the date-source voltage VCS of FETQ is as shown in Fig. 6 (
The voltage will be lower than the voltage VC5+ in c). For this reason, the date-source voltage VC5 is insufficient, and F E
There is a problem that the on-state voltage of T Q z increases and switching loss increases.

On the other hand, when the on-duty of the control signal Va is small, the charge in the capacitor C1 is insufficient, and as a result, when the transistor Q2 is turned on, the voltage VC5- applied between the date and source of the FET Q becomes low, and the switching speed of the FET Q3 decreases. is delayed. Therefore, such conventional drive circuits have the disadvantage that the on-duty range must be narrowed.

[Problem to be Solved by the Invention 1] The present invention has been made in view of the above points, and its purpose is to provide high efficiency and good switching without being affected by the on-duty of control signals. An object of the present invention is to provide a driving circuit for a semiconductor switching element that can obtain characteristics.

[Means for Solving the Problems 1] In order to achieve the above object, the present invention includes a pair of drive switching elements that are alternately turned on and off by a control signal, and a pair of drive switching elements that are charged by turning on one of the drive switching elements. A capacitor whose charged charge is discharged when the other driving switching element is turned on, and an input winding inserted into the charging/discharging path of this capacitor, and the voltage induced in the output winding by the charging/discharging current of the capacitor are connected to a semiconductor switching device. A pulse transformer that switches the semiconductor switching element by applying voltage to a control terminal of the element, and a voltage adjustment means that adjusts the voltage of the control power supply supplied to the pair of drive switching elements in accordance with the on-duty of the control signal. ing.

(Function) As described above, the present invention includes a voltage adjustment means that adjusts the voltage of the control power supply supplied to the pair of driving switching elements according to the on-duty of the control signal.
Adjusting the voltage of the control power supply by a voltage adjustment means in accordance with changes in the on-duty of the control signal to prevent excess or deficiency from occurring in the voltage applied to the control terminal of the semiconductor switching element,
This makes it possible to obtain high efficiency and good switching characteristics without being affected by the on-duty of the control signal.

(Example 1) Figure @1 shows an example of the present invention. In this embodiment, control 4
The configuration of the basic circuit that controls the switching of F E 'r Q 3 according to No. 4 Va is the same as the conventional circuit shown in FIG. 5, and the voltage of the control power supply Vcc is adjusted according to the on-duty of the control signal Va. It is characterized by the provision of voltage adjustment means. The voltage regulating means includes a determining means A that determines the on-duty of the control signal Va, and two transistors Q that are selectively turned on and off by the determining means A.
Q, and a DC power supply Vce1 that supplies power as a control power supply Vcc to the transistor QItQ2 when the transistor Q4 is turned on, and a DC power supply Vce1 that supplies power as the control power supply Vce to the transistors Q, , and Q2 when the transistor Q5 is turned on. It consists of a power supply Vce2. The determining means A of this embodiment determines whether the on-duty of the control signal (a) is greater than or equal to 50%, and turns on the transistor Q when the on-duty is less than 50%. % or more, transistor Q is turned on.

In addition, in this case, the voltage of DC power supply Vcc2 is DC power supply Vc
The voltage is higher than that of c.

Now, when the control signal Va is less than 50%, the transistor Q is turned on. The operation of the drive circuit at this time is
It is the same as the conventional example except that the control power supply Vcc becomes Vccl, and there is no difference in operation (it operates. By the way, when the control power supply Vcc is constant, the on-duty of the control signal Va is 50% or more. In this case, as explained in the conventional example, the voltage Vcl across the capacitor C1 increases, and the voltage between the date and source of FETQ becomes insufficient, increasing the winching loss. When the on-duty becomes large, the control power supply Vcc is set to Vccz (the voltage of the DC power supply Vcc2), so the above problem does not occur.In other words, the pulse transformer PT,
Considering the case where the input winding Ll+ and the output 8 wires, the turns ratio of □ is 1:1, FETQ.

The date-source voltage VC5 of is VC5=Vcc Vc. On the other hand, Vcl is determined by the on-duty of the control signal Va and is proportional to Vce, so V r,s
= Vce(1-f). However, f is a function of on-duty, and the higher the on-duty, the larger f becomes.

Now, when Vee=VccI, V C5I = V C(jl (1-f), and when Vec=Vcc2, VH5□=Vcez(1
-f). If (1-f) are the same, VC52>VC
It becomes 5. Therefore, when the on-duty of the control signal Va is large, the voltage of the control power supply Vec is increased, and a sufficient date-source voltage VH5 can be supplied to the FET Q 3, and switching loss does not occur.

(Example 2) FIG. 2 shows another example of the present invention. In this embodiment, the voltage of the control power supply Vcc is varied by a boost chopper circuit in accordance with the on-duty of the control signal Va. In this embodiment, the external pressure chopper circuit is composed of a transistor Q7, a diode D2, a choke coil L2%, and a capacitor C2, and a control circuit B controls switching of the transistor Q7. Note that this control circuit B uses a PWM control system, and this control circuit B detects the voltage across the capacitor C2, that is, the voltage of the control power supply Vcc, using a voltage dividing circuit composed of resistors R1 to R7. Then, the switching of transistor Q7 is controlled so as to keep this voltage constant. The determining means A for determining the on-duty of the control signal Va is similar to the first embodiment described above, and turns on the transistor Q6 when the on-duty is large, and turns off the transistor Q6 when the on-duty is low.

When the on-duty of the control signal Va is smaller than the discrimination criterion, the discrimination means A turns off the transistor Q6. Therefore, the divided voltage output Vs of the voltage dividing circuit at this time is as follows, and the control circuit B controls the switching of the transistor Q7 to boost the power source (2) to obtain a constant voltage control power source Vcc.

When the on-duty of the control signal Va becomes larger than the discrimination criterion, the discrimination means A discriminates this and turns on the transistor Q6. Therefore, the divided voltage output V of the voltage dividing circuit
s becomes. At this time, the divided voltage output Vs becomes smaller, so the control circuit B controls the switching of the transistor Q7 to make the control power supply Vce higher.
The voltage c becomes a constant voltage higher than that in the case where the on-duty is small. Therefore, as in the first embodiment described above, when the on-duty of the control signal Va is large, the voltage of the control power supply Vcc is increased, and a sufficient date-source voltage VC5 can be supplied to the FETQ, without causing switching loss. Moreover, unlike the first embodiment, this embodiment does not require a plurality of DC power supplies, so it is more suitable for miniaturizing the device.

(Embodiment 3) FIG. 3 is a diagram showing still another embodiment of the present invention, and this embodiment also uses an external pressure chopper circuit to vary the voltage of the control power supply Vcc according to the on-duty of the control signal Va. It is something. In this embodiment, the control signal Va is applied to the base of the transistor Q IIQ 2 via an inverter, and the control signal Va is applied to the base of the transistor Q IIQ 2 of the external pressure chopper circuit of the above-mentioned second embodiment.

As such, transistor Q2 is used. Note that since the control signal Va is inverted by the inverter I, the input winding L of the pulse transformer PT is connected to both ends of the transistor Q.
A series circuit of + and capacitor C1 is connected. That is, in this embodiment, the output obtained by inverting the control signal Va by the inverter I is used instead of the output of the control circuit B of the second embodiment, and the transistor Q2 is used for charging the capacitor C5 and as a switching element of the step-up chitappa circuit. It is also used for both.

In operation, when the on-duty of the control signal Va is large, the transistor Q2 is turned on for a long time.
When the voltage of the control power supply Vcc, which is the output of the boost chopper circuit, increases and the on-duty of the control signal Va is small, the on-period of the transistor Q2 becomes shorter, and the voltage of the control power supply Vce decreases. Therefore, the same effects as those of the above embodiments can be expected. Moreover, in this embodiment, unlike the above-mentioned embodiments, there are no discontinuous operating points, and the voltage of the control power supply Vcc can be changed linearly according to the on-duty of the control signal Va, making the drive circuit stable. It can be made to work. Also, the configuration is considerably simpler than the second embodiment.

(Embodiment 4) FIG. 4 shows yet another embodiment, in which a so-called shunt regulator is used to adjust the voltage of the control power source ■cc. In this embodiment, the xyant regulator is composed of a transistor Qs1 and a comparator circuit. The comparator circuit is composed of an operational amplifier OP1, and is designed to compare the reference voltage Vr with the voltage Vc+ across the capacitor C5. , the on-period of the transistor Q is adjusted by the output of this comparator circuit, and the capacitor C1
The voltage of the control power supply Vcc is adjusted so that the voltage Vcl across the terminal is constant. According to this embodiment, as mentioned above, the voltage Vcl across the capacitor C1 can always be kept constant, so even when the on-duty of the control signal Va is small, the date and source are reversed so as to sufficiently remove the date charge of the FET Q3. Biasing: It is possible to increase the switching speed of FETQ.

[Effects of the Invention j As described above, the present invention includes a voltage adjusting means for adjusting the voltage of the control power supply supplied to the pair of drive switching elements according to the on-duty of the control signal. By adjusting the voltage of the control 'KL source with the voltage adjusting means in accordance with changes in the on-duty of the control signal, it is possible to prevent excess or deficiency in the voltage applied to the control terminal of the semiconductor switching element. It is particularly effective to obtain high efficiency and good switching characteristics without being influenced by the

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment of the same as above, FIGS. 3 and 4 are circuit diagrams of still other embodiments, and FIG. The circuit diagram of the conventional example, FIG. 6, is an explanatory diagram of the same operation. Va is a control signal, Q, Q2 is a trannostar, C is a capacitor, PT is a pulse transformer, L, 1 is an input winding,
L12 is the output winding, Q is the FET5Vcc is the control power supply,
1 is a voltage adjustment means. Agent Patent Attorney Ishi 1) Ai Figure 7 Figure 3 Figure 4

Claims (1)

[Claims] (1) A pair of drive switching elements that are alternately turned on and off by a control signal, and a capacitor that is charged when one drive switching element is turned on and whose charge is discharged when the other drive switching element is turned on. ,
a pulse transformer in which an input winding is inserted into the charging/discharging path of the capacitor, and a voltage induced in the output winding by the charging/discharging current of the capacitor is applied to a control terminal of the semiconductor switching element to switch the semiconductor switching element; A driving circuit for a semiconductor switching element, comprising voltage adjusting means for adjusting the voltage of a control power supply supplied to the pair of driving switching elements in accordance with the on-duty of the control signal.