JPH0227229U

JPH0227229U -

Info

Publication number: JPH0227229U
Application number: JP10510488U
Authority: JP
Priority date: 1988-08-08
Filing date: 1988-08-08
Publication date: 1990-02-22

Description

[Brief explanation of drawings]

第１図は本考案の一実施例のブロツク図、第２
図は従来のトレース装置を示すブロツク図である
。１……トレースメモリ、２ａ，２ｂ……ポイン
タ信号出力部、３……トレース条件保持部、４…
…照合部、５……サンプリングされたデイジタル
信号、６ａ，６ｂ……出力データ、７ａ，７ｂ…
…ポインタ信号、８ａ，８ｂ……トレース条件デ
ータ、９……トレース条件照合結果信号、１０…
…ポインタ制御部、１１……ポインタ制御信号。 Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is a block diagram showing a conventional tracing device. 1...Trace memory, 2a, 2b...Pointer signal output unit, 3...Trace condition holding unit, 4...
...Verification unit, 5...Sampled digital signal, 6a, 6b...Output data, 7a, 7b...
...Pointer signal, 8a, 8b...Trace condition data, 9...Trace condition matching result signal, 10...
. . . Pointer control unit, 11 . . . Pointer control signal.

Claims

[Claims for Utility Model Registration] A portion of the input digital signal is sampled, individual digital data constituting the sampled digital signal is written to the trace memory, and the written data is processed in accordance with an external request. A trace device that reads and outputs digital data includes: (A) a trace condition holding unit that holds trace condition data indicating conditions for writing sampled digital data into the trace memory; (B) sampled digital data; data and the trace condition data outputted from the trace condition holding section, collate whether or not the sampled digital data satisfies the conditions indicated by the trace condition data, and output a trace condition collation result signal. (C) a verification unit that receives the sampled digital signal, counts the number of sequentially input digital data using a built-in counter, and determines when the digital data satisfies the trace condition based on the trace condition verification result signal; , generate digital write information for writing digital data into the trace memory and address increment information for incrementing the address of the pointer signal, and perform pointer control using the digital write information and address increment information. When a signal is configured and output, and the trace conditions are not met, the number of digital data that has been combined with the digital data write prohibition information and this digital data and has already been input and counted is calculated. (D) a pointer control unit that generates address increment information that returns the address of the pointer signal to its original value by the number of times the address is reset, and outputs it as a pointer control signal; (D) a pointer control unit that receives the pointer control signal and writes the digital data to the trace memory; A trace device comprising: a pointer signal output section that generates and outputs the pointer signal that specifies an instruction as to whether or not to input the trace memory and an address of the trace memory.