JPH02273986A - Thick film circuit board - Google Patents
Thick film circuit boardInfo
- Publication number
- JPH02273986A JPH02273986A JP9697289A JP9697289A JPH02273986A JP H02273986 A JPH02273986 A JP H02273986A JP 9697289 A JP9697289 A JP 9697289A JP 9697289 A JP9697289 A JP 9697289A JP H02273986 A JPH02273986 A JP H02273986A
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- Japan
- Prior art keywords
- conductor
- resistor
- layer
- circuit board
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、厚膜ハイブリッドIC回路を有する厚膜回路
基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a thick film circuit board having a thick film hybrid IC circuit.
(従来の技術)
従来より、アルミナなどのセラミック基板に導電層や抵
抗体層、絶縁体層などをスクリーン印刷法により形成し
た厚膜回路基板が知られており、その厚膜回路基板の構
造は、例えば第2図に示すようである。(Prior art) Thick film circuit boards have been known in which conductive layers, resistor layers, insulator layers, etc. are formed on a ceramic substrate such as alumina by screen printing, and the structure of the thick film circuit board is , for example, as shown in FIG.
この厚膜回路基板の製造法について説明すると、まず、
アルミナ等のセラミックス材料で形成された絶縁基板!
上に、例えばAg系の導体ペーストをスクリーン印刷法
にて印刷し、酸化雰囲気中800〜900℃の温度領域
で焼付して導体層2を形成する0次に絶縁基板l上に前
記導体層2に重なるように1例えば酸化ルテニウム系の
抵抗ペーストを印刷し、800〜900℃の温度領域で
焼付して抵抗体層3を形成する。また通常は、この導体
層2と抵抗体層3の上に保護ガラスペーストを印刷し、
450〜600℃にて焼付して保護ガラス層を形成する
ことが多い。To explain the manufacturing method of this thick film circuit board, first,
An insulating substrate made of ceramic materials such as alumina!
For example, an Ag-based conductor paste is printed on the insulating substrate l by screen printing and baked in an oxidizing atmosphere at a temperature range of 800 to 900°C to form the conductor layer 2. For example, a ruthenium oxide resistor paste 1 is printed so as to overlap with the resistor layer 3, and baked in a temperature range of 800 to 900° C. to form the resistor layer 3. Usually, a protective glass paste is printed on the conductor layer 2 and the resistor layer 3.
A protective glass layer is often formed by baking at 450 to 600°C.
この場合、抵抗体層3の抵抗値Rは、抵抗ペーストのシ
ート抵抗と抵抗体の形状によって設計値になるように調
整される。ここに、例えば第3図に示すように、抵抗体
の長ざをし、抵抗体の幅をWとすると、抵抗値Rが例え
ばR=10にΩの抵゛抗体を形成する場合、シート抵抗
10にΩ/口の抵抗ペーストを、L= 1 mm、W=
l mmになるように印刷し、焼付する。さらに抵抗
値の微調整が必要な場合には、レーザトリミング法等に
より設定値になるように調節する。In this case, the resistance value R of the resistor layer 3 is adjusted to a designed value based on the sheet resistance of the resistor paste and the shape of the resistor. For example, as shown in FIG. 3, if the length of the resistor is W and the width of the resistor is W, then when forming a resistor with a resistance value R of Ω, for example, R=10, the sheet resistance is 10 with resistance paste of Ω/mouth, L=1 mm, W=
Print and bake to a size of 1 mm. Furthermore, if fine adjustment of the resistance value is required, the adjustment is performed using a laser trimming method or the like to reach the set value.
(発明が解決しようとする課題)
しかしながら、前述したアルミナの絶縁基板を用いた従
来の厚膜回路基板においては、抵抗体の形状効果と呼ば
れる問題がある。ここに「形状効果」とは、基板上に印
刷し焼付して得られた抵抗体のシート抵抗値が抵抗体の
形状により異なることをいう。また、例えば第4図に示
すように、抵抗体の長さしとシート抵抗値の関係につい
て、導体と抵抗体の組合わせにより、形状効果が異なる
ことも一般に知られている。(Problems to be Solved by the Invention) However, in the conventional thick film circuit board using the alumina insulating substrate described above, there is a problem called the shape effect of the resistor. Here, the term "shape effect" refers to the fact that the sheet resistance value of a resistor obtained by printing and baking on a substrate differs depending on the shape of the resistor. Further, as shown in FIG. 4, for example, it is generally known that the relationship between the length of the resistor and the sheet resistance value has different shape effects depending on the combination of the conductor and the resistor.
このため、市販の抵抗体についてはカタログデータに形
状効果が記載される場合があり、この場合ユーザはカタ
ログデータの記載に基づいてパターン設計することがで
きる。しかし実際には、ユーザごとに焼付条件が異なる
ため形状効果も微妙に異なってくるので、ユーザにとっ
てはテストパターンによって形状効果を確認した後でパ
ターン設計を行わなくてはならずパターン設計が煩雑に
なりがちである。For this reason, for commercially available resistors, the shape effect may be described in the catalog data, and in this case, the user can design a pattern based on the description in the catalog data. However, in reality, since the printing conditions differ for each user, the shape effect also differs slightly, so the user has to check the shape effect with a test pattern before designing the pattern, which makes pattern design complicated. It tends to happen.
また、周知の如く近年の電子機器の小型化、高性能化に
伴ない、厚膜回路基板材料には、アルミナよりも高熱伝
導性、低熱膨張性、低誘電性の優れた材料が要求され、
これに見合った基板材料として1種々の窒化アルミ基板
、低温焼成基板(LFC基板)が開発されている。In addition, as is well known, with the miniaturization and higher performance of electronic devices in recent years, materials for thick film circuit boards are required to have higher thermal conductivity, lower thermal expansion, and lower dielectricity than alumina.
Various aluminum nitride substrates and low-temperature fired substrates (LFC substrates) have been developed as substrate materials suitable for this purpose.
ところが5本発明者の行なった実験によると、窒化アル
ミ基板やLFC基板に対して市販の導体と市販の抵抗体
を用いる場合、抵抗体の焼付時に抵抗体と導体の境界部
の抵抗体にクラックが発生しやすいことが判明し、また
、導体なしで抵抗体のみを基板上へ印刷代焼付する場合
は、抵抗体のクラックが発生しにくいことが判明した。However, according to experiments conducted by the present inventor, when using commercially available conductors and commercially available resistors for aluminum nitride substrates or LFC substrates, cracks occur in the resistor at the boundary between the resistor and the conductor when the resistor is baked. It has also been found that cracks are less likely to occur in the resistor when only the resistor without the conductor is printed onto the substrate.
形状効果については、窒化アルミ基板やLFC基板の場
合もアルミナ基板の場合と同様に発現した。Regarding the shape effect, the same effect was observed in the case of the aluminum nitride substrate and the LFC substrate as in the case of the alumina substrate.
ここで導体が抵抗体層ご影響を与えることによって、抵
抗体の形状効果が生じることと、抵抗体のクラックが発
生することの2つを「電極効果」と定義する。Here, the two effects of the influence of the conductor on the resistor layer, such as the shape effect of the resistor and the occurrence of cracks in the resistor, are defined as "electrode effects."
電極効果が生じる原因は、抵抗体の焼付時に導体から抵
抗体中に成分拡散が生じ、導体近傍部の抵抗体が変質す
ることにより、その部分の電気的および熱的性質が変゛
化することによるものと考えられる。さらに具体的には
、形状効果が発生する原因は、導体中の主成分であるA
gと抵抗体の反応によるものであると考えられる。一方
、クラックの発生は導体膜中のガラス成分と抵抗体の反
応に起因すると考えられるが、導体は導体特性(はんだ
性、基板との接着強度の確保)を満足させるために、B
tiOs、ガラス、遷移金属酸化物等の添加物が必要不
可欠であるので、導体膜中のガラスを極端に減らしたり
、また組成を大幅に変更することはできない。The cause of the electrode effect is that when the resistor is baked, components diffuse from the conductor into the resistor, changing the quality of the resistor near the conductor and changing the electrical and thermal properties of that part. This is thought to be due to More specifically, the cause of the shape effect is A, which is the main component in the conductor.
This is thought to be due to the reaction between g and the resistor. On the other hand, the occurrence of cracks is thought to be caused by the reaction between the glass component in the conductor film and the resistor, but the conductor is
Since additives such as TiOs, glass, and transition metal oxides are essential, it is not possible to drastically reduce the amount of glass in the conductor film or to significantly change the composition.
本発明は、上記実情を考慮してなされたもので、厚膜回
路基板の構造を変えることで、電極効果がほとんどなく
、かつ製造時にクラックが発生せず、導体の特性も損な
わないような厚膜回路基板を提供することを目的とする
ものである
(課題を解決するための手段)
前記課題を解決するための本発明の厚膜回路基板は、絶
縁基板上に形成される第1の導体層と、前記絶縁基板上
に前記第1の導体層に重ならないように形成される抵抗
体層と、前記絶縁基板上に前記第°lの導体層上の一部
と前記抵抗体層上の一部とに重なるように形成される電
極効果の小さな第2の導体層を有することを特徴とする
。The present invention was made in consideration of the above-mentioned circumstances, and by changing the structure of the thick film circuit board, it is possible to achieve a thickness that has almost no electrode effect, does not cause cracks during manufacturing, and does not impair the conductor properties. It is an object of the present invention to provide a film circuit board (means for solving the problem).A thick film circuit board of the present invention for solving the above problem has a first conductor formed on an insulating substrate. a resistor layer formed on the insulating substrate so as not to overlap the first conductor layer; and a resistor layer formed on the insulating substrate so as not to overlap with the first conductor layer; It is characterized by having a second conductor layer with a small electrode effect formed so as to partially overlap with the second conductor layer.
ここに、第1の導体層に適する材料は、ハンダぬれ性、
耐ハンダくわれ性、ハンダ付は後の耐久接着強度等の導
体特性が良好である材料、例えばAg−Pd系、Ag−
Pt系で800〜b焼付温度の高温焼付ペーストを用い
るのが望ましい。Here, the material suitable for the first conductor layer has solder wettability,
Materials with good conductor properties such as solder resistance and durable adhesive strength after soldering, such as Ag-Pd series, Ag-
It is desirable to use a high-temperature baking paste that is Pt-based and has a baking temperature of 800-B.
第2の導体層に適する材料は、焼付温度が抵抗体ガラス
の軟化温度より低く(例えば650℃以下)、Ag以外
のガラスや金属酸化物がなるべく少なく、抵抗体へのA
gおよびガラス成分が拡散し難く、Agの焼結が充分で
ありシート抵抗値が充分に低い(例えば20mΩ/口以
下)ような材料が望ましい。A material suitable for the second conductor layer has a baking temperature lower than the softening temperature of the resistor glass (for example, 650°C or lower), contains as little glass or metal oxides other than Ag as possible, and has a
It is desirable to use a material in which g and glass components are difficult to diffuse, Ag is sufficiently sintered, and the sheet resistance value is sufficiently low (for example, 20 mΩ/mouth or less).
なお、前記第1の導体層、第2の導体層および抵抗体層
の上に保護ガラスペーストを印刷し、450〜600℃
にて焼付して保護ガラス層を形成してもよいことはもち
ろんである。Note that a protective glass paste is printed on the first conductor layer, second conductor layer, and resistor layer, and heated at 450 to 600°C.
Of course, the protective glass layer may also be formed by baking.
(実施例) 以下1本発明を図面にもとづいて詳細に説明する。(Example) The present invention will be explained in detail below based on the drawings.
本発明の厚膜回路基板の基本的な構造は、第1図に示す
とおりであり、厚膜回路基板20は、絶縁基板21上に
形成される第1の導体層22と、絶縁基板21上に第1
の導体層22に重ならないように形成される抵抗体層2
3と、絶縁基板21上に第1の導体層22上の一部と抵
抗体層23上の一部とに重なるように形成される電極効
果の小さな第2の導体層24から成っている。The basic structure of the thick film circuit board of the present invention is as shown in FIG. 1st to
The resistor layer 2 is formed so as not to overlap the conductor layer 22 of
3, and a second conductor layer 24 having a small electrode effect, which is formed on an insulating substrate 21 so as to overlap a part of the first conductor layer 22 and a part of the resistor layer 23.
このような構造をもつ厚膜回路基板を従来のものと比較
して試験した。本発明の実施例および比較例において用
いた材料は共通であり、下記に示すとおりである。A thick film circuit board with such a structure was tested in comparison with a conventional one. The materials used in the Examples and Comparative Examples of the present invention are common and are as shown below.
■「絶縁基板」は、アルミナを主成分とした低温焼成基
板であり、その熱膨張系数は室温〜約500℃の温度範
囲で5.3x I O−6/”Cである。(2) The "insulating substrate" is a low-temperature fired substrate mainly composed of alumina, and its thermal expansion coefficient is 5.3x I O-6/''C in the temperature range from room temperature to about 500°C.
■「第1の導体」は、重量比Ag : Pd=85=1
5のAg、Pdを主成分としたAg−Pd系導体であり
、添加物としてpbo−Bz O,−S+O,ZnO系
ガラス、B it Os 、ZnO3および微量の遷移
金属酸化物を、総量で金属成分に対して約10wt%含
んだ材料である。この材料を850℃にて基板上へ焼付
することにより、良好な導体特性(ハンダぬれ性、耐ハ
ンダくわれ性、ハンダ付は後の耐久接着強度5低配線抵
抗)が得られる。■The "first conductor" has a weight ratio of Ag:Pd=85=1
It is an Ag-Pd based conductor whose main components are Ag and Pd, and additives such as pbo-BzO, -S+O, ZnO-based glass, BitOs, ZnO3 and a trace amount of transition metal oxide are added to the metal in total. This material contains approximately 10 wt% of the components. By baking this material onto a substrate at 850° C., good conductor properties (solder wettability, solder breakage resistance, durable adhesive strength after soldering, 5 low wiring resistance) can be obtained.
■「第2の導体」は、低温焼付仕様の市販Δg導体であ
り、焼付温度はメーカ指定で500〜600℃である0
組成はAg l 00に対して約7%のホウケイ酸鉛と
BiaO+を添加した材料であり、この材料を500〜
600℃で焼付することによりシート抵抗10mΩ/口
となる。ただし、ハンダくわれ性が大きいので、ハンダ
が用いられる部位には不適である。■The "second conductor" is a commercially available Δg conductor with low-temperature baking specifications, and the baking temperature is 500 to 600℃ specified by the manufacturer.
The composition is a material in which approximately 7% lead borosilicate and BiaO+ are added to Ag l 00, and this material is
By baking at 600°C, the sheet resistance becomes 10 mΩ/hole. However, it is unsuitable for areas where solder is used, as it has a high solder resistance.
■「抵抗体」は、P b* Ru20t−x (パイ
ロクロア)およびRu Oaの導電粒子とpbo−si
Ox −B20s Aβgo3系ガラスの混合物で
あり、導電粒子とガラスの比は重量比で20=80であ
る。焼付温度は850℃である。■The “resistor” is composed of conductive particles of P b* Ru20t-x (pyrochlore) and Ru Oa and pbo-si
Ox -B20s is a mixture of Aβgo3 glass, and the ratio of conductive particles to glass is 20=80 in terms of weight ratio. The baking temperature is 850°C.
■「保護ガラス」は、 P bo S i Ox
B203−Aβ203系ガラスであり、焼付温度は60
0℃である。■“Protection glass” is P bo Si Ox
B203-Aβ203 glass, baking temperature 60
It is 0°C.
試験結果を示すと5第1表に示すとおりであった。The test results are as shown in Table 5.
(以下、余白)
第1表
第1表において、比較例1〜4は従来技術に属し、実施
例1と2は本発明に属する。(Hereinafter, blank spaces) Table 1 In Table 1, Comparative Examples 1 to 4 belong to the prior art, and Examples 1 and 2 belong to the present invention.
比JLi殊−」。Philippines JLi special.”
比較例1の厚膜回路基板の構造は、第5図に示すように
、基板51上に第1の導体成分を印刷し、850℃で焼
付することにより、第1の導体52を形成した。次に同
様に抵抗体成分を印刷、焼付して抵抗体53を形成した
。As shown in FIG. 5, the structure of the thick film circuit board of Comparative Example 1 was such that a first conductor component was printed on a substrate 51 and baked at 850° C. to form a first conductor 52. Next, a resistor component was printed and baked in the same manner to form a resistor 53.
得られた厚膜回路基板io枚を観察した結果、抵抗体2
00個中3S個の抵抗体にクラックが発生していた。As a result of observing the obtained io thick film circuit boards, it was found that resistor 2
Cracks occurred in 3S out of 00 resistors.
匿較土−ユ
比較例2の厚膜回路基板の構造は、第6図に示すように
、基板61上に抵抗体成分を印刷し、850℃で焼付す
ることにより、抵抗体62を形成した。次に第2の導体
成分を印刷し、600℃の低温焼付により第2の導体6
3を形成した。次に第2の導体63の一部が露出するよ
うに保護ガラス成分を印刷し、600℃で焼付すること
により、保護ガラス64を形成した。As shown in FIG. 6, the structure of the thick film circuit board of Comparative Example 2 was such that a resistor component was printed on a substrate 61 and baked at 850° C. to form a resistor 62. . Next, the second conductor component is printed and baked at a low temperature of 600°C to form the second conductor 6.
3 was formed. Next, a protective glass component was printed so that a part of the second conductor 63 was exposed, and baked at 600° C. to form a protective glass 64.
得られた厚膜回路基板を235℃のハンダ槽に約5秒間
浸漬したところ、ハンダくわれが著しく。When the obtained thick film circuit board was immersed in a solder bath at 235°C for about 5 seconds, the solder cracked significantly.
実用に耐えないことが解った。It turned out that it was not practical.
九較■−ユ
比較例3の厚膜回路基板の構造は、第7図に示すように
、基板71上に抵抗体成分を印刷し、850℃で焼付す
ることにより、抵抗体72を形成した0次に、第1の導
体成分を印刷し、850℃で焼付することにより、第1
の導体73を形成した。In the structure of the thick film circuit board of Comparative Example 3, as shown in FIG. Next, the first conductor component is printed and baked at 850°C.
A conductor 73 was formed.
得られた厚膜回路基板10枚を観察した結果、抵抗体2
00個中の全ての抵抗体にクラックが発生していた。As a result of observing the obtained 10 thick film circuit boards, it was found that resistor 2
Cracks had occurred in all of the 00 resistors.
1校皿−1
比較例4の厚膜回路基板の構造は、第8図に示すように
、基板81上に抵抗体成分を印刷し、850℃で焼付す
ることにより、抵抗体82を形成した。次に、第2の導
体成分を印刷し、850℃で焼付することにより、第2
の導体83を形成qた。1 School Plate-1 As shown in FIG. 8, the structure of the thick film circuit board of Comparative Example 4 was such that a resistor element 82 was formed by printing a resistor component on a substrate 81 and baking it at 850°C. . Next, the second conductor component is printed and baked at 850°C.
A conductor 83 was formed.
得られた厚膜回路基板10枚を観察した結果、抵抗体2
00個中の41個の抵抗体にクラックが発生していた。As a result of observing the obtained 10 thick film circuit boards, it was found that resistor 2
Cracks occurred in 41 out of 00 resistors.
実」1札−」一
実施例1の厚膜回路基板の構造は、第9図に示すように
、基板91上に第1の導体成分と抵抗体成分を順次印刷
し、850℃で同時焼付することにより、第1の導体9
2と抵抗体93を同時に形成した。次に第2の導体成分
を印刷し、600℃の低温焼付により第2の導体94を
形成した。次に保護ガラス成分を第1の導体92の一部
が露出するように印刷し、600℃での焼付により保護
ガラス95を形成した。The structure of the thick film circuit board of Example 1 is as shown in FIG. By doing so, the first conductor 9
2 and resistor 93 were formed at the same time. Next, a second conductor component was printed and a second conductor 94 was formed by low temperature baking at 600°C. Next, a protective glass component was printed so that a portion of the first conductor 92 was exposed, and a protective glass 95 was formed by baking at 600°C.
この厚膜回路基板の特性は第1表に示すように良好であ
った。The characteristics of this thick film circuit board were good as shown in Table 1.
及鳳里−ユ
実施例2の厚膜回路基板の構造は、第1O図に示すよう
に、基板91上に第1の導体成分と抵抗体成分を順次印
刷し、850℃で同時焼付することにより、第1の導体
92と抵抗体93を同時に形成した。次に第2の導体成
分と保護ガラス成分を順次印刷し、600℃での同時焼
付により第2の導体94と保護ガラス95を同時に形成
した。The structure of the thick film circuit board of Example 2 of Oiho Ri-Yu is as shown in FIG. In this way, the first conductor 92 and the resistor 93 were formed at the same time. Next, the second conductor component and the protective glass component were sequentially printed, and the second conductor 94 and the protective glass 95 were simultaneously formed by simultaneous baking at 600°C.
この特性は第1表に示すように良好であった。This property was good as shown in Table 1.
(発明の効果)
以上説明したように1本発明の厚膜回路基板によれば、
導体特性を損なうことなくかつ形状効果の生じない構成
をもつ回路基板構造であるため、抵抗体の形状効果を考
慮に入れることなく抵抗値を設計することができ、抵抗
体パターンの設計が簡便化され、しかも製造時に抵抗体
にクラック等の破損が生じないという効果がある。(Effects of the Invention) As explained above, according to the thick film circuit board of the present invention,
Since the circuit board structure has a configuration that does not impair conductor properties and does not cause shape effects, the resistance value can be designed without taking shape effects of the resistor into consideration, simplifying the design of the resistor pattern. Moreover, there is an effect that damage such as cracks does not occur in the resistor during manufacturing.
第1図は本発明の実施例の厚膜回路基板の構造を示す概
略断面図、第2図は従来例を説明するための厚膜回路基
板を示す概略断面図、第3図および第4図は従来例を説
明するための図、第5図、第6図、第7図、第8図はそ
れぞれ従来技術に属する厚膜回路基板の構造を示す概略
断面図、第9図および第10図は本発明の実施例の厚膜
回路基板の構造を示す概略断面図である。
20・・・厚膜回路基板、
1・・・絶縁基板、
22・・・第1の導体層、
23・・・抵抗体層、
24・・・第2の導体層。FIG. 1 is a schematic sectional view showing the structure of a thick film circuit board according to an embodiment of the present invention, FIG. 2 is a schematic sectional view showing a thick film circuit board for explaining a conventional example, and FIGS. 3 and 4 5, 6, 7, and 8 are schematic cross-sectional views showing the structure of a thick film circuit board belonging to the prior art, and FIGS. 9 and 10 are diagrams for explaining a conventional example, respectively. 1 is a schematic cross-sectional view showing the structure of a thick film circuit board according to an embodiment of the present invention. 20... Thick film circuit board, 1... Insulating substrate, 22... First conductor layer, 23... Resistor layer, 24... Second conductor layer.
Claims (1)
縁基板上に前記第1の導体層に重ならないように形成さ
れる抵抗体層と、前記絶縁基板上に前記第1の導体層上
の一部と前記抵抗体層上の一部とに重なるように形成さ
れる電極効果の小さな第2の導体層を有することを特徴
とする厚膜回路基板。(1) A first conductor layer formed on an insulating substrate, a resistor layer formed on the insulating substrate so as not to overlap the first conductor layer, and a resistor layer formed on the insulating substrate so as not to overlap the first conductor layer. A thick film circuit board comprising a second conductor layer with a small electrode effect formed so as to overlap a part of the conductor layer and a part of the resistor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1096972A JP2760035B2 (en) | 1989-04-17 | 1989-04-17 | Thick film circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1096972A JP2760035B2 (en) | 1989-04-17 | 1989-04-17 | Thick film circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02273986A true JPH02273986A (en) | 1990-11-08 |
| JP2760035B2 JP2760035B2 (en) | 1998-05-28 |
Family
ID=14179136
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1096972A Expired - Fee Related JP2760035B2 (en) | 1989-04-17 | 1989-04-17 | Thick film circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2760035B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5754093A (en) * | 1995-04-28 | 1998-05-19 | Nippondenso Co., Ltd. | Thick-film printed substrate including an electrically connecting member and method for fabricating the same |
| WO2004077899A1 (en) * | 2003-02-26 | 2004-09-10 | Murata Manufacturing Co., Ltd. | Ceramic circuit board and conductive paste used therefor |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62135476U (en) * | 1986-02-20 | 1987-08-26 | ||
| JPS63226901A (en) * | 1987-03-16 | 1988-09-21 | タムラ化研株式会社 | Printed resistor and manufacture of the same |
-
1989
- 1989-04-17 JP JP1096972A patent/JP2760035B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62135476U (en) * | 1986-02-20 | 1987-08-26 | ||
| JPS63226901A (en) * | 1987-03-16 | 1988-09-21 | タムラ化研株式会社 | Printed resistor and manufacture of the same |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5754093A (en) * | 1995-04-28 | 1998-05-19 | Nippondenso Co., Ltd. | Thick-film printed substrate including an electrically connecting member and method for fabricating the same |
| DE19616847B4 (en) * | 1995-04-28 | 2011-03-17 | DENSO CORPORATION, Kariya-shi | Printed thick film substrate and method for its production |
| WO2004077899A1 (en) * | 2003-02-26 | 2004-09-10 | Murata Manufacturing Co., Ltd. | Ceramic circuit board and conductive paste used therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2760035B2 (en) | 1998-05-28 |
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