JPH0227588A - Current stretched type gate driving method - Google Patents

Abstract

PURPOSE:To obtain a large erasing action margin by setting the interval of an impression starting time between a first current pulse and a second current pulse at >=10mus. CONSTITUTION:A stretch pulse 31 is impressed to a stretch conductor 21, a stripe domain tip part is guided to an erasing part by a magnetic field, and after 10mus of the stretch pulse 31 rise, a domain cutting chop pulse 33 is added to a chop conductor 23, the stripe domain is cut, an unnecessary Bloch line pair (VBL pair) are cut and erased as bubbles. Consequently, when the stripe domain is extended by the stretch conductor, the residual VBL is assisted to move to the stripe domain tip part. Thus, the large action margin can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for driving a current stretch type gate used in a Bloch line memory.

(Prior technology) As an ultra-high-density solid-state magnetic memory element that replaces a magnetic bubble memory element, a boundary between striped magnetic domains existing in a ferromagnetic (including ferrimagnetic) film whose easy magnetization direction is perpendicular to the film surface is formed. A Bloch line pair (hereinafter referred to as
A Bloch line memory element using VBL pairs (referred to as VBL pairs) as a memory unit was invented (Japanese Patent Application No. 18234/1983).
6).

In the Bloch line memory element, information is written in the form of VBL pairs along the Bloch domain wall around the stabilized stripe domain that constitutes the minor loop, and
It is essential to have means for reading information units represented by minute areas called BL pairs, and means for transferring and holding VBL pairs bit by bit on a minor loop.

As the stripe domain, a ring-shaped stripe domain is used because it is easy to drive the VBL pair with a pulse bias magnetic field. A VBL pair, which is an information carrier, is written on the outer peripheral domain wall of this ring-shaped striped domain. writing information,
A read gate having a structure as shown in FIG. 4 is used. In Figure 4, 11 is the major line,
12 is a ring-shaped stripe domain forming a minor loop, 13 is a Bloch domain wall around the ring-shaped stripe domain, 1 is a Bloch line at the tip of the stripe domain, 21 is a stretch conductor button, 22 is an in-plane magnetic field conductor button, and 23 is a chopped conductor. It's a slam. Figure 5 (a
(b) and (C) are the current stretch type writing in Fig. 4;
A conventional current pulse waveform applied to the read gate. FIGS. 6(a), (b), (c), and (d) are explanatory diagrams of the write operation. A conventional method for driving a current stretch type gate will be described with reference to FIGS. 4, 5, and 6.

As shown in FIG. 4, the ring-shaped stripe domain has two VBLs at both corners in its initial state, and a uniform in-plane magnetic field is applied to the left in order to stabilize them. In order to move this tip VBLL to the side wall during VBL pair writing, the current pulse 32 shown in FIG. 5 is applied to the in-plane magnetic field conductor button 22 as shown in FIG. A stretch pulse 31 is applied to the stretch conductor 21 while a rightward local in-plane magnetic field H1p is applied to the stretch conductor 21, and the magnetic field guides the tip of the stripe domain to the writing section. V at the tip
The BLL is held at the left end of the upper side wall conductor button 22 by the gyro force and Hlp. Because of Hlp, the domain wall magnetization of the domain wall of the stretched stripe domain becomes Hip.
On the side wall facing in the opposite direction, the domain wall structure has a horizontal Bloch line (HBL) 6 as shown in FIG. 6(b). In this state, when a chop pulse 33 for HBL bunch-through and domain cutting is applied to the chop conductor 23, the HBL first bunch-throughs from the upper surface of the film as shown in FIG. 6(C), and then as shown in FIG. 6(d). As shown in the figure, the tip is cut off and a negative VBL is created at the tip of the newly created stripe domain.
Pair 2.3 is written.

FIGS. 7(a), (b), and (c) are explanatory diagrams of the read operation. As shown in FIG. 7(a), if there is information to be read, there are three VBLIs, 2.3, at the corners of the ring-shaped stripe domain. First, a current pulse 32 is applied to the in-plane magnetic field conductor pattern 22, and while a local in-plane magnetic field H1p directed rightward in the longitudinal direction is applied to the tip of the stripe domain, a stretch pulse 31 is applied to the stretch conductor 21, and the magnetic field causes the stripe to become striped. Lead the domain tip to the readout section. At this time, as shown in FIG. 7(b), of the three VBLs at the tip, only 2 moves in the same direction as Hlp, and the other VBLIs and 3 are held at the left end of the side wall top conductor button 22. . The magnetization directions of the stretched stripe domains are in the same direction. When a chop pulse 33 is applied to the chop conductor 23 in this state,
As shown in FIG. 7(C), the tip is cut and the newly formed stripe domain tip and bubble have a negative VBL4.
．． 5 occurs. That is, the VBL pair is read out in the form of a bubble, and the read operation is non-destructive. In the state of FIG. 7(a), if there is no VBL2.3 to be read, the magnetization of the sidewall of the striped domain stretched in FIG. 7(b) is in the opposite direction, and cannot be cut by the chop pulse 33. Cannot be read as a bubble.

FIG. 8 is an explanatory diagram of the erasing operation. As shown in FIG. 8(a), if there is information to be erased, three VBLLs, 2.3
There is. In the case of an erase operation, no current is applied to the in-plane magnetic field conductor button 22, but a stretch pulse 31 is applied to the stretch conductor 21, and the magnetic field guides the tip of the stripe domain to the erase section. At this time, all three VBLs at the tip move as shown in FIG. 8(b). The magnetization directions of the elongated striped domains are in the same direction, pointing to the left. When a chop pulse 33 is applied to the chop conductor 23 in this state, the tip is cut off as shown in FIG. 8(e), and a negative VBL of 4.5 is generated at the newly formed stripe domain tip and bubble. That is,
This means that three VBL pairs are reduced to one, and an erase operation has been performed.

(Problem to be solved by the invention) However, when the stripe domain tip extends,
A gyroscopic force acts that leaves VBL behind, which is a factor that prevents normal gate operation.

An object of the present invention is to provide a method for driving a current stretch type gate that solves this problem.

(Means for Solving the Problems) The gist of the present invention is to
A method for driving a current stretch type gate in which writing, reading, and erasing of vertical Bloch line pairs are performed by stretching a stripe domain with a current pulse and cutting the stripe domain with a second current pulse applied to a second conductor, The purpose is to increase the interval between the application start times of the first current pulse and the second current pulse to 10 ps or more.

When the tip of the stripe domain is extended by the stretch pulse, a gyroscopic force that leaves VBL behind acts, but by increasing the interval between the first and second current pulses, VBL is removed from the uniform in-plane magnetic field. It moves to the tip of the stripe domain in response to the force.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIGS. 1(a) and 1(b) are pulse waveform diagrams showing one embodiment of the present invention. To explain the present invention using FIGS. 1 and 7, a stretch pulse 3 is applied to the stretch conductor 21.
1 is applied, the leading edge of the stripe domain is guided to the erasing part by the magnetic field, and 10p of the rising edge of the stretch pulse 31 is applied.
After s, a domain cutting chop pulse 33 is applied to the chop conductor 23 to cut the stripe domain and remove unnecessary VBL pairs as bubbles.

FIG. 2 is a diagram showing the effect of the above embodiment, and shows the erase operation margin characteristics of a device using a 5 μm bubble material. In the figure, the vertical axis is the bias magnetic field, and the horizontal axis is the time interval between the rise of the stretch pulse and the rise of the chop pulse. A large erase operation margin was obtained by setting the interval between the rises of the stretch pulse with a pulse width of 5 ps and the chop pulse to be 1011 seconds or more. The same applies to read operations.

FIGS. 3(a) and 3(b) are pulse waveform diagrams showing another embodiment of the present invention. To explain this in conjunction with FIG. 7, a stretch pulse 31 is applied to the stretch conductor 21, and the magnetic field guides the tip of the stripe domain to the erasing part, and the stretch pulse 31 is decreased exponentially over a numerically long time. After that, a domain cutting chop pulse 33 is applied to the chop conductor 23 to cut the stripe domain and erase unnecessary VBL. Therefore, the VBL to be erased easily moves to the tip of the stripe domain, and a large margin can be obtained. The same applies to read operations.

(Effects of the Invention) As described above, the present invention works to help the VBL left behind move to the tip of the stripe domain again when the stripe domain is stretched by the stretch conductor, thereby increasing the operating margin. is obtained.

In addition, in this example, a stretch pulse with a pulse width shorter than 10 ps and a stretch pulse falling exponentially were used, but a stretch pulse with a pulse width longer than 10 ps, a large pulse with a short pulse width, and a small pulse with a long pulse width were used. It is clear that similar effects can be obtained even when used in combination.

Furthermore, although ring-shaped striped domains were used in this example, it is clear that similar effects can be obtained even when simple striped domains are used.

[Brief explanation of the drawing]

FIGS. 1(a) and (b) are pulse waveform diagrams showing one embodiment of the present invention, FIG. 2 is a diagram showing measurement results of gate erase operation margin characteristics, and FIGS. 3(a) and (b). 4 is a pulse waveform diagram showing another embodiment, FIG. 4 is a button diagram showing an example of a current stretch type gate, and FIGS. 5(a), (b), (c)
6 is a pulse waveform diagram showing a conventional driving method of a current stretch type gate, FIGS. 6(a) to 6(d) are button diagrams explaining a write operation, and FIGS. 7(a) to (e) are diagrams explaining a read operation. FIGS. 8(a) to 8(1) are button diagrams for explaining the erasing operation. In the figure, 1.2.3.4.5 is the vertical Bloch line, 6 is the horizontal Bloch line, 11 is the major line, 1
2 is a stripe domain, 13 is a domain wall, 21 is a stretch conductor button, 22 is an in-plane magnetic field conductor button, 23 is a chop conductor button, 31 is a stretch pulse, 32 is an in-plane magnetic field pulse, and 33 is a chop pulse.

Claims (1)

[Claims] A first current pulse applied to a first conductor stretches the striped domain and a second current pulse applied to a second conductor cuts the striped domain to write, read, and erase the vertical Bloch line pair. A method for driving a current stretch type gate, wherein an interval between application start times of the first current pulse and the second current pulse is 10 μs or more.