JPH022761U - - Google Patents
Info
- Publication number
- JPH022761U JPH022761U JP7726988U JP7726988U JPH022761U JP H022761 U JPH022761 U JP H022761U JP 7726988 U JP7726988 U JP 7726988U JP 7726988 U JP7726988 U JP 7726988U JP H022761 U JPH022761 U JP H022761U
- Authority
- JP
- Japan
- Prior art keywords
- reading
- data
- correction
- main information
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
第１図はこの考案の一実施例の回路構成を示す
ブロツク図、第２図は同実施例に用いられる主デ
ータメモリの構成図、第３図は同実施例に用いら
れる副データメモリの構成図、第４図は同実施例
の動作を説明するためゐフローチヤート、第５図
は同実施例のキー入力と表示部での表示の関係を
説明するための図である。
１……キー入力部、１ｂ……「一括訂正」キー
、１ｃ……「登録」キー、３……制御部、４……
表示バツフア、７……一括訂正制御部、１０……
主データメモリ、１１……副データメモリ、１２
……表示部、１３……一括訂正フラグメモリ、１
４……表示ＲＯＭ、１５……入出力フラグメモリ
。
FIG. 1 is a block diagram showing the circuit configuration of an embodiment of this invention, FIG. 2 is a configuration diagram of a main data memory used in the embodiment, and FIG. 3 is a configuration diagram of a sub data memory used in the embodiment. 4 is a flowchart for explaining the operation of the embodiment, and FIG. 5 is a diagram for explaining the relationship between key input and display on the display unit of the embodiment. 1... Key input section, 1b... "Batch correction" key, 1c... "Registration" key, 3... Control section, 4...
Display buffer, 7... Batch correction control unit, 10...
Main data memory, 11...Sub data memory, 12
... Display section, 13 ... Batch correction flag memory, 1
4... Display ROM, 15... Input/output flag memory.
Claims (1)
記憶エリアに記憶する第１の記憶手段と、上記主
情報に対する上記第１の記憶手段の各記憶エリア
のアドレスを組にして複数の組の情報を記憶する
第２の記憶手段と、上記主情報の読出し指令によ
り上記第１の記憶手段より読出し指令のあつた主
情報に対応する項目データを読出すデータ読出し
手段と、項目データの訂正を指示するデータ訂正
指示手段と、このデータ訂正指示手段の訂正指示
により上記第１の記憶手段の該当項目データを読
出し訂正を実行する訂正実行手段とを具備したこ
とを特徴とする情報記憶装置。 a first storage means that stores a plurality of item data corresponding to main information in storage areas for each item; and a plurality of sets of information in which addresses of each storage area of the first storage means are set as sets for the main information. a second storage means for storing the main information; a data reading means for reading item data corresponding to the main information for which the reading command has been issued from the first storage means in response to the reading command for the main information; and a data reading means for instructing correction of the item data. An information storage device comprising: data correction instructing means; and correction execution means for reading and correcting the corresponding item data of the first storage means in accordance with the correction instruction from the data correction instructing means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7726988U JPH022761U (en) | 1988-06-13 | 1988-06-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7726988U JPH022761U (en) | 1988-06-13 | 1988-06-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH022761U true JPH022761U (en) | 1990-01-10 |
Family
ID=31302265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7726988U Pending JPH022761U (en) | 1988-06-13 | 1988-06-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH022761U (en) |
-
1988
- 1988-06-13 JP JP7726988U patent/JPH022761U/ja active Pending
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