JPH02277231A - Manufacturing method of semiconductor integrated circuit device and manufacturing equipment used therein - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a manufacturing technology for semiconductor integrated circuit devices, and in particular to a technology that is effective when applied to a connection hole filling process using selective tungsten CVD. be.

[Conventional technology]

Conventionally, aluminum (,
44 is used.

However, as the wiring becomes finer as the density of semiconductor integrated circuits increases, the aspect ratio (depth/diameter of the contact hole) of the contact hole that connects the semiconductor substrate and the wire or the upper and lower wiring layers increases. , defects such as disconnection due to a decrease in step coverage of the Af film inside the connection hole have become a serious problem.

As one of the countermeasures, a wiring technique has been considered in which a conductive film such as a high melting point metal or polysilicon is buried in the contact hole and the substrate and wiring or upper and lower wiring layers are connected through this conductive film. A technique that is attracting particular attention as a filling technique for the connection holes mentioned above is the so-called selective growth of a tungsten (W) film on the substrate (or wiring) using a reactive gas consisting of WF+H2, WF, +silane, etc. W.C.
This is VD technology.

Selective W-CVD technology initially uses W Fe+H as the reactant gas.
However, this reaction gas has the disadvantage of easily causing the α-axis of silicon, which is called encroachment or worm hole. WF with high film growth rate
Practical implementation of selective W-CVD technology using s + silane-based gas is underway. Regarding the selective W-CVD technology using the above-mentioned WF, + silane-based reaction gas, see, for example, the publication by IEICE published by Varnish DM (S
DM) 88-36 (“W F s + S l h
Selective growth using H211-2 reaction system”) JP35-P
40 and rSDM88-37 (“Selective CVD-W process using silane reduction method”) JP41 to P46.

[Problem to be solved by the invention]

The present inventor has discovered that the connection hole embedding technique using the selective W-CVD described above has the following problems.

The film-forming reaction of W using WF or 100% reaction gas is an exothermic reaction represented by the following reaction formula. Also, W F s +Hx
The W film forming reaction using a system reaction gas is also an exothermic reaction represented by the following reaction formula.

Therefore, the substrate temperature inside the CVD equipment is 300°C to 450°C.
As the film formation reaction progresses, the temperature of the W film locally increases,
The temperature will be higher than the substrate temperature. As a result, the W film grows abnormally and the crystal grains become coarse, resulting in phenomena such as the surface of the W film becoming rough and the inside of the W film becoming porous, which significantly reduces the connection reliability of the contact hole. There is a problem that it decreases.

The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a technique that can effectively prevent a decrease in the reliability of connection holes caused by abnormal growth of the W film. be.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in the process of embedding the W film in the connection hole using the selective W-CVD technique, the present invention improves the tungsten film by changing the film forming parameters such as the flow rate of the reaction gas and the substrate temperature over time. This is a method of manufacturing a semiconductor integrated circuit device in which growth is performed intermittently.

The present invention also provides a CVD apparatus structure in which a part of the CVD apparatus used in the above-described method for manufacturing a semiconductor integrated circuit device is provided with means for changing film-forming parameters such as the flow rate of a reaction gas and the substrate temperature over time. be.

[Effect]

The growth rate of the W film is dependent on film formation parameters such as the flow rate of the reaction gas and the substrate temperature. Therefore, by changing the film-forming parameters over time and growing the W film intermittently, the excessive temperature rise of the W film can be suppressed, and the coarsening of crystal grains caused by abnormal growth of the W film can be effectively prevented. It can be prevented.

〔Example〕

This example is applied to a method of manufacturing a semiconductor integrated circuit composed of MOS-FETs, and is shown in FIG. 3(a).
1 shows a semiconductor substrate 1 in the middle of the manufacturing process of this semiconductor integrated circuit.

In the figure, a field insulating film 2 made of, for example, S+Oa is on the main surface of a substrate l made of p-type silicon single crystal.
and a gate insulating film 3 are formed. A p-type channel stopper region 4 in which boron ions are implanted, for example, is formed under the field insulating film 2.

On the gate insulating film 3 is an n-channel MOS/FET.
A gate electrode 5 of (Q, , Q2) is formed. This gate electrode 5 is made of a polysilicon film 5aSW in order from the bottom layer.
Siz (or MOSi2, TaSi2.Ti5iz
It has a polycide structure in which silicide films 5b such as ) are stacked. The polysilicon film 5a is doped with an n-type impurity such as phosphorus (P) or arsenic (As) to reduce its resistance value.

A sidewall spacer 6 made of, for example, 5iCh is formed on the sidewall of the gate electrode 5. An insulating film 7 made of the same material (Sin) is formed on the gate electrode 5.

On the substrate 1 on both sides of the gate electrode 50, a pair of n-channel M
A lightly doped n-semiconductor region 8 and a highly doped n° semiconductor region 9 that constitute the source and drain of the OS-FET (Q, , Q2) are formed, and the so-called LDD(l
It has an extremely doped drain structure.

The n-semiconductor region 8 is formed by ion-implanting phosphorus or the like into the surface of the substrate 1 using the gate electrode 5 as a mask. Further, the n'' semiconductor region 9 is formed by ion-implanting arsenic or the like into the surface of the substrate 1 using the gate electrode 5 and the sidewall spacer 6 on its side wall as a mask.

An insulating film 10 made of, for example, Sin is formed on the upper layer of the MOS-FET (q, , Qa) composed of the gate electrode 5 and the semiconductor region 8.9 so as to cover the surface of the substrate l. has been done. On this insulating film 10, for example, BPS G (boro phosp, hosp)
An interlayer insulating film 11 made of 5 illicate glass is formed, thereby reducing the level difference on the surface of the substrate 10.

First, as shown in FIG. 3(b), a portion of each of the interlayer insulating film 11, insulating film 10, and gate insulating film 3 is dry-etched using a photoresist (not shown) as a mask. A contact hole 12 reaching the n1 semiconductor region 9 is formed.

Next, in order to fill the inside of this contact hole 12 with a W film, the substrate 1 is placed in a CVD apparatus.

FIG. 4 shows a cold wall type reduced pressure CVD apparatus 20 used in this embodiment. This reduced pressure CVD device 20
consists of a chamber 21 whose interior can be set to a predetermined degree of vacuum, and a load-lock chamber 22 installed adjacent to this chamber 21. The semiconductor substrate 1 is placed on the bottom surface of a hot chuck 23 placed at the center of the upper part of the chamber 21 with its integrated circuit forming surface facing downward, and is detachably supported by a wafer clamp 24.

Quartz window 2 installed on the top surface of hot chuck 23
A heat source 26 such as a halogen lamp is installed above the substrate 5, and the heat source 26 directly heats the back surface of the substrate 1. This heating source 26 is connected to an output control means 27 that can change its output at a desired cycle, and thereby controls the growth rate of the substrate 1, which is one of the deposition parameters governing the growth rate of the W film. temperature is changed over time.

A reactive gas inlet 28 is provided at the bottom of the chamber 21, and a reactive gas supply source 29 filled with WFg gas or silane gas is connected to one end thereof. This reaction gas supply source 29 includes a flow rate control means 30 that can change the flow rate of the reaction gas and the mixing ratio thereof at a desired cycle.
are connected, so that the flow rate of the reaction gas, which is one of the film forming parameters governing the growth rate of the W film, can be changed over time.

A load rotor chamber 22 installed adjacent to the chamber 21
includes a cassette 31 that accommodates the substrate 1 on which the process of forming the contact hole I2 described above has been completed;
A wafer loader 32 for loading the substrate 1 housed in the chamber 21 into the chamber 21 is installed. In addition, this reduced pressure CV
In the D device 20, a pretreatment chamber (not shown) is installed adjacent to the chamber 21, and prior to the step of filling the contact hole 12 with the W film, the natural oxide film formed at the bottom of the contact hole 12 is sputter-etched. It can be removed with .

Contact hole 12 using the above-mentioned low pressure CVD device 20
The embedding is performed in the following manner.

The first method, as shown in FIG.
This is a method in which a W film is intermittently grown inside the structure. That is, after the substrate 1 is fixed to the hot chuck 23 inside the chamber 21, the atmosphere inside the chamber 21 is exhausted from the exhaust port 33, and the inside of the chamber 21 is brought to a predetermined degree of vacuum. Next, the heating source 26 is operated at a predetermined output to set the temperature of the substrate 1 to, for example, 320° C., and then WF and SiH are mixed at a predetermined ratio into the chamber 21 from the reaction gas inlet 28. A reactive gas is introduced to selectively grow a W film inside the contact hole 12.

Since the W film formation reaction using the above reaction gas is an exothermic reaction, the temperature of the W film begins to rise as the reaction progresses. Then, the output control means 27 is activated and reduces the output of the heating source 26, thereby lowering the temperature of the substrate 1 to, for example, 220°C. As a result, the reaction rate of the film forming reaction decreases significantly, and the temperature of the W film also decreases rapidly. Then, the output control means 27 operates again and increases the output of the heating source 26, thereby increasing the temperature of the substrate 1 to 320°C.
to quickly restart the W film forming reaction.

In this way, by growing the W film 34 intermittently while periodically changing the temperature of the substrate 1 between 320° C. and 220° C., excessive temperature rise of the film is suppressed and abnormal growth of the film is prevented. This prevents coarsening of crystal grains caused by
A W film with a smooth surface and a dense interior can be obtained. FIG. 3(C) shows the contact hole 1 formed using the above method.
2 shows a substrate 1 in which a W film 34 is embedded. Thereafter, as shown in FIG. 3(d), by patterning Aβ wiring 35 on the interlayer insulating film 11,
'The electrical connection between the wiring 35 and the n+ semiconductor region 9 is completed.

The W film 34 described above can also be obtained by the second method shown below.

As shown in Figure 2, this method is a method in which the W film is grown intermittently by changing over time the flow rate ratio of the reactant gas, which is one of the deposition parameters that governs the growth rate of the W film. It is. That is, after the substrate 1 is fixed to the hot chuck 23 inside the chamber 21, the atmosphere inside the chamber 21 is exhausted from the exhaust port 33, and the inside of the chamber 21 is brought to a predetermined degree of vacuum. Subsequently, after activating the heat source 26 and setting the temperature of the substrate 1 to, for example, 320° C., a reaction gas containing a mixture of WF and SiH4 is introduced into the chamber 21 from the reaction gas inlet 28 to fill the contact hole. A W film is selectively grown inside 12. The flow rate ratio of the reaction gas at this time is, for example, WF6/SiH<=0.25.

When the temperature of the W film begins to rise as the reaction progresses, the flow control means 30 is activated, and the flow rate ratio of W F s in the reaction gas becomes zero. Therefore, the film forming reaction is stopped, and the temperature of the W film drops rapidly. Next, the flow rate control means 30 is operated again, and the flow rate ratio of the reaction gas is WF,
/S i H, -0,25, so that the W film forming reaction is promptly restarted.

In this way, the reactant gas flow 1 ratio is defined as W F 6/S I
Even in the second method described above, in which the W film is grown intermittently without changing it periodically between H, = 0.25 and 0, excessive temperature rise of the W film is suppressed. Coarsening of crystal grains due to abnormal growth is prevented, the surface is smooth, and
A W film with a dense interior can be obtained. As a result, the connection reliability of the contact hole 12 is improved, and the MOS-F
The manufacturing yield of semiconductor integrated circuits configured with ET is improved.

As above, the invention made by the present inventor has been specifically explained based on Examples, but the present invention is not limited to the above-mentioned Examples, and it is understood that various changes can be made without departing from the gist thereof. Needless to say.

The reaction gases used are 5IH1 and W used in the above example.
It is not limited to mixed gases with F, but also with Si.
Silanes other than H4 (such as SizHs or 5isHa)
It is also possible to use a mixed gas of WFs and p, or a mixed gas of WF, and H2.

In the above embodiment, a case was described in which the process was applied to the process of burying a contact hole that connects a semiconductor substrate and an Af wiring. It can also be applied to processes.

Furthermore, the present invention is not only applicable to a method of manufacturing a semiconductor integrated circuit composed of MOS-FETs, but also to the manufacturing method of all semiconductor integrated circuits that involves a step of filling contact holes using the selective W-CVD method. The method can be applied.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

When filling a contact hole with a W film using selective W-CVD technology, it is possible to grow the W film intermittently by changing film formation parameters such as the flow rate of the reaction gas and the substrate temperature over time. According to the present invention, excessive temperature rise during growth of the W film can be suppressed. This results in
Since coarsening of crystal grains due to abnormal growth of the W film can be effectively prevented, the reliability of the connection hole is improved.

[Brief explanation of drawings]

FIG. 1 is a graph diagram showing changes over time in substrate temperature in a method for manufacturing a semiconductor device which is an embodiment of the present invention; FIG. 2 is a graph diagram showing changes over time in the flow rate ratio of reactant gas; 3(a) to 3(d) are sectional views of main parts of a semiconductor substrate showing this method of manufacturing a semiconductor device, and FIG. 4 is a sectional view of main parts of a manufacturing apparatus used in this method of manufacturing a semiconductor device. . DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Field insulating film, 3...
...gate insulating film, 4...channel stopper region,
5... Gate electrode, 5a... Polysilicon film, 5b
... Silicide film, 6... Sidewall spacer, 7.10... Insulating film, 8... N- semiconductor region,
9...n'' semiconductor region, 11... Interlayer insulating film, 12
...Contact hole (connection hole), 20...Reduced pressure C
VD device, 21... Chamber, 22... Load rotor chamber, 23... Hot chuck, 24... Wafer clamp, 25... Quartz window, 26... Heat source,
27... Output control means, 28... Reaction gas inlet,
29... Reaction gas supply source, 30... Flow rate control means,
31...Cassette, 32...Wafer loader, 33.
...Exhaust port, 34...W membrane, 35...AI! wiring,
Ql. Q.---n-channel MO3-FET0 agent Patent attorney Daiwa Tsutsui

Claims (1)

[Claims] 1. Manufacture of a semiconductor device including the step of forming a contact hole in an insulating film on a semiconductor substrate and filling the contact hole by selectively growing a tungsten film inside the contact hole. 1. A method for manufacturing a semiconductor integrated circuit device, characterized in that the tungsten film is grown intermittently by changing over time a deposition parameter that governs the growth rate of the tungsten film. 2. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the tungsten film is grown intermittently by changing the flow rate of the reaction gas over time. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the tungsten film is grown intermittently by changing the temperature of the semiconductor substrate over time. 4. A part of the CVD apparatus used in the method for manufacturing a semiconductor integrated circuit device according to claim 1 is provided with means for changing over time a film forming parameter governing the growth rate of the tungsten film. Manufacturing equipment.