JPH02277286A - Multilayer printed board - Google Patents
Multilayer printed boardInfo
- Publication number
- JPH02277286A JPH02277286A JP9730789A JP9730789A JPH02277286A JP H02277286 A JPH02277286 A JP H02277286A JP 9730789 A JP9730789 A JP 9730789A JP 9730789 A JP9730789 A JP 9730789A JP H02277286 A JPH02277286 A JP H02277286A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- signal wiring
- insulating base
- wiring layer
- characteristic impedance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、多層プリント配線基板に関し、特に汎用の電
子計算機などにおける動作の高速な半導体集積回路装置
の実装に好適な多層プリント配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multilayer printed wiring board, and particularly to a multilayer printed wiring board suitable for mounting high-speed semiconductor integrated circuit devices in general-purpose computers and the like.
たとえば、電波新聞社、昭和59年5月20日・発行、
社団法人日本電子機械工業全編「総合電子ハンドブック
JP1120〜P1123などの文献に記載されている
ように、汎用の電子計算機などにおいては、論理素子や
メモリなどの半導体集積回路装置の実装に多層プリント
配線基板を使用することが知られている。For example, published by Dempa Shimbunsha, May 20, 1980,
As described in the comprehensive electronic handbook JP1120 to P1123 of the Japan Electronics Machinery Industry Association, multilayer printed wiring boards are used for mounting semiconductor integrated circuit devices such as logic elements and memories in general-purpose computers, etc. is known to be used.
ところでこれらの論理素子やメモリは高速に動作するた
め相互間において授受される電気信号の周波数は極めて
高くなり、この電気信号の伝送経路となる多層プリント
配線基板に設けられた信号配線層の特性インピーダンス
のばらつきはノイズその他の障害の原因となり、電子計
算機システム全体の性能に大きな影響を及ぼすこととな
る。By the way, since these logic elements and memories operate at high speed, the frequency of the electrical signals sent and received between them becomes extremely high, and the characteristic impedance of the signal wiring layer provided on the multilayer printed wiring board that serves as the transmission path for this electrical signal increases. Variations in this result in noise and other disturbances, which greatly affect the performance of the entire electronic computer system.
従来、このような多層プリント配線基板としては、たと
えば第4図に示されるような構造のものが知られている
。Conventionally, as such a multilayer printed wiring board, one having a structure as shown in FIG. 4, for example, is known.
すなわち、表裏両面に電源層あるいは接地層2が形成さ
れた複数の絶縁基材101aと、表裏両面に信号配線層
4が形成された複数の絶縁基材101bとを、当該絶縁
基材101bが絶縁基材101Hによって挟まれるよう
に絶縁性の接着シート3を介して積層し、プレス技術な
どによって所定の温度で加圧・接着したものである。That is, the insulating base material 101b insulates a plurality of insulating base materials 101a on which a power supply layer or a ground layer 2 is formed on both the front and back sides, and a plurality of insulating base materials 101b on which a signal wiring layer 4 is formed on both the front and back sides. They are laminated with insulating adhesive sheets 3 interposed therebetween so as to be sandwiched between base materials 101H, and are pressed and bonded at a predetermined temperature using a press technique or the like.
これは、絶縁基材101aおよび101bの表裏両面に
、導体パターン密度の類似した電源層あるいは接地層2
および信号配線層4を形成することによって反り変形な
どを防止するものである。This means that there are two power layers or ground layers with similar conductor pattern densities on both the front and back surfaces of the insulating base materials 101a and 101b.
By forming the signal wiring layer 4, warping and deformation can be prevented.
このような構造の多層プリント配線基板における特性イ
ンピーダンスZo は、一般に次のような実験式で求め
られる。The characteristic impedance Zo in a multilayer printed wiring board having such a structure is generally determined by the following experimental formula.
Zo ”K+ / (Er ・ln (K2 ・B
/W) )”’ただし、εr :実行誘電率
W :信号配線の幅
B :信号配線を挟む絶縁層の厚さ
に+ 、 K2 :実験的に定められる係数上記式か
ら明らかなように特性インピーダンスZ0のばらつきは
、ε1.Wによって決まる。Zo "K+ / (Er ・ln (K2 ・B
/W) )"'where, εr: Effective dielectric constant W: Signal wiring width B: Thickness of the insulating layer sandwiching the signal wiring + K2: Experimentally determined coefficient As is clear from the above equation, characteristic impedance The variation in Z0 is determined by ε1.W.
ところで、本発明者らの研究によれば、特性インピーダ
ンスZo は信号配線を挟む絶縁層の厚さBを一定にし
た場合、第4図に示される信号配線層と電源層または接
地層との距離Hの値に影響されて大きく変化することが
判明した。By the way, according to the research of the present inventors, when the thickness B of the insulating layer sandwiching the signal wiring is constant, the characteristic impedance Zo is determined by the distance between the signal wiring layer and the power supply layer or the ground layer shown in Fig. 4. It was found that it changes greatly depending on the value of H.
すなわち、第2図はHの値を一定にした時のBの変動に
よる特性インピーダンス2゜の変化を、また、第3図は
、Bの値を一定にした時のHの値の変動による特性イン
ピーダンスZ、の変化を示したものであり、これらの線
図から明らかなように、信号配線を挟む絶縁層の厚さB
の変動よりも信号配線層と電源層または接地層との距f
iHの変動のほうが特性インピーダンスZ。のばらつき
に与える影響が大きいことが判る。In other words, Figure 2 shows the change in characteristic impedance of 2° due to a change in B when the value of H is constant, and Figure 3 shows the change in characteristic impedance due to a change in the value of H when the value of B is constant. It shows the change in impedance Z, and as is clear from these diagrams, the thickness B of the insulating layer sandwiching the signal wiring
The distance f between the signal wiring layer and the power supply layer or ground layer
The variation in iH is the characteristic impedance Z. It can be seen that this has a large effect on the variation in
ところが、第4図に示されるような構造の従来の多層プ
リント配線基板においては、信号配線層と電源層または
接地層との距離Hに、製造工程での加圧などによって変
化する絶縁性の接着シートの寸法が含まれるため、当該
路#Hのばらつき、すなわち特性インピーダンスのばら
つきが大きくなりやすいという問題がある。However, in the conventional multilayer printed wiring board with the structure shown in Fig. 4, the distance H between the signal wiring layer and the power supply layer or the ground layer has an insulating adhesive that changes due to pressure applied during the manufacturing process. Since the dimensions of the sheet are included, there is a problem in that variations in the path #H, that is, variations in characteristic impedance, tend to increase.
すなわち、前述の文献などにも記載されているように、
接着シートは一般にガラス布に半硬化状態のエポキシ樹
脂などを含浸させて構成され、接着時の温度および圧に
よって軟化し、この軟化した状態で絶縁基材の間隙に充
満した後に硬化することによって接着作用をなすため、
この接着シートを含むHの値を一定に制御することが困
難だからである。In other words, as stated in the above-mentioned literature,
Adhesive sheets are generally made of glass cloth impregnated with semi-hardened epoxy resin, etc., which softens due to the temperature and pressure during bonding, fills the gap between the insulating base materials in this softened state, and then hardens to form the bond. In order to act,
This is because it is difficult to control the value of H including this adhesive sheet to be constant.
最近では、電子計算機システムの一層の小型化および高
速化の要請に呼応して、実装に用いられる多層プリント
配線基板はますます高密度化される傾向にあり、これに
伴って相互にINされる絶縁基材の間隙も狭小かしつつ
あるため、上記のような原因による特性インピーダンス
のばらつきはますます重要な問題となる。Recently, in response to the demand for further miniaturization and speeding up of electronic computer systems, the density of multilayer printed wiring boards used for mounting has become higher and higher. As gaps between insulating base materials are becoming narrower, variations in characteristic impedance due to the causes mentioned above will become an increasingly important problem.
そこで、本発明の目的は、信号配線層における特性イン
ピーダンスのばらつきを低減することが可能な多層プリ
ント配線基板を提供することにある。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a multilayer printed wiring board that can reduce variations in characteristic impedance in a signal wiring layer.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
本願において開示される発明のうち、代表的なものの概
要を簡単に説明すれば、下記のとおりである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、本発明になる多層プリント配線基板は、絶縁
基材の第1の主面には信号伝達のための導体パターンか
らなる信号配線層が形成され、この第1の主面と互いに
表裏をなす第2の主面には電源供給のための導体パター
ンからなる電源層または接地層が形成され、前記信号配
線層が形成された前記第1主面が相互に向き合うように
、複数枚の前記絶縁基材を絶縁材を介して積層して構成
されるものである。That is, in the multilayer printed wiring board according to the present invention, a signal wiring layer consisting of a conductive pattern for signal transmission is formed on the first main surface of the insulating base material, and the signal wiring layer is formed on the front and back sides of the first main surface. A power layer or a ground layer made of a conductive pattern for power supply is formed on the second main surface, and a plurality of the insulating layers are arranged so that the first main surface on which the signal wiring layer is formed faces each other. It is constructed by laminating base materials with an insulating material in between.
上記した本発明の多層プリント配線基板によれば、−枚
の絶縁基材の互いに表裏をなす第1および第2の主面に
、それぞれ信号配線層および電源層または接地層が形成
されるので、特性インピーダンスのばらつきに影響の大
きな両者の距離が製作過程での加圧処理などに影響され
ることなく絶縁基材の厚さで決まる一定の値になり、信
号配線層における特性インピーダンスのばらつきを低減
することができる。According to the above-described multilayer printed wiring board of the present invention, the signal wiring layer and the power supply layer or the ground layer are respectively formed on the first and second main surfaces of the two insulating base materials, which are opposite to each other. The distance between the two, which has a large effect on variations in characteristic impedance, remains a constant value determined by the thickness of the insulating base material without being affected by pressure treatment during the manufacturing process, reducing variations in characteristic impedance in the signal wiring layer. can do.
以下、本発明の一実施例である多層プリント配線基板の
一例を図面を参照しながら詳細に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of a multilayer printed wiring board according to an embodiment of the present invention will be described in detail below with reference to the drawings.
第1図は、本実施例の多層プリント配線基板の一例を示
す断面図である。FIG. 1 is a sectional view showing an example of a multilayer printed wiring board according to this embodiment.
なお、第1図は、プレス技術などによる圧着加工前にお
ける後述のような各部材の配置状態の一例を示している
。Note that FIG. 1 shows an example of the arrangement of each member as described below before crimping by a press technique or the like.
たとえば、ガラスエポキシ材やポリイミド材。For example, glass epoxy materials and polyimide materials.
セラミックス材などの絶縁性材料からなる複数の絶縁基
材lの各々の互いに表裏をなす第1主面Iaおよび第2
主面1bには、後に実装される図示しない半導体集積回
路装首などの相互間右よび外部との間における信号伝達
のための導体パターンからなる信号配線層4と、当該半
導体集積回路装置なとに動作電力を供給する電源層また
は接地層2が、メツキおよびエツチング技術の組み合わ
せなどによって形成されている。A first principal surface Ia and a second principal surface of each of the plurality of insulating base materials l made of an insulating material such as a ceramic material are opposite to each other.
On the main surface 1b, there is a signal wiring layer 4 made of a conductor pattern for transmitting signals between each other and the outside, such as a semiconductor integrated circuit device (not shown) to be mounted later, and the semiconductor integrated circuit device. A power supply layer or ground layer 2 for supplying operating power to the device is formed by a combination of plating and etching techniques.
さらに、これらの複数の絶縁基材lは、信号配線層4が
内側になるように、しかも当該信号配線層4が形成され
ている第1主面1 a sおよび電源層または接地層2
が形成されている第2主面1b同士が、絶縁性の接着シ
ート3を介して対面するように配置されている。Furthermore, these plurality of insulating base materials l are arranged so that the signal wiring layer 4 is on the inside, and the first main surface 1 a s where the signal wiring layer 4 is formed and the power supply layer or ground layer 2
The second main surfaces 1b on which are formed are arranged so as to face each other with an insulating adhesive sheet 3 interposed therebetween.
この接着シート3は、たとえばガラス布に半硬化状態の
エポキシ樹脂などを含浸させて製作されている。The adhesive sheet 3 is manufactured by, for example, impregnating glass cloth with a semi-cured epoxy resin.
そして、第1図に示されるように配置された複数の絶縁
基材1を、プレスなどによって所定の温度のもとで積層
方向に加圧することにより、接着シート3は温度および
圧によって軟化し、この軟化した状態で隣接する複数の
絶縁基材1の間隙に充満した後に硬化して、隣接する当
該複数の絶縁基材1が一体に接着された状態となり、多
層プリント配線基板が構成される。Then, by pressing the plurality of insulating base materials 1 arranged as shown in FIG. 1 in the stacking direction at a predetermined temperature using a press or the like, the adhesive sheet 3 is softened by the temperature and pressure. In this softened state, it fills the gaps between the plurality of adjacent insulating base materials 1 and then hardens, so that the plurality of adjacent insulating base materials 1 are bonded together to form a multilayer printed wiring board.
ここで、前述のように、個々の絶縁基材1の第1主面1
aに形成された信号配線層4における特性インピーダン
スZ0 は、信号配線層4を挟む絶縁物の厚さBの変動
よりも、信号配線層4と電源層または接地層2との距離
Hの変動によってより大きく影響される。Here, as described above, the first main surface 1 of each insulating base material 1
The characteristic impedance Z0 in the signal wiring layer 4 formed in a is caused by a change in the distance H between the signal wiring layer 4 and the power supply layer or the ground layer 2, rather than by a change in the thickness B of the insulating material sandwiching the signal wiring layer 4. more affected.
ところが、本実施例の場合には、個々の絶縁基材1の互
いに表裏をなす第1主面1aおよび第2主面1bにそれ
ぞれ信号配線層4および電源層または接地層2が形成さ
れているため、信号配線層4における特性インピーダン
スZ0 のばらつきへの影響が大きい当該信号配線層4
と電源層または接地層2との距離Hが、製造過程におけ
る加圧などによっても変化しない個々の絶縁基材1の厚
さ寸法となる。However, in the case of this embodiment, the signal wiring layer 4 and the power supply layer or ground layer 2 are formed on the first and second main surfaces 1a and 1b of each insulating base material 1, which are opposite to each other. Therefore, the signal wiring layer 4 has a large influence on the variation in characteristic impedance Z0 in the signal wiring layer 4.
The distance H between the power supply layer or the ground layer 2 is the thickness dimension of each insulating base material 1 that does not change even when pressure is applied during the manufacturing process.
これにより、第2図に示されるように、変形性に富む接
着シート3の厚さ寸法などを含む絶縁物の厚さBの値が
加圧などによって変化しても、信号配線層4と電源層ま
たは接地層2との距離Hが一定に維持されるため信号配
線層4における特性インピーダンスz0が大きく変動す
ることがなく、当該特性インピーダンスZ0 を所望の
設計値に一定に制御することができる。As a result, as shown in FIG. 2, even if the value of the thickness B of the insulating material, including the thickness dimension of the highly deformable adhesive sheet 3, changes due to pressure, etc., the signal wiring layer 4 and the power supply Since the distance H to the layer or ground layer 2 is maintained constant, the characteristic impedance Z0 in the signal wiring layer 4 does not vary greatly, and the characteristic impedance Z0 can be controlled to a desired design value.
この結果、たとえば、電子計算機システムなどを構成す
べく本実施例の多層プリント配線基板を用いて動作の高
速な論理素子やメモリ素子などの半導体集積回路装置を
実装する場合に、各素子の相互間や外部との間における
高周波数の電気信号の伝送路となる信号配線層4におけ
るノイズなどの障害の発生が確実に減少し、電子計算機
システムなどにおける性能向上に寄与することができる
。As a result, for example, when mounting semiconductor integrated circuit devices such as high-speed logic elements and memory elements using the multilayer printed wiring board of this embodiment to configure an electronic computer system, The occurrence of disturbances such as noise in the signal wiring layer 4, which serves as a transmission path for high-frequency electrical signals between the device and the outside, is reliably reduced, and this can contribute to improving the performance of computer systems and the like.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、絶縁基材や接着シートなどを構成する素材と
しては前記実施例中に例示したものに限らず、同様の機
能や性能を有する他の素材であってもよいことは言うま
でもない。For example, it goes without saying that the materials constituting the insulating base material, adhesive sheet, etc. are not limited to those exemplified in the above embodiments, but may be other materials having similar functions and performance.
本願において開示される発明のうち、代表的なものによ
って得られる効果を簡単に説明すれば、以下のとおりで
ある。Among the inventions disclosed in this application, the effects obtained by typical inventions are briefly described below.
すなわち、本発明になる多層プリント配線基板は、絶縁
基材の第1の主面には信号伝達のための導体パターンか
らなる信号配線層が形成され、この第1の主面と互いに
表裏をなす第2の主面には電源供給のための導体パター
ンからなる電源層または接地層が形成され、前記信号配
線層が形成された前記第1主面が相互に向き合うように
、複数枚の前記絶縁基材を絶縁材を介して積層してなる
構造であるため、特性インピーダンスのばらつきに影響
の大きな信号配線層と電源層または接地層との距離が、
製作過程での加圧処理などに影響されることなく絶縁基
材の厚さで決まる一定の値になり、信号配線層における
特性インピーダンスのばらつきを確実に低減することが
できる。That is, in the multilayer printed wiring board according to the present invention, a signal wiring layer consisting of a conductive pattern for signal transmission is formed on the first main surface of the insulating base material, and the signal wiring layer is formed on the front and back sides of the first main surface. A power layer or a ground layer made of a conductive pattern for power supply is formed on the second main surface, and a plurality of the insulating layers are arranged so that the first main surface on which the signal wiring layer is formed faces each other. Since the structure is made by laminating base materials with insulating materials in between, the distance between the signal wiring layer and the power supply layer or ground layer, which has a large effect on variations in characteristic impedance, is
A constant value determined by the thickness of the insulating base material is obtained without being affected by pressure treatment during the manufacturing process, and variations in characteristic impedance in the signal wiring layer can be reliably reduced.
第1図は、本実施例の多層プリント配線基板の一例を示
す断面図、
第2図は、多層プリント配線基板の各部の寸法と特性イ
ンピーダンスの変動との関係の一例を示す線図、
第3図は、同じく、多層プリント配線基板の各部の寸法
と特性インピーダンスの変動との関係の一例を示す線図
、
第4図は、従来の多層プリント配線基板の構造の一例を
示す断面図である。
1・・・絶縁基材、1a・・・第1主面、1b・・・第
2主面、2・・・電源層または接地層、3・・・接着シ
ート(絶縁材)、4・・・信号配線層、B・・・信号配
線層を挟む絶縁材の厚さ、H・・・電源層または接地層
と信号配線層との距離、Zo ・・・信号配線層にお
ける特性インピーダンス、101a、101b・・・絶
縁基材。
第
図
第
図
電源層または接地層と信号配線層との距離第
図
101 a。
101b:絶縁基材FIG. 1 is a cross-sectional view showing an example of a multilayer printed wiring board according to the present embodiment; FIG. 2 is a diagram showing an example of the relationship between the dimensions of each part of the multilayer printed wiring board and variations in characteristic impedance; Similarly, FIG. 4 is a diagram showing an example of the relationship between the dimensions of each part of a multilayer printed wiring board and variations in characteristic impedance, and FIG. 4 is a sectional view showing an example of the structure of a conventional multilayer printed wiring board. DESCRIPTION OF SYMBOLS 1... Insulating base material, 1a... 1st main surface, 1b... 2nd main surface, 2... Power supply layer or ground layer, 3... Adhesive sheet (insulating material), 4... - Signal wiring layer, B...Thickness of the insulating material sandwiching the signal wiring layer, H...Distance between the power supply layer or ground layer and the signal wiring layer, Zo...Characteristic impedance in the signal wiring layer, 101a, 101b...Insulating base material. Figure 101a Distance between power supply layer or ground layer and signal wiring layer Figure 101a. 101b: Insulating base material
Claims (1)
ターンからなる信号配線層が形成され、この第1の主面
と互いに表裏をなす第2の主面には電源供給のための導
体パターンからなる電源層または接地層が形成され、前
記信号配線層が形成された前記第1主面が相互に向き合
うように、複数枚の前記絶縁基材を絶縁材を介して積層
してなる多層プリント配線基板。1. A signal wiring layer consisting of a conductor pattern for signal transmission is formed on the first main surface of the insulating base material, and a signal wiring layer for power supply is formed on the second main surface, which is opposite to the first main surface. A plurality of the insulating base materials are laminated with an insulating material in between so that a power layer or a ground layer made of a conductive pattern is formed, and the first main surface on which the signal wiring layer is formed faces each other. Multilayer printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9730789A JPH02277286A (en) | 1989-04-19 | 1989-04-19 | Multilayer printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9730789A JPH02277286A (en) | 1989-04-19 | 1989-04-19 | Multilayer printed board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02277286A true JPH02277286A (en) | 1990-11-13 |
Family
ID=14188834
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9730789A Pending JPH02277286A (en) | 1989-04-19 | 1989-04-19 | Multilayer printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02277286A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0715148A (en) * | 1993-06-11 | 1995-01-17 | Internatl Business Mach Corp <Ibm> | Multilayer circuit board |
| KR20030047381A (en) * | 2001-12-10 | 2003-06-18 | 주식회사 심텍 | The printed circuit board for continuity Rambus Interface Memory Module |
| JP2005051075A (en) * | 2003-07-29 | 2005-02-24 | Matsushita Electric Ind Co Ltd | Multilayer circuit board and manufacturing method thereof |
| WO2024080221A1 (en) * | 2022-10-13 | 2024-04-18 | 三井金属鉱業株式会社 | Circuit board manufacturing method |
-
1989
- 1989-04-19 JP JP9730789A patent/JPH02277286A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0715148A (en) * | 1993-06-11 | 1995-01-17 | Internatl Business Mach Corp <Ibm> | Multilayer circuit board |
| KR20030047381A (en) * | 2001-12-10 | 2003-06-18 | 주식회사 심텍 | The printed circuit board for continuity Rambus Interface Memory Module |
| JP2005051075A (en) * | 2003-07-29 | 2005-02-24 | Matsushita Electric Ind Co Ltd | Multilayer circuit board and manufacturing method thereof |
| WO2024080221A1 (en) * | 2022-10-13 | 2024-04-18 | 三井金属鉱業株式会社 | Circuit board manufacturing method |
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