JPH02278364A - Test system for multiprocessor - Google Patents

Abstract

PURPOSE:To test plural processors automatically through the starting of the processor of one time by making it possible to start and test other processors one after another part the test of the under-mentioned processor is finished by selecting one processor from among plural processors, and starting this processor and executing test starting for it. CONSTITUTION:A test execution control part 20, a test starting part 30, a test finish informing part 40, a processor state storage part 50 and a test result deciding part 60 are stored in a main storage part 10, and these are constituted as a program and data. When the test starting part 30 selects the processor 1 and executes the test starting for it, the test finish informing part 40 detects the finish of this test, and informs the test execution control part 20 of the finish of the test. When the test execution control part 20 receives this information, it makes the test result deciding part 60 decide a test result. Then, when the result of this test is decided, the next processor 2 is selected and started, and the test is started. Thus, the test is executed automatically by starting successively the processors by starting one processor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiprocessor testing method for testing processor instructions of a plurality of processors housed in a data processing device.

[Prior Art] A conventional test method for this type of multiprocessor is to manually select one processor and turn it on and off.
After that, start the test on this processor,
When this Bromo Nsa test is completed, the next Bromo Nsa is selected and started up manually, and the test is started on it.

[Problems to be Solved by the Invention] The conventional multiprocessor testing method described above selects a test target for executing a processor instruction test, and each time a test is performed, the selected processor is , it takes a long time to restart the system, and since restarting the system requires human intervention, it can lead to operational errors.

Another problem is that as the number of processors housed in a data processing device increases, testing time increases proportionally.

[Means for Solving the Problems] In order to solve such problems, the multiprocessor testing method according to the present invention selects one processor from a plurality of 10 processors and tests the startup of this processor. a test execution control means for controlling the execution of the test of the processor; a test start means for starting up the processor; a test end notification means for notifying the test execution control means of the end of the test after detecting the end of the test of the processor started by the test start means; and end of the test for the processor. a test result determining means for determining the test result of this processor under the control of the test execution control means after the test result is detected; This method is biased toward the method of starting up the software and starting the test.

[Operation] When the test activation means selects a processor and tests it, the test completion notification means detects the end of this test and notifies the test execution control means of the end of the test. When the test execution control means receives this notification, it causes the test result determination means to determine the test result. When the result of this test is determined, the next processor is selected and started up, and the test is started.

[Example] Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a multiprocessor testing method according to the present invention. In the same figure, 1 to 4
is the processor under test, 10 is the main memory, 70 is the bus line,
71 is an operation unit, and 72 is a console device.

In the main storage device 10, as shown in the figure, a test execution control section 20. Test startup part 30. Exam completion notification section 40. Processor state storage unit 50. A test result determination section 60 is stored, and these are configured as programs and data. Further, to describe the configuration of each of the above sections in detail, the test execution control section 20 stores test execution procedures, data for test execution, and the like. The processor state storage unit 50 stores the test target processor numbers of the processors under test 1 to 4, that is, the processors under test 1.
Test target processor numbers set as 1, 2, 3, and 4 corresponding to 2, 3, and 4 are stored, respectively.

In addition, the processor state storage unit 50 also stores, in correspondence with the test target processor number, the state of the processor corresponding to this number, that is, either the test non-execution state B1 running state or the execution completed state. .

Then, when the operation unit 71 selects one processor from among the four connected processors and bootstraps it to perform a bootstrap operation, the launched processor The programs for each of the above sections stored in the main storage device 10 are read out and executed. That is, the test execution control section 20 refers to the processor state storage section 50 and notifies the test starting section 30 of the processor number to be tested. When the test activation unit 30 receives the test target processor number, it sets the internal state of the processor such as the register of the test target processor using the inter-processor communication function, and starts the test on the test target Bromo Sosa. Further, the test starting unit 30 updates the state of the corresponding processor in the processor state storage unit 50 from the initial state, which is the test not executed state, to the test execution state. When the test end notification section 40 detects the end of the test started by the test starting section 30, it notifies the test execution control section 20 of the processor number on which this test has ended. Further, the test end notification section 40 updates the state of the corresponding processor in the processor state storage section 50 from the test execution state to the test end state. The test result determination unit 60 determines the test result for the processor to be tested and upon detecting an error, transmits an error message to the console device 72 .

Then, the test execution control section 20 refers to the processor state storage section 50 and, if all the processor states are in the test end state, transmits a test end message to the console device 72.

The detailed operation of the multiprocessor testing method configured as described above will be explained based on the flowchart shown in FIG.

In step 100, the processor 1 selected by the operation unit 71 is controlled to perform a bootstrap operation to start up the processor 1. The processor 1 is a test execution control unit 20 .in the main memory 10 . Test startup part 30. Exam completion notification section 40. Processor state storage unit 50. When the test result determination section 60 becomes accessible, when the operator inputs a test execution command to the console device 72 in step 101, the test execution control section 20 detects this test execution command.

This test execution command is a command to test the processors 1 to 4, and this command is a command for testing the processors 1 to 4. It is transmitted to the test execution control section 20 via the bus line 70. When the test execution control section 20 detects and accepts the above test execution command, it notifies the test starting section 30 of the test target processor number in step 102. Then, the test starting unit 30 receives this and starts a test for the processor corresponding to this number in step 103.

Next, in step 104, the test completion notification unit 40 detects the completion of the test of this processor, and when this completion is detected, in step 105, the test target processor number for which the test has been completed is sent to the test execution control unit 20. Notice. Based on this test completion notification, the test execution control unit 20 causes the test result determination unit 60 to determine the result of the test executed by the processor under test in step 106. In step 107, the test result determination unit 60 determines whether the test result is good or bad.
In other words, it is determined whether this is an error or not.
", that is, when it is determined that there is an error, step 108
The above error message is sent to the console device 72, which receives it, displays it, and reports it to the operator. Further, when the test result determination section 60 determines "N" in step 107, that is, it determines that there is no error, the process proceeds to step 109. When the test result determination section 60 finishes the above test result determination process, the test execution control section 20 refers to the processor state storage section 50 in step 109 to determine whether there is a processor to be tested. Determine whether there are still processors remaining. If this is "N", that is, there are no remaining processors, it is determined that the test of all processors has been completed, and the above-mentioned test completion message is sent to the console device 72, which receives it and displays it. and notify the operator of the end of the test. When the result of step 10 is "Y", that is, there are still processors to be tested, the test execution control unit 20 selects and starts the next processor based on the above-mentioned inter-processor communication, and proceeds to step 103. The test startup unit 3o is migrated and executed by this launched processor.
The test is started.

In this way, the test is carried out by sequentially starting up the processors reading out and executing the programs of each section stored in the main storage device 10.

In this embodiment, the startup processor is Processor 1, but it may be any other processor and the test can be performed in the same manner as described above.

[Effects of the Invention] As is clear from the above explanation, according to the multiprocessor testing method according to the present invention, one processor is selected from a plurality of processors, and it is started up for test startup. For example, after testing this processor,
Since the configuration is such that tests are performed by starting up other processors in sequence, it is possible to automatically test multiple processors in succession by starting up one processor, and restarting the processor without manual intervention is possible. There is no need to do this, so there are no erroneous operations associated with restarting, and the test time is also shortened.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a multiprocessor testing method according to the present invention, and FIG. 2 is a flowchart for explaining the operation. 1 to 4...processor, 10...main storage device,
20...Test execution control unit, 30...Test starting unit, 40-...Test end notification unit, 50...10 processor status storage unit, 60...Test result determination unit, 70... ...
EJ: line, 71...operation unit, 72...console device. Patent applicant: NEC Corporation

Claims (1)

[Claims] In a multiprocessor test method for testing a plurality of processors housed in a data processing device, a processor that selects one processor from the plurality of processors and starts up this processor. startup means; test execution control means for controlling execution of a test of the processor; and test startup means for starting a test on a processor that is controlled by the test execution control means and started up by the processor startup means. and a test end notification means for notifying the test execution control means of the end of the test after detecting the end of the test of the processor started by the test start means; a test result determining means that determines the test result of this processor under control of the test execution control means; and after the test result is determined by the test result determining means, the next processor is selected and started up to start the test. A multiprocessor testing method characterized in that the processors are automatically started up in sequence and tested by starting one processor and starting a test on this processor. .