JPH02280441A - Hybrid type exchange - Google Patents

Hybrid type exchange

Info

Publication number
JPH02280441A
JPH02280441A JP1102105A JP10210589A JPH02280441A JP H02280441 A JPH02280441 A JP H02280441A JP 1102105 A JP1102105 A JP 1102105A JP 10210589 A JP10210589 A JP 10210589A JP H02280441 A JPH02280441 A JP H02280441A
Authority
JP
Japan
Prior art keywords
line
speed channel
switch
switching
channel switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1102105A
Other languages
Japanese (ja)
Other versions
JP2540941B2 (en
Inventor
Koji Suzuki
鈴木 晃二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP10210589A priority Critical patent/JP2540941B2/en
Publication of JPH02280441A publication Critical patent/JPH02280441A/en
Application granted granted Critical
Publication of JP2540941B2 publication Critical patent/JP2540941B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE:To use a high speed channel switching function and reconnection function with a high speed channel switch in common and to easily cope with the revision of the line classification by arranging a low speed channel switch and a cell switch to the post-stage of the high speed channel switch. CONSTITUTION:A line among lines accommodating a high speed channel is connected at first to a line interface 2, in which the data passing through the line is converted to a data suitable for an internal link interface and the output connects to an outgoing line by a high speed channel switch 3 and connected to an output line via the line interface 2 again. As to a line accommodating a low speed channel, the lines enter a low speed channel switch 4 entirely via the high speed channel switch 3 and are connected to the outgoing line via the high speed channel switch 3 and the line interface 2 again, the switching processing to a cell is also similar in the case of switching of the low speed channel. When the line class accommodated in an exchange is changed, the desired switching processing is attained by having only to change the connection to the high speed channel switch 3 and post-stage switches 4, 5.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はハイブリッド型交換機に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a hybrid switching system.

〔従来の技術〕[Conventional technology]

従来技術により異なる交換動作を要求する別種の回線を
収容するための方法としては、回線を同一種類毎にまと
めてそれぞれ別の交換機に対して接続を行ない、交換処
理を行なうのが一般的であった。
As a conventional method for accommodating different types of lines that require different switching operations, it is common to group lines of the same type and connect them to different exchanges to perform switching processing. Ta.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

先に述べた複数交換機による交換処理を行なう方法によ
ると、あらかじめ回線の種類ごとに回線をまとめるなめ
、後に回線の種類を変更するためには、物理的に回線の
接続変更を行なう必要があり、手間がかかる。さらに、
スイッチに付帯する周辺ハードウェアが交換機毎にある
ため、ハードウェア量が大きくなり高価になるという問
題がある。
According to the above-mentioned method of performing switching processing using multiple exchanges, it is necessary to group the lines by line type in advance, and to change the line type later, it is necessary to physically change the connection of the line. It takes time and effort. moreover,
Since each switch has peripheral hardware attached to the switch, there is a problem in that the amount of hardware becomes large and expensive.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のハイブリッド型交換機は、回線上の固定的なフ
シームフォーマット内に高速チャネルを1チャネルだけ
収容する回線と、比較的低速チャネルを多数多重化して
収容する回線と、先頭部に宛先を示すアドレスを含んだ
ヘッダを持ちその1麦に固定長の情報収容部を有するセ
ルに対してそれぞれ宛先の異なるセルを複数多重化した
ものを収容する回線とのそれぞれに対応して交換処理を
行なう高速チャネルスイッチ、低速チャネルスイッチ、
セルスイッチの3種類のスイッチを備え、高速チャネル
を収容している回線に対しては高速チャネルの交換処理
を行ないかつ低速チャネル毎や個別のセル毎の交換動作
は行なわないが、クレームまるごとでの交換動作を行な
う前記高速チャネルスイッチを最前部に配置し、この高
速チャネルスイッチの後段に低速チャネルに対するチャ
ネル毎の交換動作を行なう低速チャネルスイッチと宛先
の異なるセルが複数多重化された回線に対してセル毎の
交換動作を行なうセルスイッチとを配置する構成である
。
The hybrid switching system of the present invention includes a line that accommodates only one high-speed channel within a fixed frame format on the line, a line that accommodates a large number of multiplexed relatively low-speed channels, and a line that indicates the destination at the beginning. A high-speed system that performs exchange processing in correspondence with a cell that has a header containing an address and a fixed-length information storage part, and a line that accommodates multiplexed cells each with a different destination. channel switch, low speed channel switch,
It is equipped with three types of cell switches, and performs high-speed channel switching processing for lines that accommodate high-speed channels, and does not perform switching operations for each low-speed channel or individual cell. The high-speed channel switch that performs the switching operation is placed at the forefront, and the low-speed channel switch that performs the switching operation for each channel for low-speed channels is placed after the high-speed channel switch, and a plurality of cells with different destinations are multiplexed. This configuration includes a cell switch that performs a switching operation for each cell.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

本発明の一実施例を示す第1図を参照すると、回線群1
は種々の交換処理を要求する回線が入り交じっている。
Referring to FIG. 1 showing one embodiment of the present invention, line group 1
is a mixture of lines that require various types of switching processing.

回線インタフェース2は回線の終端を行ない、処理しや
すい型の内部インタフェースへの変換を行なう。高速チ
ャネルスイッチ3は回線のうちフレーム内に高速チャネ
ル1チャネルのみを収容した回線に対する交換処理を行
なう。
The line interface 2 terminates the line and converts it into an internal interface of a type that is easy to process. The high-speed channel switch 3 performs switching processing for a line in which only one high-speed channel is accommodated in a frame.

すなわち、入線と出線間で論理的な接続を行ない入力し
たディジタル情報はトランスペアレントに出て行く。低
速チャネルスイッチ4はフレーム内に複数多重された低
速チャネルに対してチャネルごとの交換を行なうスイッ
チであり、例えば時分割のスイッチより構成される。こ
のスイッチ4は入線の特定チャネルのデータを出線側の
要求されるタイムスロット内の位置に入れて出すことに
より交換動作する。セルスイッチ5は回線のフレーム内
に多重された固定長の宛先情報を入れるヘッダ部と固定
長の情報を収容する部分より構成されるセルに対して交
換処理を行なうスイッチである。このスイッチ5は入力
したセルの宛先情報を見て宛先に対応する回線に出力す
る機能を有する。本交換機に収容される回線のうちで高
速チャネルを収容するものは、まず回線インタフェース
2により内部リンクインタフェースへと変換されてから
高速チャネルスイッチ3により出線に接続され、回線イ
ンタフェース2を再び経由して出側回線へと接続される
。低速チャネルを収容する回線については、全て高速チ
ャネルスイッチ3により低速チャネルスイッチ4に対し
て接続が行なわれる。すなわち、低速チャネルを収容す
る回線からのデータは回線インタフェース2を通過して
高速チャネルスイッチ3により回線単位で確立された接
続により低速チャネルスイッチ4に入る。低速チャネル
スイッチ4は低速チャネル毎の交換を行ない、出側の内
部リンクへと出力する。出力データは再び高速チャネル
スイッチ4及び回線インタフェース2を経由して出線へ
と接続される。セルに対する交換処理も低速チャネルの
交換と同様である。回線インタフェース2と高速チャネ
ルスイッチ3を経てセルスイッチ5に回線単位で接続さ
れ、セルスイッチ5によりセル単位での交換処理が行な
われる。この交換機に収容される回線の種別が変更され
た場合、高速チャネルスイッチにより確保されている後
段のスイッチへの接続を変えるだけで所望の交換処理を
行なうことが可能となる。
That is, a logical connection is made between an incoming line and an outgoing line, and the input digital information transparently goes out. The low-speed channel switch 4 is a switch that performs channel-by-channel switching for a plurality of low-speed channels multiplexed within a frame, and is configured, for example, as a time-division switch. This switch 4 performs an exchange operation by putting data on a particular channel on the incoming line into a position within a required time slot on the outgoing line. The cell switch 5 is a switch that performs switching processing for cells, which are composed of a header section for storing fixed-length destination information multiplexed within a line frame and a section for accommodating fixed-length information. This switch 5 has a function of checking the destination information of the input cell and outputting it to the line corresponding to the destination. Among the lines accommodated in this exchange, those that accommodate high-speed channels are first converted to internal link interfaces by line interface 2, then connected to outgoing lines by high-speed channel switch 3, and then passed through line interface 2 again. and connected to the outgoing line. All lines accommodating low-speed channels are connected to the low-speed channel switch 4 by the high-speed channel switch 3. That is, data from a line accommodating a low-speed channel passes through the line interface 2 and enters the low-speed channel switch 4 through a connection established for each line by the high-speed channel switch 3. The low-speed channel switch 4 performs switching for each low-speed channel and outputs it to the outgoing internal link. The output data is again connected to the outgoing line via the high speed channel switch 4 and the line interface 2. The switching process for cells is also similar to the switching for low-speed channels. Each line is connected to a cell switch 5 via a line interface 2 and a high-speed channel switch 3, and the cell switch 5 performs switching processing on a cell-by-cell basis. When the type of line accommodated in this exchange is changed, desired exchange processing can be performed simply by changing the connection to the subsequent switch secured by the high-speed channel switch.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、高速チャネルスイ
ッチによる高速チャネルの交換機能とスイッチに対する
接続変え機能とが併用できるため、回線種別の変更に対
して容易に対応できる。
As described above, according to the present invention, the high-speed channel exchange function by the high-speed channel switch and the connection change function for the switch can be used together, so that changes in line type can be easily handled.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す構成図である。 1・・・回線群、2・・・回線インタフェース、3・・
・高速チャネルスイッチ、4・・・低速チャネルスイッ
チ、5・・・セルスイッチ。
FIG. 1 is a block diagram showing an embodiment of the present invention. 1... Line group, 2... Line interface, 3...
- High-speed channel switch, 4...low-speed channel switch, 5... cell switch.

Claims (1)

【特許請求の範囲】 固定的なフレームフォーマットの中に高速チャネルを1
チャネル収容する回線と、低速チャネルを複数収容する
回線と、固定長の情報部を持ち先頭部に情報の宛先を示
すヘッダを有する固定長のセルを複数多重化したものを
収容する回線とのそれぞれに対して回線種別により異な
る交換処理を行なうとともに、 前記高速チャネルを収容する回線に対してはチャネルの
交換動作を行ない、前記低速チャネルを収容する回線及
び前記セルを収容する回線に対しては個別のチャネル及
び個別のセルに対する交換動作ではなくフレームフォー
マットまるごとの交換動作を行なう高速チャネルスイッ
チを最前段に配置し、前記高速チャネルスイッチの後段
に低速チャネルに対してチャネル毎の交換動作を行なう
低速チャネルスイッチと宛先の異なるセル毎に交換動作
を行なうセルスイッチとを配置し、 異なる交換処理を要求する前記3種類の回線を回線種別
を意識することなく接続して要求される情報に対する交
換処理を行なう ことを特徴とするハイブリッド型交換機。
[Claims] One high-speed channel in a fixed frame format.
A line that accommodates a channel, a line that accommodates a plurality of low-speed channels, and a line that accommodates a multiplexed number of fixed-length cells each having a fixed-length information section and a header indicating the destination of the information at the beginning. In addition to performing different switching processes depending on the line type, channel switching operations are performed for the line that accommodates the high-speed channel, and individual switching operations are performed for the line that accommodates the low-speed channel and the line that accommodates the cell. A high-speed channel switch that performs a switching operation for the entire frame format rather than a switching operation for channels and individual cells is placed at the forefront, and a low-speed channel switch that performs a switching operation for each channel for low-speed channels is placed after the high-speed channel switch. A switch and a cell switch that performs switching operations for each cell with a different destination are installed, and the three types of lines that require different switching processes are connected without being aware of the line type, and the switching process for the requested information is performed. This is a hybrid type switching machine that is characterized by:
JP10210589A 1989-04-20 1989-04-20 Hybrid switch Expired - Lifetime JP2540941B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10210589A JP2540941B2 (en) 1989-04-20 1989-04-20 Hybrid switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10210589A JP2540941B2 (en) 1989-04-20 1989-04-20 Hybrid switch

Publications (2)

Publication Number Publication Date
JPH02280441A true JPH02280441A (en) 1990-11-16
JP2540941B2 JP2540941B2 (en) 1996-10-09

Family

ID=14318521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10210589A Expired - Lifetime JP2540941B2 (en) 1989-04-20 1989-04-20 Hybrid switch

Country Status (1)

Country Link
JP (1) JP2540941B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6461150A (en) * 1987-09-01 1989-03-08 Fujitsu Ltd Multiple bearer exchange

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6461150A (en) * 1987-09-01 1989-03-08 Fujitsu Ltd Multiple bearer exchange

Also Published As

Publication number Publication date
JP2540941B2 (en) 1996-10-09

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