JPH02281402A - Writing circuit for magnetic storage device - Google Patents

Abstract

PURPOSE:To shorten the waveform disorder range at the end of writing by providing a circuit which detects a write current, ORing its output and a write gate signal, and performing the gate processing of write data with the OR result signal. CONSTITUTION:The writing circuit is equipped with means 20 - 22 which detect a write current (c) supplied to a magnetic head 11 and output a signal (g) corresponding to whether or not there is the write current (c), and an OR circuit 19 which ORs said signal (g) and the write gate signal (f). Then a current switch corresponding to write information is controlled by the output signal (h) of the OR circuit 19. Namely, the current switch corresponding to the write information is controlled by the OR output (h) between the signal (g) corresponding to whether or not there is the write current (c) and the write gate signal (f) to control writing operation. Consequently, the waveform disorder range at the end of the writing can be minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a write circuit for a magnetic storage device, and more particularly to write control for a high-speed transfer magnetic storage device.

[Prior Art] Conventionally, this type of write circuit has adopted a configuration as shown in FIG.

That is, a positive voltage +V is applied to the midpoint of the winding of the magnetic head 1. Further, one end and the other end of the winding of the magnetic head 1 are connected to the read amplifier circuit 2, one end of the winding of the magnetic head 10 is connected to the collector of the transistor 3, and the other end of the winding of the magnetic head 1 is connected to the collector of the transistor 3. is connected to the collector of transistor 4. The bases of these transistors 3 and 4 are connected to one and the other output terminals of the voltage conversion circuit 5.

The voltage conversion circuit 5 is supplied with write data q and a write gate signal r. The voltage conversion circuit 5 outputs a differential switching signal pSp corresponding to the write data q when the write gate signal r is at a high level, and does not output a switching signal when the write gate signal r is at a low level.

The emitters of transistor 3 and transistor 4 are connected to each other, and their connection point is connected to the collector of transistor 6. A negative voltage -V is applied to the emitter of this transistor 6 via a resistor 7. Further, the output signal of the conversion circuit 8 is supplied to the base of the transistor 6.

This conversion circuit 8 is supplied with a write gate signal r. The conversion circuit 8 outputs a voltage that turns on the transistor 6 when the write gate signal r is at a high level, and outputs a voltage of 1 when the write gate signal r is at a low level.

Next, the operation of the conventional circuit shown in FIG. 4 will be explained with reference to the waveform diagrams shown in FIGS. 5 and 6.

The write data q (FIG. 5(A)) is a logic signal for recording information, and the write gate signal r (FIG. 5(B)) causes the magnetic head 1 to perform a recording operation when it is at a high level. is a logical control signal for

When the write gate signal r is at a high level, the voltage conversion circuit 5 obtains output signals p (FIG. 5(D)), which are differential switching signals corresponding to the write data q.

On the other hand, transistor 6 is turned on when the write gate signal "is at high level, so that a write current m (FIG. 5(C)) flows. Transistor 3 and transistor 4 Switching is performed in response to the outputs p and b of the voltage conversion circuit 5 supplied to the magnetic head 1, so that a head current k (FIG. 5(E)) is generated.As this head current k flows to the magnetic head 1, Information corresponding to write data q is written to the recording medium.

Regarding the delay time of the on/off operation of the write current m, the off time is particularly slow. Since the write data gate function in the voltage conversion circuit 5 is a logic circuit, its operation speed is fast.

Therefore, a direct current flows instantaneously in the head current as shown at t when the head current is off in FIG. 5(E).

The read waveform y in this case is shown in FIG. In the splice portion of the readout waveform y in FIG. 6, a portion n at the beginning of writing is a short-time waveform disturbance, but a portion S at the end of writing is a DC-erased portion.

[Problems to be Solved by the Invention] - As mentioned above, in the conventional write circuit, the waveform disturbance at the splice part at the end of writing is long, resulting in a situation where the waveform appears to be erased by direct current as shown in Figure 6. There is. In particular, as the delay time when the write current is turned off becomes longer than the cycle of the write data, the erase section becomes longer.

Generally, there is an address mark that uses direct current erasure as a recording form of recorded information.

The address mark is located at the beginning of the recorded data and is provided to indicate the starting point of the data. The above-mentioned conventional writing circuit has a drawback in that the address mark is easily detected erroneously because a DC erase portion may occur at the end of writing as described above.

This invention improves this drawback.

[Means for Solving the Problems] A write circuit according to the present invention includes means for detecting a write current supplied to a magnetic head and outputting a signal corresponding to the presence or absence of the write current, and a means corresponding to the presence or absence of the write current. The present invention is characterized in that it includes an OR circuit that logically ORs the signal and the write gate signal, and the current switch corresponding to the write information is controlled by the output signal of the OR circuit.

[Operation] The current switch corresponding to the write information is controlled by the OR output of the signal corresponding to the presence or absence of the write current and the write gate signal, and the write is controlled. Therefore, the range of waveform disturbance at the end of writing can be shortened.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention. In this embodiment, a positive voltage +
V is applied. Further, one end and the other end of the winding of the magnetic head 11 are connected to the reading amplifier circuit 12, and one end of the winding of the magnetic herad 11 is connected to the collector of the transistor 13. The other end is connected to the collector of transistor 14. The bases of the transistor 13 and the Laran jitter 1 are connected to one and the other output terminals of the voltage conversion circuit 15.

The voltage conversion circuit 15 is supplied with write data e to one input terminal thereof, and is also supplied with a write gate signal f via an OR circuit 19.

The voltage conversion circuit 15 outputs differential switching signals d and d corresponding to the write data e when the output signal of the OR circuit 19 is at a high level, and outputs the differential switching signals d and d corresponding to the write data e when the output signal of the OR circuit 19 is at a low level. No signal is output.

The emitters of transistor 13 and transistor 14 are
They are connected to each other, and their connection point is connected to the collector of the transistor 16 via a resistor 20. A negative voltage -■ is applied to the emitter of this transistor 16 via a resistor 17.
is applied.

A conversion circuit 18 is also provided at the base of this transistor 16.
output signal is provided. This conversion circuit 18 is supplied with a write gate signal f.

The conversion circuit 18 outputs a voltage that turns on the transistor 16 when the write gate signal f is at a high level, and outputs a voltage of 1 when the write gate signal f is at a low level.

Further, both ends of the resistor 20 are connected to one and the other input terminals of the conversion circuit 21. This conversion circuit 21 has a resistor 2
It converts the differential voltage across 0 to a ground reference potential. The output voltage of this conversion circuit 21 is supplied to a comparator 22. This comparator 22 is also supplied with a reference voltage from a reference power supply 23. From this comparator 22,
When the output voltage of the conversion circuit 21 is higher than the voltage of the reference power supply 23, a high level output g is obtained. The output g of this comparator 22 is supplied to an OR circuit 19.

Next, the operation of the circuit shown in FIG. 1 will be explained with reference to FIGS. 2 and 3.

2 and 3 show waveforms at main points in the circuit shown in FIG. 1. FIG. 2 is a waveform diagram during writing.

The write data e (FIG. 2(A)) is a logical signal of recording information, and the write gate signal f (FIG. 2(B)) is
This is a logic control signal that causes the magnetic head 11 to perform a recording operation when it is at a high level.

When the write gate signal f is at a high level, the transistor 16 is turned on, and the write current C (Fig. 2 (C))
flows. At this time, the differential voltage generated across the resistor 20 is proportional to the magnitude of the write current C. Reference power supply 2
The voltage No. 3 is set below the voltage corresponding to the minimum recordable current value. Therefore, when the output g of the comparator 22 is at a high level, the recordable range is sufficiently covered. Conversely, when the output g of the comparator 22 is at a low level, recording is impossible.

The output signal h of the OR circuit 19 (FIG. 2(D)) is an OR gate signal of the write gate signal f and the output g of the comparator 22. When this output signal is at a high level, the recordable range is sufficiently covered.

When the output signal of the OR circuit 19 is at a high level, the voltage conversion circuit 15 outputs an output signal d (FIG. 2(E)) which is a differential switching signal corresponding to the write data e.
Output T. The transistors 13 and 14 perform switching in response to the output signals d and d of the voltage conversion circuit 15. As a result, a head current a (FIG. 2(F)) is generated. When this head current a flows through the magnetic head 11, information corresponding to the write data e is written onto the recording medium.

The output signal of the OR circuit 19 is at a high level in the range where the write current C indicates a recordable current value. For this purpose, the output signal d of the voltage conversion circuit 15,
d also exists as a switching signal corresponding to the write data e while the write current C is within the recordable range. The same applies to the head current a.

When the information written in this manner is reproduced, as shown in FIG. 3, the waveform disturbances at the splice portion i at the beginning of writing and at the splice portion j at the end of writing become shorter.

[Effects of the Invention] As explained above, the present invention provides a circuit for detecting a write current, performs a logical sum of the output of the circuit and a write gate signal, and performs gate processing of write data using the logical sum signal. This has the effect of shortening the waveform disturbance range at the end of writing. As a result, reliability against erroneous detection of address marks is improved, and a highly reliable magnetic storage device can be provided.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of an embodiment of the present invention, Figures 2 and 3 are
The figure is a waveform diagram showing the waveforms at the main points in Fig. 1, Figure 4 is a circuit diagram of an example of a conventional writing circuit, and Figures 5 and 6 are waveforms showing the waveforms at the main points in Fig. 4. It is a diagram. 11... Magnetic head 15... Voltage conversion circuit 19... OR circuit (OR circuit) 20... Resistor 21... Conversion circuit 22... Comparator 23... Reference power supply C...・Write current d, d...Differential switching signal e...Write data (write information) f...Write gate signal g...Comparator output signal (signal corresponding to the presence or absence of write current) h ...Output signal of the OR circuit (output signal of the OR circuit) Patent applicant NEC Corporation Agent Patent attorney Ehon Toshiyuki (F) Head electric 'jLa Figure 2 11: Magnetic head 20: Resistor 23: Reference Power supply C: Write current d, d: Differential switching signal Write data Write gate signal Comparator output signal OR circuit output signal Figure 3 Figure 10v Figure 1

Claims (1)

[Claims] Means for detecting a write current supplied to a magnetic head and outputting a signal corresponding to the presence or absence of the write current, and a logical sum of the signal corresponding to the presence or absence of the write current and a write gate signal. What is claimed is: 1. A write circuit for a magnetic storage device, comprising: an OR circuit that takes the following formula: A current switch corresponding to write information is controlled by an output signal of the OR circuit.