JPH0228351A - Semiconductor device - Google Patents

Abstract

PURPOSE:To seek to improve reliability of a semiconductor device by making a bonding and sealing material out of the alloy of gold and tin. CONSTITUTION:The base substrate 3 of a chip carriers, where a semiconductor chip 1 is mounted through a bump electrode 2, and the cap 4 of the chip carrier are bonded with bonding and sealing material 100 so as to seal the semiconductor chip. And the bonding and sealing material 100 is made of alloy of Au and Sn. That is, since the surface of the bonding and sealing material 100 consisting of Au and Sn hardly produces an oxide film, it can be made such that the outside air does not enter the inside of a cavity by effecting the sealing with the base substrate 3 and the cap favorably. Hereby, the reliability of a semiconductor device can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a technique that is effective when applied to a semiconductor device in which a semiconductor chip is sealed in a chip carrier type package.

[Conventional technology]

A sealing container called a chip carrier is used to seal the semiconductor chip having the bump 1'Ii electrode. The chip carrier is made of, for example, mullite (3AQ20.・2S i O2
) and a base board consisting of, for example, aluminide (
A semiconductor chip is mounted on the base substrate via bump electrodes.

The base substrate and the cap are adhesively sealed using an adhesive sealant after the semiconductor chip is mounted on the base substrate.

This adhesive sealing material used solder (an alloy of PB and Sn) having a lower melting point than the bump electrodes of the semiconductor chip. This is because the melting point of solder can be adjusted to a desired value by changing the content of Sn contained therein.

In the sealing process, a solder layer is first formed on predetermined portions of the base substrate on which the semiconductor chip is mounted and the cap. Thereafter, the solder layer of the base substrate and the solder layer of the cap are fused and sealed in a nitrogen atmosphere at a predetermined temperature. The sealing is performed in a nitrogen atmosphere as described above by filling the cavity surrounded by the base substrate and the cap with nitrogen.

This is to prevent moisture from entering the cavity. Note that the technology for chip carriers (or packages) that seal semiconductor chips with bump electrodes is 1.
For example, it is described in Japanese Patent Application Laid-Open No. 62-249429.

[Problem to be solved by the invention]

The inventor of the present invention found the following problem as a result of studying a chip carrier in which the base substrate and the cap are adhesively sealed with solder.

In other words, since the solder made of PB and Sn is easily oxidized, before the solder that is the adhesive sealing material on the base board side and the solder that is the adhesive sealing material on the cap side are fused, the surface of these solders must be coated. has an oxide film. If there is an oxide film on the surface of the solder layer, the solders cannot be fused together, so the base board and the cap can be bonded by applying pressure to break the oxide film on the surface of the solder layer and release the underlying solder. Do this while exposing the layers. However, even if the bonding is performed by applying pressure as described above, the solder layer under the oxide film cannot be completely exposed, so that there are portions where the solder layers cannot be fused together. That is, there is a portion of the base substrate and the cap that is not bonded to the portion that should be bonded.

Then, there was a problem in that nitrogen in the cavity expanded due to humidity during sealing was blown out through the unbonded portion, and outside air instead entered the cavity.

An object of the present invention is to provide a technique that can improve the reliability of a semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in a semiconductor device in which a base substrate of a chip carrier on which a semiconductor chip is mounted via bump electrodes and a cap of the chip carrier are bonded with an adhesive sealing material to seal the semiconductor chip, the adhesive sealing The material is Au
and Sn.

[Effect]

By the above-mentioned means, an oxide film is difficult to form on the surface of the adhesive sealing material made of Au and Sn, so the base substrate and the cap are well sealed to prevent outside air from entering the inside of the cavity. You can do it like this. Thereby, the reliability of the semiconductor device can be improved.

[Embodiments of the invention]

A semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of an adhesive sealing portion of the semiconductor device shown in FIG.

In FIG. 1, 1 is a semiconductor chip made of single crystal silicon, 2 is a bump electrode of the semiconductor chip 1, 3 is a base substrate of a chip carrier, 4 is a cap of the chip carrier,
5 is a brazing material for bonding the back surface of the semiconductor chip 1 to the cap 4, and 8 is a bump electrode on the base substrate 3. A space surrounded by the base substrate 3 and the cap 4 is a cavity. 100 is an adhesive sealing material for adhesively sealing a predetermined portion of the base substrate 3 and a predetermined portion of the cap 4. 6 is a ceramic substrate of the multi-chip module, 7 is a lead pin of the ceramic substrate 6, 9 is a heat radiator, 10 is a heat radiation block, and 11 is cooling water flowing through the water channel of the heat radiation block 10.

The adhesive sealing material 100 of this example is made of gold (Au) and tin (S1
1). The content of Sn is.

For example, it is 20 wt%. The melting point of the adhesive sealing material 100 containing about 20 wt% of tin is about 280°C.

As shown in FIG. 2, the adhesive sealing material 100 is formed by forming parts on the base substrate 3 and the cap 4, respectively, which are fused together during adhesive sealing. A tungsten (W) film or a titanium (Ti) film 101 and a nickel (Ni) film 102 are used as underlying metal layers in the parts of the base substrate 3 and the cap 4 where the adhesive sealing material 100 is provided.
, gold (Au) films 103 are provided in a stacked manner. These W film 101, Ni film 102, and Au film 103 are formed by plating.

The adhesive sealing material 100 made of an alloy of Au and Sn is temporarily attached to the base metal layer in advance.
Since it is not easily oxidized, there is no problem with the formation of a natural oxide film on the surface, which causes poor adhesion, as in the case of solder. Therefore, during adhesive sealing, the adhesive sealing material 100 is well fused in all the areas where the base substrate 3 and the cap 4 are bonded. Although the thickness α of the portion of the cap 4 that is bonded to the base substrate 3 is very thin, approximately 0.5 mm, the cavity can be sealed by sealing with the adhesive sealing material 100 made of an alloy of Au and Sn. The semiconductor chip 1 can be reliably sealed without creating a through hole that connects the semiconductor chip 1 and the outside. The base substrate 3 and the cap 4
Adhesive sealing is performed in a nitrogen atmosphere.

The bump electrodes of the semiconductor chip 1 contain 3 to 4 wt of Sn.
% of solder, and its melting point is about 310°C. The brazing material 5 has the same Sn as the adhesive sealing material 100.
An alloy film of Au and Sn containing 0 wt% may also be used.
Solder whose melting point is the same as that of the adhesive sealing material 100 by changing the content may also be used.

The bump electrode 8 is made of Sn-based solder containing about 3.5 wt% of A and has a melting point of about 220°C. The base substrate 3 is made of, for example, mullite (3AA2o, 2S i
It consists of O,). The cap 4 is made of, for example, aluminide (AfiN) or silicon carbide (S).
It consists of iC).

Next, the sealing process of the semiconductor chip 1 will be explained.

3 and 4 are diagrams for explaining the sealing process of the semiconductor chip 1. FIG.

When sealing the semiconductor chip 1, a W film or a Ti film as shown in FIG. 2 is applied to the base substrate 3 and cap 4 in advance.
Membrane 101. Ni film 102. An Au film 103 is formed in advance. Next, the bump electrodes 2 of the semiconductor chip 1 are melted and connected to electrodes (not shown) of the base substrate 3. Next, as shown in FIG.

A film of brazing material 5 is formed on a portion of cap 4 to which semiconductor chip 1 is to be brazed, and a film of adhesive sealing material 100 is formed on predetermined portions of base substrate 3 and cap 4. Next, by applying predetermined heat and pressure, the base substrate 3 and the cap 4 are
and the back surface of the cap 4 to seal the semiconductor chip 1.

Note that the base substrate 3 and the cap 4 were adhesively sealed by forming a film of the adhesive sealing material 100 on the base substrate 3 and the cap 4 separately, and then fusing them together for sealing. Instead, a foil of Au and Sn is interposed between the adhesive sealing portion of the base substrate 3 and the cap 4, and a predetermined amount of heat is applied to the foil to melt it, thereby performing the adhesive sealing of the base substrate 3 and the cap 4. You may also do so.

As described above, according to the semiconductor device of the present embodiment, the base substrate 3 of the chip carrier on which the semiconductor chip 1 is mounted via the bump electrodes 2 and the cap 4 of the chip carrier are bonded with an adhesive sealant. In the semiconductor device in which the semiconductor chip is sealed by adhering the semiconductor chip with the sealing adhesive 100, since the adhesive sealing material 100 is made of an alloy of Au and Sn, it is difficult to form an oxide film on the surface of the sealing adhesive 100, and the bonding is always maintained. Since the surface of the sealing material 1°O is easily exposed, the base substrate 3 and the cap 4 can be well sealed to prevent outside air from entering the inside of the cavity. This results in
Since the bump electrodes 2 are prevented from being corroded by moisture and metal ions are not introduced into the semiconductor chip 1, the reliability of the semiconductor device can be improved.

The present invention has been specifically described above based on examples.
It goes without saying that the present invention is not limited to the embodiments described above, and can be modified in various ways without departing from the spirit thereof.

For example, the cap 4 may be a metal cap formed by drawing. Since the cap 4 made of metal is cheaper than the cap 4 made of AQN, the cost of the semiconductor device can be reduced.

Furthermore, when using the cap 4 made of metal,
As shown in FIG. 5, since the adhesive sealing material 100 made of an alloy of Au and Sn has excellent wettability, the cross-sectional shape of the adhesive sealing portion can be made into a meniscus shape.

FIG. 5 is a sectional view of a semiconductor device of another embodiment different from the semiconductor device of the embodiment of the present invention shown in FIGS. 1 to 4.

Furthermore, in any of the semiconductor devices shown in FIGS. 1 to 4 and 5, the inside of the cavity may be filled with silicone gel.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

Since an oxide film is difficult to form on the surface of the sealing adhesive made of Au and Sn, the base substrate and the cap can be well sealed to prevent outside air from entering the cavity.

Thereby, the reliability of the semiconductor device can be improved.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of a portion of the adhesive sealing material of the semiconductor device shown in FIG. 3 and 4 are diagrams for explaining the sealing process of the semiconductor chip 1, and FIG. 5 is a diagram showing a semiconductor device according to an embodiment of the present invention shown in FIGS. 1 to 4. FIG. 7 is a cross-sectional view of a semiconductor device according to another embodiment. In the figure, 1...semiconductor chip, 2, 8... bump electrodes. 3... Base board, 4... Cap, 5... Brazing material, 6... Ceramic board, 7... Lead pin, 9
...heat sink. 10... Heat dissipation block, 11... Cooling water.

Claims (1)

[Claims] 1. A semiconductor device in which a base substrate of a chip carrier on which a semiconductor chip is mounted via bump electrodes and a cap of the chip carrier are bonded with an adhesive sealant to seal the semiconductor chip. In the adhesive sealing material, gold (Au) is used.
A semiconductor device comprising an alloy of and tin (Sn). 2. The adhesive sealing material has a tin (Sn) content of 20wt.
% of the semiconductor device according to claim 1.