JPH02285444A - Storage - Google Patents

Abstract

PURPOSE:To restore the intermittent faults by deciding whether the read data given from a storage means is intermittent or fixed when the read data has a correctable fault and then rewriting the read data into the correct one when an intermittent fault is decided. CONSTITUTION:An error detection/correction means 2 checks whether the read data received from a storage means 1 has a fault or not and corrects a correctable fault if detected. Then the means 2 outputs the corrected read data 13 to a processor. At the same time, a correction display panel 14 is outputted to show that the fault is corrected. The signal 14 is inputted to a 2nd register means 6 and the output of a 1st register means 5 is set to the register 6. A 1st selection means 3 outputs the same contents as the data 13 and inputs them to the means 1 with the control signal of a control means 8. Under such conditions, the data 13 is written into the means 1 with execution of a writing operation. Thus the intermittent faults can be restored.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a technology for determining faults in storage devices, and in particular, it is determined whether the fault in the storage means is fixed or intermittent, and if the fault is intermittent, it is determined that the fault is correct. The present invention relates to a storage device that has a function of writing back the state.

[Conventional technology]

Conventionally, this type of storage device adds an error correction detection code to data and writes it in a storage means, and inputs the data read from the storage means to an error correction detection means, thereby detecting whether the read data can be corrected. If there was a problem, the data would be corrected and output.

[Problem to be solved by the invention]

The conventional storage device described above performs error correction and outputs correct data even if there is a correctable fault in the read data, but if there is a fault in the data itself written to the storage means. Even if the address is read out again, if there is no writing to that address, the error will be detected again and correction will be performed. in this way,
- If a failure occurs and the read operation is repeated,
Every time a faulty location is read, error correction is performed and correct data is output. However, if the read operation continues for a long time on the storage means, there is a problem that if a fault occurs in other parts of the same data during that time, the fault will become uncorrectable.

[Rounding method to solve the problem]

In order to solve such problems, the storage device of the present invention includes a storage means for storing data, an error detection and correction means connected to the read data of the cough storage means, and a storage device for storing the data written from the processor and the error detection means. first selection means for selecting the output of the error detection and correction means; first register means for outputting an address to the storage means; a second register means that is controlled by the processor, a second selection means that switches between the address information from the processor and the output of the second register means, and a third selection means that holds the correction display output of the error detection and correction means. The device has register means, and control means for controlling the six first selection means, second selection means, and third register means.

[Effect]

Therefore, according to the present invention, when there is a correctable failure in the data read from the storage means, it is determined whether the data is intermittent or fixed, and in the case of an intermittent failure, the You can rewrite the data to be correct.

〔Example〕

Hereinafter, the present invention will be explained with reference to the drawings.

The figure is a functional block diagram showing an embodiment of a storage device according to the present invention. In the figure, reference numeral 1 denotes a storage means for storing data, and this storage means 1 is connected to the output of the first selection means 3 and the output of the first register means 5, and the read data from the storage means 1 is connected to the output of the first selection means 3 and the output of the first register means 5. It is connected to the error detection and correction means 2. An output of this error detection and correction means 2 is connected to a first selection means 3, and another output is connected to a second register means 6 and a third register means 7.

Further, the twentieth selection means 4 is connected to the output of the second register means 6, the address signal 11 and the output of the control means 8, respectively, and the selected output thereof is connected to the first register means 5. Further, this first register means 5
are connected to the second register means 6 in addition to the storage means 1, and the output of the control means 8 is connected to the first selection means 3. It is connected to the second selection means 4 and the third register means T.

Next, the operation of the configuration of the above embodiment will be explained.

First, in the case of a write operation, write data 10, which is write data sent from a processor (not shown) with a correction code bit added thereto, and an address signal 11 are sent to the first selection means 3. When outputted as the output of the second selection means 4, this address information expansion is held in the first register means 5, and is also input to the storage means 1 and the first
The contents of the selection Chitose 3 are written.

In the case of a read operation, when the address signal 11 is sent from the processor and inputted to the storage means 1 via the second selection means 4, the information of the corresponding address is read from the storage means 1, and error detection and correction is performed. It is input to hand R2.

Here, the error detection and correction means 2 checks whether or not there is a fault in the read data from the storage means 1, and if the fault is correctable, it is corrected and outputs corrected read data 13 to the processor. At this time, a correction display signal 14 indicating that the correction has been made is output. This correction display signal 14 is input to the second register means 6, and the first register means 5
The output of is set in the second register means 6. That is, the second register means 6 holds address information for which error correction has been performed. The correction indication signal 14 is also sent to a diagnostic processor (not shown). When this diagnostic processor receives the correction display signal 14 and outputs the control signal 12, the control means 8 to which this control signal 12 is input outputs the signal to the second selection means 4. outputs the contents of the second register means 6. Therefore, the contents of this second register means 6 are held in the first register means 5.

Therefore, the correctable fault is read out again from the storage means 1, and the corrected read data 13 is outputted from the error detection and correction means 2 and input to the first selection means 3. Then, in response to a control signal from the control means 8, the first selection means 3 outputs the same content as the corrected read data 13 and inputs it into the storage means 1. When writing is executed here, the corrected read data is written into the storage means 1.

If reading is executed again here, if the corrected data has been written, the correction display signal 14, which is the output of the error detection and correction means 2, will not be output, so that it can be seen that the recovery from the failure has been successful. On the other hand, if the correction display signal 14 is output, it can be seen that the failure recovery was unsuccessful. This correction display signal is input to the third register means γ and is set by the control means 8. Therefore, the third register means γ
If the intermittent/fixed judgment signal 15 output from is "1",
It can be seen that the failure recovery was unsuccessful, that is, the failure was fixed. Therefore, it is easy to see whether a correctable failure that has occurred in the storage means 1 requires immediate repair or whether there is no problem in continuing to use it, and if the failure is successfully recovered, what will happen? No repairs are required.

〔Effect of the invention〕

As explained above, in the present invention, when a correctable failure occurs in the storage means, the failure can be recovered by rewriting the read corrected data to the storage means, if it is an intermittent failure, In addition, it is possible to eliminate the need for repair, and it is also possible to know that if there is a fixed failure, it is necessary to promptly repair or disconnect it.

[Brief explanation of drawings]

The figure is a functional block diagram showing an embodiment of the storage device of the present invention. 1-Φ - storage means, 2... error detection and correction means,
3...$1 selection means, 4 fist...second selection means, 5...first register means, 6...second register means, 7φ...third register means, 8・ee
-Control means, 10--Write data, 11@-So address signal, 12...-Control signal, 13...-e Corrected read data, 1411 Correction display signal, 151--
Intermittent/fixed judgment signal.

Claims (1)

[Claims] In a storage device, a first selection for selecting a storage means for storing data, an error detection and correction means connected to read data from the storage means, write data from a processor, and an output of the error detection and correction means. means; first register means for outputting an address to the storage means;
a second register means connected to the first register means and controlled by the output of the error detection and correction means; and a second selection means for switching between address information from the processor and the output of the second register means. and a third register means for holding the correction display output of the error detection and correction means, and each of the first selection means, the second selection means and the third register means.
control means for controlling the register means of the storage means, and when there is a correctable fault in the data read from the storage means, determines whether the data is intermittent or fixed, and determines whether the data is correct in the case of an intermittent fault. A storage device characterized by being rewritten as data.