JPH02285659A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a cavity in a metallic wiring layer inside a through hole from being made by an organic gas produced from a flattening film by a method wherein the flattening film including the parts thereof exposed to the sidewalls of the through hole is covered with an interlayer insulating film. CONSTITUTION:Within the title semiconductor device provided with a flattening film 9 formed of an insulating material containing an organic solvent as well as a conductor wiring 13 formed in a through hole 12 formed as if penetrating an interlayer insulating film 10 formed on the flattening film 19, the flattening film 9 including the parts thereof exposed to sidewalls of the through hole 15 is to be covered with the interlayer insulating film 10. For example, a lower insulating film 3, a lower wiring 5 and an interlayer insulating film 8 are formed on a substrate 2 wherein an element 1 is formed and then spin-on-glass 9 is coated on the film 8. Next, the first through hole 15 in almost the same width as that of the lower layer wiring 5 is formed and then the interlayer insulating film 10 is formed on the spin-on-glass 9 and the first through hole 15. Finally, after forming the second through hole 16 smaller than the first through hole 15, the upper layer wiring 13 comprising an aluminum layer is formed.

Description

[Detailed Description of the Invention] [Summary] Regarding a semiconductor device in which multiple metal wiring layers such as aluminum or aluminum alloy are formed on a substrate on which a semiconductor element is formed, through-holes are formed by organic gas generated from a planarization film. In order to prevent the formation of cavities in metal wiring layers, through-holes are formed to penetrate through a flattening film formed using an insulating material containing an organic solvent and an interlayer insulating film formed on top of the flattening film. A semiconductor device in which conductor wiring is formed, and the planarization film exposed on the side wall of a through hole is covered with the interlayer insulating film.

[Industrial Application Field] The present invention relates to a semiconductor device in which multiple metal wiring layers such as aluminum or aluminum alloy are formed on a substrate on which a semiconductor element is formed.

2. Description of the Related Art As semiconductor devices have become highly integrated in recent years, a large number of metal wiring layers such as aluminum are sometimes formed on semiconductor elements formed on a substrate with interlayer insulating films interposed therebetween. This metal wiring layer is then connected through a through hole formed at a predetermined position in the glabellar insulating film.

In order to form this metal wiring layer on the interlayer insulating film in a stable state, it is necessary to flatten the surface of the insulating film between the eyebrows, but the interlayer insulating film on the aluminum wiring, which has a low melting point, requires high heat to flatten it. In addition, it cannot be melted, so 5i02
A low-viscosity spin-on glass formed by dissolving an insulator such as the above in an organic solvent is applied onto an interlayer insulating film, and then heated at a low temperature and dried to flatten it.

[Prior Art] A conventional multilayer wiring formation process will be explained with reference to FIG.
A lower insulating layer wA3 made of an S02 film is first formed on the substrate 2 on which the element 1 is formed, and a large number of contact holes 4 are formed at predetermined positions in the lower insulating film 3 by photo-etching. Then, as shown in FIG. 3(b), a lower layer wiring 5 is formed to connect the contact holes 4.

Note that the lower layer wiring 5 is approximately 700 to 10
In FIG. 3(b), the protrusion extends in a direction perpendicular to the plane of the paper and protrudes upward from the surface of the lower insulating film 3.

Next, as shown in FIG. 3(c), a glabellar insulation film 8 is formed on the substrate 2, and a spin-on glass 9 or an interlayer insulation film 8 is used as a flattening film to flatten the step of the interlayer insulation film 8 caused by the lower wiring 5. 8, and an interlayer insulating film 10 is further formed thereon.

Then, as shown in FIG. 3(d), a photoresist film 11 is coated on the interlayer insulating film 10 and patterned, for example, so that the contact l-pole 4 is opened, and the photoresist film 11 is used as a mask. Glabella insulating film 8,1
0, the spin-on glass 9 and the titanium nitride layer 7 are etched to 741 to form a through hole 12.

Next, after removing the photoresist 11, as shown in FIG.
), an upper layer wiring 13 of an aluminum layer is patterned on the interlayer insulating film 10 and the through hole 12 in a direction perpendicular to the lower layer wiring 5, for example. Therefore, through such a process, the upper layer wiring 13 is formed with a stable thickness on the flat interlayer insulating film 10 and is connected to the lower layer wiring 5 through the through hole 12.

[Problem to be Solved by the Invention] However, in the multilayer wiring as described above, CH3CH4, etc. are Organic gas is generated, and the organic gas enters the through hole 12 from the end face of the spin-on class 9 exposed on the side wall of the through hole 12 and is confined within the aluminum layer, forming a cavity 14.This cavity 14 is formed in the upper layer. The contact resistance between the wiring tl! 13 and the lower layer wiring 5 may be increased, or both wirings 5, 13 may be
There was a problem in that the conduction of the wires could be completely cut off. An object of the present invention is to provide a semiconductor device that can prevent the formation of cavities in through holes due to organic gas generated from a planarizing film.

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. That is, the through hole 12 is formed so as to pass through the interlayer insulating film 10 and the planarizing film 9 containing an organic solvent, and the side wall of the through pole 12 is covered with the glabella insulating film 10, so that the through hole 12 13 metal forests are formed within the area.

[Function] Since the side walls of the through hole 12 are covered with the interlayer insulating film 10, organic gas generated from the planarization film 9 is prevented from entering the through hole 12.

[Example 1] An example embodying the present invention will be described below with reference to FIG. Note that the same components as those in the conventional example will be described with the same numbers.

As shown in FIG. 2(a), a substrate 2 on which an element 1 is formed
A lower insulating film 3 is formed thereon, and a lower wiring 5 is formed over the contact hole 4 formed in the lower insulating film 3. Next, as shown in FIG. 2(b), a glabellar insulating film 8 is formed over the entire surface of the substrate 2, and a spin-on glass 9 is applied as an upper layer. The steps up to this point are the same as those of the conventional example.

Next, as shown in FIG. 2(C), spin-on glass 9
and the interlayer insulating film 8 are simultaneously opened by photoetching to form a first through pole 15 having a diameter approximately equal to the width of the lower wiring 5, and after removing the photoresist, a first through ball 15 is formed on the spin-on class 9 and the first through ball 15. Figure 2 (d
), an interlayer insulating film 10 is formed.

Then, as shown in FIG. 2(e), a second through hole 16 passing through the interlayer insulating film 10 and the titanium nitride film 7 is formed by photoetching.

Note that the diameter of the second through hole 16 is made smaller than the diameter of the first through hole 15.

Next, after removing the photoresist film, FIG. 2(f)
As shown in FIG.
An upper layer wiring 13 of the aluminum layer is patterned on the aluminum layer 6 . Therefore, through such a process, the upper layer wiring 13 is formed with a stable film thickness on the flat glabellar insulating film 10, and is connected to the lower layer wiring 5 through the second through hole 16.

In the multilayer wiring formed by such a process, the spin-on class 9 layer exposed on the side wall of the first through hole 15 is
Since the end face of is covered with the interlayer insulating film 10 and is not exposed to the side wall of the second through hole 16, a cavity is formed in the second through hole 16 due to organic scum from spin-on class 9 generated during sputtering of the upper layer wiring 13. Is it possible to prevent this? Therefore, the upper layer wiring 13 and the lower layer wiring 5 can be reliably connected through the second through hole 16.

[Effects of the Invention] As detailed above, the present invention exhibits an excellent effect of preventing the formation of cavities in the wiring film due to organic scum generated from the planarization film.

[Brief explanation of drawings]

Figure 1 is an explanatory diagram of the principle of this invention, Figure 2 (a) to (1000)
3 is a manufacturing process diagram for forming a multilayer wiring structure embodying the present invention, and FIGS. 3(a) to 3(8) are manufacturing process diagrams for forming a conventional multilayer wiring structure.

Claims (1)

[Claims] 1. A conductor wiring (13) is formed in a through hole (12) formed to penetrate a flattening film (9) formed using an insulating material containing an organic solvent and an interlayer insulating film (10) formed thereon. ), wherein the planarizing film (9), including the planarizing film (9) exposed on the side wall of the through hole (12), is covered with the interlayer insulating film (10).