JPH02287172A - Testing method - Google Patents

Testing method

Info

Publication number
JPH02287172A
JPH02287172A JP1108242A JP10824289A JPH02287172A JP H02287172 A JPH02287172 A JP H02287172A JP 1108242 A JP1108242 A JP 1108242A JP 10824289 A JP10824289 A JP 10824289A JP H02287172 A JPH02287172 A JP H02287172A
Authority
JP
Japan
Prior art keywords
test
defective
test items
items
order
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1108242A
Other languages
Japanese (ja)
Inventor
Takashi Yagi
孝志 八木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP1108242A priority Critical patent/JPH02287172A/en
Publication of JPH02287172A publication Critical patent/JPH02287172A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

PURPOSE:To shorten a testing time required for a decision of the normal/ defective state by setting a sequence of measuring items in order of a high fraction defective and omitting the measurement for test items succeeding after the time when even one of the measuring items is decided as defective. CONSTITUTION:A device to be tested is measured according to many test items and an arrangement of the test items are changed in order of the high fraction defective as the result of test. When a dispersion in the performance of the device to be tested is found, the order is changed. When the decision is made as normal for all of the test items, the device to be tested is decided as normal, and if the decision is made as defective for even one of the test items, the succeeding test items are omitted after that time, then the device to be tested is decided as defective. A provability deciding the defect at the earlier order time of the test items is thereby made to be high, and the testing time required for the decision of normal/defective state can be reduced.

Description

【発明の詳細な説明】 五粟上度村且分立 本発明は試験方法に関し、特に試験時間を短縮した試験
方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a test method, and more particularly to a test method that shortens the test time.

従速J口幻1 電子部品などは一つの素子に多数の試験項目が設定され
、多数の試験項目に従って測定され良否が連続的に判定
される。
Speed-following J-port illusion 1 For electronic components, a single element is subjected to a large number of test items, and is measured according to the large number of test items to continuously judge whether it is good or bad.

この試験方法の一例を第2図フローチャートから説明す
る。
An example of this test method will be explained with reference to the flowchart in FIG.

この図においてTe5tl、 Te5t2. a旧e4
estnはそれぞれの試験項目を表しており、n個の試
験項目が全てGo判定の時、その試験において「良」と
判定され、n個の試験項目中、一つでもNG判定であれ
ばそれ以降の試験項目は実施されず、その試験において
「不良」と判定される。
In this figure, Te5tl, Te5t2. a old e4
estn represents each test item, and when all n test items are judged as Go, the test is judged as "good", and if even one of the n test items is judged as NG, the subsequent tests are Test items are not performed and the test is judged to be "poor".

ロ   (L      ″         ;上記
の試験方法の場合、良否の判定に費やす試験時間は試験
項目の試験時間をそれぞれTl、T2、・・・・・・T
nとすると、ΣTiで表される。但しi−凰 nはその時試験される試験項目数である。しかしたまた
まNG判定される試験項目が遅い順位に位置している時
は、それまでにGo判定された試験項目に費やされた試
験時間は全て無駄となる。
(L''; In the case of the above test method, the test time spent on pass/fail judgment is Tl, T2,...T
When n is expressed as ΣTi. However, i-凰n is the number of test items to be tested at that time. However, if a test item that has been judged as NG happens to be in a late ranking, all the test time that has been spent on the test item that has been judged as Go is wasted.

−、の 本発明は上記課題のかいけつを目的として提案されたも
ので、予め定められた複数の試験項目に従って被験装置
を測定し良否判別する作業を順次実施するに当たって、
上記測定を所定の不良率毎に区分された試験項目順に実
施し、不良判定された測定項目以降の測定を省略し次の
被験装置を測定することを特徴とする試験方法を提供す
る。
- The present invention was proposed with the aim of solving the above problems, and in sequentially carrying out the work of measuring the device under test and determining the quality of the device according to a plurality of predetermined test items,
There is provided a test method characterized in that the above-mentioned measurements are performed in the order of test items classified for each predetermined failure rate, measurements after the measurement item determined to be defective are omitted, and the next device under test is measured.

尖胤阻 以下に本発明の実施例を第1図から説明する。tsunetane hindi An embodiment of the present invention will be described below with reference to FIG.

Te5tl ’ 、 Te5t2 ’ 、 ・・・・・
4estn ’は被験装置を連続測定した結果不良発生
率の高い順序に並び換えられた試験・項目であり、被験
装置の性能のばらつきによりその順序は変更される。第
2図の例と同様、n個の試験項目が全てGO判定のとき
、その試験において「良」き判定され、n個の試験項目
中、一つでもNG判定であればそれ以降の試験項目は実
施されず、その試験において「不良」と判定される。よ
って本発明の場合、「不良」判定は試験項目の早い順位
で成される確率が高くなり、その分良否の判定に費やさ
れる試験時間ΣTiは短縮される。
Te5tl', Te5t2', ...
4estn' are tests/items that are rearranged in order of increasing failure rate as a result of continuous measurement of the device under test, and the order is changed depending on variations in the performance of the device under test. Similar to the example in Figure 2, when all n test items are judged as GO, the test is judged as "good", and if even one of the n test items is judged as NG, subsequent test items is not carried out, and the test is judged to be "poor". Therefore, in the case of the present invention, there is a high probability that a "defective" determination will be made at an early rank of the test item, and the test time ΣTi spent on the pass/fail determination is correspondingly shortened.

1=1 尚、上記実施例では測定項目順序を不良率の大きい順に
設定した場合につき説明したが、本発明は上記実施例に
のみ限定されることなく、不良率を例えば10%きざみ
に区分し、各不良率範囲内で不良率に変動が生じても、
全体の測定項目順序を変更せず、不良率範囲を越える変
動があったときのみ測定項目順序を変えるようにしても
よい。
1=1 In the above embodiment, the case where the order of measurement items is set in descending order of defective rate has been explained, but the present invention is not limited to the above embodiment, and the defective rate may be divided into 10% increments, for example. , even if the defective rate fluctuates within each defective rate range,
Instead of changing the overall order of measurement items, the order of measurement items may be changed only when there is a variation exceeding the defective rate range.

髪叫Δ飲果 以上のように本発明によれば試験時間の短縮が可能とな
る。
As described above, according to the present invention, it is possible to shorten the test time.

【図面の簡単な説明】[Brief explanation of the drawing]

Te5t l ’ 、 Te5t2 ’・旧・・Te5
ty’ ・・・・・・試験項目。 手続補正書(方式) %式% 2、発明の名称 試験方法 3、 補正をする者 事件の関係 特許出願人 〒520滋賀県大津市晴嵐2丁目9番1号関西日本電気
株式会社 5、補正の対象 出願時提出の明細書の「図面の簡単な説明」の欄6、補
正の内容 第4頁第13行乃至第14行の「図面の簡単な説明」と
rTestJの間に、「第1図は本発明による試験方法
を説明するフロー第1図 第2図
Te5tl', Te5t2'・old...Te5
ty'・・・Test item. Written amendment (method) % formula % 2. Invention title test method 3. Relationship with the case of the person making the amendment Patent applicant 2-9-1 Seiran, Otsu City, Shiga Prefecture 520 Kansai NEC Corporation 5. In column 6 of "Brief explanation of drawings" of the specification submitted at the time of filing, between "Brief explanation of drawings" and rTestJ on page 4, lines 13 and 14 of the amendment, "Fig. Figure 1 and Figure 2 are flowcharts explaining the test method according to the present invention.

Claims (2)

【特許請求の範囲】[Claims] (1)予め定められた複数の試験項目に従って被験装置
を測定し良否判別する作業を順次実施するに当たって、
上記測定を所定の不良率毎に区分された試験項目順に実
施し、不良判定された測定項目以降の測定を省略し次の
被験装置を測定することを特徴とする試験方法。
(1) In sequentially carrying out the work of measuring and determining the quality of the device under test according to multiple predetermined test items,
A test method characterized in that the above-mentioned measurements are carried out in the order of test items categorized by a predetermined failure rate, measurements after the measurement item determined to be defective are omitted, and the next device under test is measured.
(2)所定の不良毎に区分された試験項目を不良率が大
きい順に並べ変えて測定を実施することを特徴とする特
許請求の範囲第1項記載の試験方法。
(2) The test method according to claim 1, characterized in that the measurement is carried out by rearranging the test items classified for each predetermined defect in descending order of defect rate.
JP1108242A 1989-04-27 1989-04-27 Testing method Pending JPH02287172A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1108242A JPH02287172A (en) 1989-04-27 1989-04-27 Testing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1108242A JPH02287172A (en) 1989-04-27 1989-04-27 Testing method

Publications (1)

Publication Number Publication Date
JPH02287172A true JPH02287172A (en) 1990-11-27

Family

ID=14479682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1108242A Pending JPH02287172A (en) 1989-04-27 1989-04-27 Testing method

Country Status (1)

Country Link
JP (1) JPH02287172A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102295531B1 (en) * 2021-03-17 2021-09-01 주식회사 유일로보틱스 Take out robot having load cell and for temperature sensor injection molding

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102295531B1 (en) * 2021-03-17 2021-09-01 주식회사 유일로보틱스 Take out robot having load cell and for temperature sensor injection molding

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