JPH0228908B2 - - Google Patents
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- Publication number
- JPH0228908B2 JPH0228908B2 JP57029897A JP2989782A JPH0228908B2 JP H0228908 B2 JPH0228908 B2 JP H0228908B2 JP 57029897 A JP57029897 A JP 57029897A JP 2989782 A JP2989782 A JP 2989782A JP H0228908 B2 JPH0228908 B2 JP H0228908B2
- Authority
- JP
- Japan
- Prior art keywords
- cathode
- resist
- junction
- lower electrode
- frequency plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Description
【発明の詳細な説明】
本発明はジヨセフソン接合の形成方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a Josephson junction.
通常、トンネル型のジヨセフソン接合は第1図
に示すように、基板1上に下部電極2を形成後、
この表面を酸化することによりトンネル障壁とな
る酸化膜3を形成し、そののちに上部全極4を形
成することにより製造される。ここで、酸化膜3
を形成する方法として下部電極2の高周波プラズ
マ酸化法による場合、第2図に示すように基板1
をカソード5に装着して高周波プラズマ酸化用真
空槽6内において放電することにより下部電極表
面を酸化しひきつづいて同一真空槽6内で上部電
極(図示せず)を蒸着する。
Usually, as shown in FIG. 1, in a tunnel type Josephson junction, after forming a lower electrode 2 on a substrate 1,
This surface is oxidized to form an oxide film 3 serving as a tunnel barrier, and then the upper all-poles 4 are formed. Here, oxide film 3
When using a high frequency plasma oxidation method for the lower electrode 2, the substrate 1 is formed as shown in FIG.
is mounted on the cathode 5 and discharged in a vacuum chamber 6 for high frequency plasma oxidation to oxidize the surface of the lower electrode, followed by vapor deposition of an upper electrode (not shown) in the same vacuum chamber 6.
カソード5は上部カソード7と下部カソード8
とから成る。下部電極2を備えた基板1および基
板1上に載置されたアルミ製スペーサ9を収納す
る下部カソード8は取付用ビス10によつて上部
カソード7に取付けられる。 The cathode 5 is an upper cathode 7 and a lower cathode 8
It consists of A lower cathode 8 accommodating a substrate 1 having a lower electrode 2 and an aluminum spacer 9 placed on the substrate 1 is attached to the upper cathode 7 with mounting screws 10 .
高周波プラズマ酸化用真空槽6はゲートバルブ
11を介して電子ビーム蒸着機構を具備する蒸着
用真空槽12に接続しており、上記酸化用真空槽
6および蒸着用真空槽12にはそれぞれ図示しな
い排気ポンプが取付けられている。 The high-frequency plasma oxidation vacuum chamber 6 is connected via a gate valve 11 to an evaporation vacuum chamber 12 equipped with an electron beam evaporation mechanism. Pump is installed.
ゲートバルブ11は高周波プラズマ酸化時に閉
ざされるが上部電極形成時には開かれる。なお、
第2図において13は高周波電源を、14は下部
電極2の一部を被覆するレジストをそれぞれ示
す。高周波プラズマ酸化法は、酸素プラズマによ
る酸化の酸素イオンによる逆スパツタが同時に進
行することが知られている。このような逆スパツ
タ効果は試料ウエハ上の酸化膜を形成すべき下部
電極表面ばかりでなく試料ウエハを装着している
カソード表面にも作用する。J.M.Baker他IBM.
J.RES.DEVELOP.24巻223頁(1980)に示される
ように表面に鉛合金が付着しているカソードを用
いて高周波プラズマ酸化すると、接合酸化膜上
に、カソード表面から逆スパツタされたトンネル
バリアの高い酸化鉛が付着し、接合の電流密度が
低下することが知られている。R.F Broom他
IBM.J.RES.DEVELOP 24巻206頁(1980)に示
されるようにこのようなトンネルバリヤの高い逆
スパツタ物質は、接合の電流密度の高い接合を
形成しようとすると酸化膜を非常に薄くする必要
があり、従つて、接合のリーク電流が増加すると
いう問題が存在した。従来、電流密度の減少を防
ぐためには、カソード表面にInを蒸着し接合酸化
膜上に付着する物質をトンネルバリアの低い
In2O3とする方法がとられてきた。 The gate valve 11 is closed during high frequency plasma oxidation, but is opened during formation of the upper electrode. In addition,
In FIG. 2, reference numeral 13 indicates a high frequency power source, and reference numeral 14 indicates a resist covering a part of the lower electrode 2. It is known that in the high frequency plasma oxidation method, oxidation caused by oxygen plasma and reverse spatter caused by oxygen ions proceed simultaneously. Such a reverse sputter effect acts not only on the surface of the lower electrode on which the oxide film is to be formed on the sample wafer, but also on the surface of the cathode on which the sample wafer is mounted. JMBaker and othersIBM.
As shown in J.RES.DEVELOP. Vol. 24, p. 223 (1980), when high-frequency plasma oxidation is performed using a cathode with a lead alloy attached to its surface, tunnels are formed on the junction oxide film by reverse sputtering from the cathode surface. It is known that lead oxide, which has a high barrier, adheres and reduces the current density of the junction. RF Broom et al.
As shown in IBM.J.RES.DEVELOP Vol. 24, p. 206 (1980), such reverse sputtering materials with a high tunnel barrier make the oxide film very thin when attempting to form a junction with a high current density. Therefore, there was a problem of increased junction leakage current. Conventionally, in order to prevent a decrease in current density, In was evaporated on the cathode surface and the material that adhered to the junction oxide film was reduced to a material with a low tunnel barrier.
A method of using In 2 O 3 has been used.
しかし、カソード表面にInを蒸着する方法で
は、接合を形成するために上部電極鉛合金を蒸着
するとカソード表面においてInと鉛合金が反応し
て合金化してしまうため、形成された接合を有す
る基板をカソードから取り出した後、別を基板を
カソードに取付けて接合を形成する場合いつたん
カソード表面の鉛−Inの合金を酸等で除去した後
に、新たにInを蒸着したカソードを用いる必要が
あつた。したがつて工程が複雑となり時間がかか
る欠点があつた。 However, in the method of vapor-depositing In on the cathode surface, when the upper electrode lead alloy is vapor-deposited to form a bond, the In and lead alloy react on the cathode surface and form an alloy. When attaching another substrate to the cathode after taking it out from the cathode to form a bond, it was necessary to remove the lead-In alloy on the cathode surface with acid, etc., and then use a cathode with newly vapor-deposited In. . Therefore, there was a drawback that the process was complicated and time consuming.
本発明は複雑な工程を採用することなく、接合
の電流密度のばらつきを低減させ、そして接合の
リーク電流を減少させることのできるジヨセフソ
ン接合の形成方法を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a Josephson junction that can reduce variations in current density in a junction and reduce leakage current in the junction without employing complicated steps.
本発明のジヨセフソン接合の形成方法は表面が
有機レジストで被覆されたカソードを用いて下部
電極の表面を高周波プラズマ酸化することにより
トンネル障壁となる酸化膜を形成することを特徴
とする。
The method for forming a Josephson junction of the present invention is characterized by forming an oxide film serving as a tunnel barrier by subjecting the surface of the lower electrode to high-frequency plasma oxidation using a cathode whose surface is coated with an organic resist.
以下図面を参照して本発明の一実施例を詳細に
説明する。本実施例により得られるトンネル型の
ジヨセフソン接合は第1図を用いて従来技術で説
明したと同様にして製造される。又、下部電極の
表面を酸化することによりトンネル障壁となる酸
化膜は第2図を用いて従来技術で説明したと同様
に下部電極の高周波プラズマ酸化法により形成さ
れる。ここで、接合を形成するために、下部電極
材料としてPd84、In12、Au4、wt%の合金を用
い、酸素圧力1×10-2Torr、30W、10分の高周
波プラズマ酸化に先だつて、Ar圧力5×10-3
Torr、100W、3分の条件で下部電極表面をスパ
ツタクリーニングした。上部電極はPd71、Bi29、
wt%の合金をPd、Biの順に積層蒸着して形成し
た。酸化条件を上記の条件に固定し、第3図に示
すように表面にPd71、Bi29、wt%合金が蒸着さ
れたカソードを用いた従来の場合の実験例1;第
4図に示すように表面にAZ1470のレジストが2μ
m厚に被覆されたカソードを用いた本発明の場合
の実験例2;第5図に示すように一度上記実験例
(2)のカソードを用いて接合を形成した後、付着し
たPd71、Bi29、wt%合金上に新たに2μm厚の
AZ1470レジストを被覆して成るカソードを用い
た本発明の場合の実験例3;第4図に示すように
一度実験例2のカソードを用いて接合を形成した
後付着したPd71、Bi29、wt%合金を、酢酸60、
水139、過酸化水素1よりなるエツチング液で除
去し、第4図と同じ形状に復帰したカソードにウ
エハをセツトして接合を形成した本発明の場合の
実験例4、のそれぞれの接合特性を比較して、次
の2つの結果が得られる。
An embodiment of the present invention will be described in detail below with reference to the drawings. The tunnel-type Josephson junction obtained in this embodiment is manufactured in the same manner as described in the prior art with reference to FIG. Further, an oxide film which becomes a tunnel barrier by oxidizing the surface of the lower electrode is formed by high frequency plasma oxidation of the lower electrode in the same manner as described in the prior art with reference to FIG. Here, to form a bond, an alloy of Pd84, In12, Au4, wt% was used as the lower electrode material, and prior to high-frequency plasma oxidation at an oxygen pressure of 1 × 10 -2 Torr, 30 W, and 10 minutes, Ar pressure was applied. 5×10 -3
The surface of the lower electrode was spatter cleaned under the conditions of Torr, 100W, and 3 minutes. The upper electrode is Pd71, Bi29,
wt% alloy was deposited in the order of Pd and Bi. Experimental example 1 in the conventional case where the oxidation conditions were fixed to the above conditions and a cathode with Pd71, Bi29, wt% alloy deposited on the surface as shown in Figure 3; AZ1470 resist is 2μ
Experimental example 2 in the case of the present invention using a cathode coated with m thickness;
After forming a bond using the cathode in (2), a new 2 μm thick layer was added on the attached Pd71, Bi29, wt% alloy.
Experimental example 3 in the case of the present invention using a cathode coated with AZ1470 resist; As shown in FIG. , acetic acid 60,
The bonding characteristics of Experimental Example 4 in the case of the present invention in which a bond was formed by setting a wafer on the cathode which had been removed with an etching solution consisting of 139 parts of water and 1 part of hydrogen peroxide and returned to the same shape as shown in FIG. The comparison yields the following two results.
なお、第3図〜第5図において、5はカソード
を、15はレジストを、そして16は上部電極形
成時に付着したPd−Bi合金をそれぞれ示す。 In FIGS. 3 to 5, 5 indicates a cathode, 15 indicates a resist, and 16 indicates a Pd-Bi alloy deposited during formation of the upper electrode.
(i) 接合の電流密度は、実験例1の場合、
500A/cm2であるの対し実験例2、3、4で示
される本発明の方法ではいずれも2kA/cm2と大
きくなつた。(i) The current density of the junction is, in the case of Experimental Example 1,
While it was 500 A/cm 2 , in the methods of the present invention shown in Experimental Examples 2, 3, and 4, it was as large as 2 kA/cm 2 .
(ii) 接合の電流密度のばらつきは、実験例1の場
合±15%であるのに対し、実験例2、3、4で
示される本発明の方法ではいずれも±10%に小
さくなつた。(ii) While the variation in current density of the junction was ±15% in Experimental Example 1, it was reduced to ±10% in all of the methods of the present invention shown in Experimental Examples 2, 3, and 4.
接合のリーク電流は電流密度に比例して大きく
なることが知られている。したがつて次に同じ電
流密度の接合のリーク電流を比較するため、上記
実験例1の場合に高周波プラズマ酸化時電力のみ
を22Wと変えて、電流密度2kA/cm2の実験例5の
接合を作成した。 It is known that junction leakage current increases in proportion to current density. Therefore, in order to compare the leakage currents of junctions with the same current density, we changed only the power during high-frequency plasma oxidation to 22W in the case of Experimental Example 1 above, and compared the junction of Experimental Example 5 with a current density of 2kA/ cm2 . Created.
ジヨセフソン接合の電流電圧特性は第6図に示
すように、常伝導領域(A)における抵抗値RNN(4
mVで定義)と、サブギヤツプ領域Bにおける抵
抗値RSG(2mVで定義)によつて特徴づけられ
る。接合のリーク電流は、RSG/RNNの比によつ
て評価され、RSG/RNN値が大きいほど、リーク
電流が小さく、接合は高品質であるといえる。第
6図において2,3,4は上記実験例2、3、4
を示し、5は実験例5を示す。2、3、4と同じ
RNN値を持つ5を比較すと、5はサブギヤツプ領
域(B)における抵抗値が2,3,4の比較して小さ
く、従つて、RSG/RNN比は2,3,4の12に対
して8と小さいことが確認された。 As shown in Figure 6, the current-voltage characteristics of the Josephson junction are as follows: resistance value R NN (4
(defined in mV) and the resistance value R SG (defined in 2 mV) in the sub-gap region B. The leakage current of a junction is evaluated by the ratio of R SG /R NN , and it can be said that the larger the R SG /R NN value is, the smaller the leakage current is, and the higher the quality of the junction. In Fig. 6, 2, 3, and 4 are the above experimental examples 2, 3, and 4.
5 indicates Experimental Example 5. Same as 2, 3, 4
Comparing 5 with the R NN value, 5 has a smaller resistance value in the sub-gap region (B) than 2, 3, and 4. Therefore, the R SG /R NN ratio is 12 of 2, 3, and 4. It was confirmed that it was as small as 8.
なお、カソード表面にレジスト被覆する工程、
外部電極形成後に新たにカソード表面に新しいレ
ジストを被覆する工程、又はカソード表面のレジ
ストを再露出させる工程において外部電極形成後
の基板取り出し時にカソードを高周波プラズマ酸
化用真空槽から取り出し、この真空槽外で新たに
2μm厚のAZ1470レジストをスプレー法又はスピ
ンコート法等で吹きつけ例えば90℃のベーク炉中
で15分加熱してもよい。 Note that the step of coating the cathode surface with resist,
In the step of newly coating the cathode surface with a new resist after forming the external electrode, or in the step of re-exposing the resist on the cathode surface, the cathode is removed from the vacuum chamber for high-frequency plasma oxidation when the substrate is removed after the external electrode is formed, and the cathode is removed from the vacuum chamber. new with
A 2 μm thick AZ1470 resist may be applied by spraying or spin coating, and heated for 15 minutes in a baking oven at 90° C., for example.
以上説明したように、本発明の方法によればカ
ソード表面を有機レジストで被覆したカソードを
用いて、高周波プラズマ酸化することによりジヨ
セフソン接合を形成するとカソードからの逆スパ
ツタを防止できるため、接合の電流密度のばらつ
きを低減し、接合のリーク電流を減少させること
ができるという利点がある。
As explained above, according to the method of the present invention, when a Josephson junction is formed by high-frequency plasma oxidation using a cathode whose surface is coated with an organic resist, reverse spatter from the cathode can be prevented. This has the advantage of reducing density variations and reducing junction leakage current.
また逆スパツタを防止するために、その表面に
Inを被覆したカソードを用いる従来技術において
は、外部電極形成時に生じるPb−Inの合金を除
去する工程の後に新たなInをカソード表面に蒸着
する工程が必要なので、工程が複雑で時間のかか
る欠点があつた。 Also, to prevent reverse spatter,
The conventional technology that uses an In-coated cathode has the disadvantage that the process is complicated and time-consuming because it requires a process to evaporate new In on the cathode surface after a process to remove the Pb-In alloy produced when forming the external electrode. It was hot.
これに対して本発明は、カソード表面を有機レ
ジスト被覆していればよいので、外部電極形成時
にレジスト表面に付着するPbの上に更に新たな
レジストを被覆するだけでもよいし、付着した
Pbをエツチング除去して下地のレジストを露出
させ再使用してもよい。いずれにしても、従来2
工程必要だつたものが、新たなレジスト被覆工程
又はエツチング工程のいずれか1工程で済むので
工程を簡略化できる他、そのいずれの工程もInの
蒸着に比べれば、極めて短時間で行なえるものな
ので、工程の時間短縮にもつながる。更にカソー
ドを被覆するレジストとしては、通常下部電極に
酸化膜を形成する際に下部電極の一部をマスクし
ているレジストと同じものを使えるので、このレ
ジストが素子特性に悪影響を与えるそおそれはな
い。 In contrast, in the present invention, since it is sufficient to coat the cathode surface with an organic resist, it is sufficient to simply coat the Pb that adheres to the resist surface when forming the external electrode with a new resist, or
The Pb may be removed by etching to expose the underlying resist and reused. In any case, conventional 2
The process can be simplified by requiring only one process, either a new resist coating process or an etching process, and both processes can be performed in an extremely short time compared to In vapor deposition. , which also leads to a reduction in process time. Furthermore, the resist that covers the cathode can be the same resist that masks part of the lower electrode when forming an oxide film on the lower electrode, so there is no risk that this resist will adversely affect the device characteristics. .
第1図はトンネル型ジヨセフソン接合素子の構
造を示す断面図、第2図は高周波プラズマ酸化に
用いられる装置の説明図、第3図は従来のカソー
ド構造の断面図、第4図〜第5図は本発明のカソ
ード構造の断面図そして第6図は従来及び本発明
のカソード構造を用いた場合の特性図である。
Figure 1 is a cross-sectional view showing the structure of a tunnel-type Josephson junction element, Figure 2 is an explanatory diagram of an apparatus used for high-frequency plasma oxidation, Figure 3 is a cross-sectional view of a conventional cathode structure, and Figures 4 and 5. is a sectional view of the cathode structure of the present invention, and FIG. 6 is a characteristic diagram when using the conventional cathode structure and the cathode structure of the present invention.
Claims (1)
用いて下部電極の表面を高周波プラズマ酸化する
ことによりトンネル障壁となる酸化膜を形成する
ことを特徴とするジヨセフソン接合の形成方法。1. A method for forming a Josephson junction, which comprises forming an oxide film serving as a tunnel barrier by high-frequency plasma oxidation of the surface of a lower electrode using a cathode whose surface is coated with an organic resist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57029897A JPS58147182A (en) | 1982-02-26 | 1982-02-26 | Forming method for josephson junction |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57029897A JPS58147182A (en) | 1982-02-26 | 1982-02-26 | Forming method for josephson junction |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58147182A JPS58147182A (en) | 1983-09-01 |
| JPH0228908B2 true JPH0228908B2 (en) | 1990-06-27 |
Family
ID=12288761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57029897A Granted JPS58147182A (en) | 1982-02-26 | 1982-02-26 | Forming method for josephson junction |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58147182A (en) |
-
1982
- 1982-02-26 JP JP57029897A patent/JPS58147182A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58147182A (en) | 1983-09-01 |
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