JPH0228947A - Semiconductor testing circuit - Google Patents

Abstract

PURPOSE:To make it possible to decrease the mixing rate of defective products by providing a nonvolatile memory in a semiconductor chip, storing the result of inspection, and performing the inspection for reading the contents of the nonvolatile memory in the second inspection. CONSTITUTION:A nonvolatile part 2 is provided at a part of a semiconductor chip 1 in addition to a main function circuit 5. Terminals 3 for the nonvolatile memory are arranged. The nonvolatile memory terminals 3 are made to extend from a package 6. when tests A for all inspections are finished for the main function and it is judged that the product is good, a '1' is written in the nonvolatile memory through the nonvolatile memory part 3 with a measuring instrument (referred to B hereinafter). When writing of B is finished, tests C are performed as the reading inspection of the nonvolatile memory part. When the '1' is read out, it is judged that the product is good. When 'Q' is read, the nonvolatile memory part may be defective. Therefore, the tests A are conducted again. When the tests are successful, the product is judged as good. Only when it is judged that the product is defective in the tests A, the product is rejected as the defective product or the defect mark is printed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor test circuit provided with a non-volatile memory capable of storing test results in order to prevent the introduction of defects.

[Summary of the invention]

In testing a semiconductor integrated circuit, the present invention provides a non-volatile memory in a part of the semiconductor chip for the purpose of storing test results, writes the test results into the non-volatile memory, and stores the contents of the non-volatile memory at the time of re-testing. A reading test is performed to prevent defects from being mixed in.

[Conventional technology]

Conventionally, there has been no semiconductor integrated circuit provided with a nonvolatile memory for storing test results in order to prevent defective contamination.

Therefore, when re-inspecting, we either take the time to conduct a complete inspection, or we take samples from the mother's body for each lot.
This was a testing method that guaranteed the mother's body based on the sample results.

[Problem to be solved by the invention]

With conventional technology, if re-inspection takes a long time to fully inspect, the cost will be high, and with the method of sampling samples from the base for inspection, there is a possibility that defective products may be present in the base after the sample is taken out. There was a drawback.

In addition, defective products may be mixed in due to human error during the inspection process.

[Means to solve the problem]

In order to solve the above problems, the present invention provides a semiconductor integrated circuit equipped with a non-volatile memory capable of storing test results. By testing, we have made it possible to perform a complete inspection without spending much time on inspection.

[Effect]

As described above, by inspecting the nonvolatile memory section again after the normal inspection, it is possible to confirm that all the products are non-defective before shipping, thereby reducing the rate of defective products.

〔Example〕

In FIG. 1, a nonvolatile memory section 2 is provided in a part of a semiconductor chip 1 separately from a main functional circuit section 5, and nonvolatile memory terminals 3 are arranged.

Further, in FIG. 2, the nonvolatile memory terminal 3 is exposed to the package 6.

FIG. 3 is a flowchart showing the details of the inspection according to the present invention. When all the main functions have been tested and the product is determined to be non-defective, "1" is written into the non-volatile memory from the measuring device through the non-volatile memory terminal 3 (hereinafter referred to as "writing ■"). -The second inspection is completed.

When the writing of ■ is completed, a 0 test is performed as a read inspection of the non-volatile memory section, and if '1' is read out, it is judged as a good product. If 'Q' is read out, the non-volatile memory Since there may be a defective part, the product is tested again, and if it passes, it is considered good. ■Only when the product is determined to be defective at the time of death, it is excluded as defective or marked as defective.

Note that PASS is a case where the A and C tests are judged to have passed, and FAIL is a case where it is judged to be a failure.

〔Effect of the invention〕

As explained above, the present invention has the effect of reducing the defect rate by storing the test results and performing a test in which the contents of the non-volatile memory are read out at the time of re-test.

[Brief explanation of the drawing]

FIG. 1 is a front view of a semiconductor chip provided with a nonvolatile memory according to the present invention, FIG. 2 is a front view of the semiconductor chip in a packaged state, and FIG. 3 is a flowchart showing inspection details. Semiconductor chip Non-volatile memory part Non-volatile memory terminals Main function terminals Main function circuit part package ? -) Figure 3

Claims (2)

[Claims] (1) A non-volatile memory is provided in the semiconductor chip, the test results are stored in the non-volatile memory, and during re-testing,
A semiconductor test circuit characterized in that a test is performed by reading out the contents of the nonvolatile memory. (2) The semiconductor test circuit according to claim 1, wherein the input/output of the nonvolatile memory is also provided in a package.