JPH02290331A - Pll oscillator - Google Patents

Abstract

PURPOSE:To shorten the transient response time and to attain the quick arrival to stable state by detecting the locking state of a VCO and controlling ON/OFF of a transistor(TR), thereby varying the transient response characteristic of an LPF. CONSTITUTION:At the application of power, when a locking detector 15 receiving an input and an output detects that the VCO 13 of a PLL oscillator is not in steady-state and not locked, a TR 14 is turned on by a detection signal. Thus, the transient response characteristic of the LPF 8 is changed to make the passing band narrow, noise is eliminated and the transient response time is shortened. Consequently, the PLL oscillator is obtained, in which it is reaches the stable state quickly and is usable without long time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PLL oscillator, and particularly to a PLL oscillator having the ability to change the transient response characteristics of a low-pass filter.
Regarding LL oscillator.

[Conventional technology]

FIG. 5 is a circuit diagram of a conventional PLL oscillator.

In the fifth (Qj) phase detector 1l, an input signal from the input terminal (IN) and the output signal of the voltage control oscillator 6 are added from the outside, and the phase detector 1 receives the output signal of the two input signals. The phase is sensed, and an output signal corresponding to the sensed value is output.Then, the output signal of the phase detector 1 is filtered by a low-pass filter 2 consisting of a resistor 3 and a capacitor 4, which removes only low frequency components. The output signal of the voltage controlled oscillator 6 is output to the outside from the OUT terminal, and is input to the frequency control section of the voltage controlled oscillator 60 to determine the oscillation frequency of the voltage controlled oscillator 6. It is fed back as an input signal of l.

Generally, the range in which the output of the PLL oscillator is synchronized in phase and frequency with the human input signal (the range in which the output of the oscillator is synchronized with the input signal when the input signal is noise-free and changes slowly) is the range in which the output of the oscillator is synchronized with the input signal. It is determined by the voltage and frequency conversion characteristics of Furthermore, since the noise characteristics of the PLL oscillator are determined by the characteristics of the low-pass filter 2, by lowering the passband of the low-pass filter 20, changes in the phase and frequency of the input signal outside the passband are removed.

When using this PLL oscillator for the purpose of removing noise, the passband of the low-pass filter 2 is set low.

[Problem to be solved by the invention]

The above-described conventional PLL oscillator has the disadvantage that, due to the effect of the low-pass filter 2, it takes a long time from loss of synchronization to synchronization.

FIG. 6 is a characteristic diagram showing the output of the low-pass filter 2, that is, the transient response characteristic until the PLL oscillator of FIG. 5 becomes asynchronous. As is clear from FIG. 6, the time t until the oscillation frequency stability point at which the voltage applied to the input 5 of the oscillation frequency control section of the voltage controlled oscillator 6 becomes constant is determined by the transient response characteristic of the low-pass filter 20. It can be seen that this is due to the increase in size. Therefore, due to the transient response characteristics of the low-pass filter 2 of the PLL oscillator, the time from the asynchronous state to the synchronous state becomes long, so when power is turned on for digital communication, a four-phase shift occurs due to noise etc. If this happens, it will take a long time to reach a stable state of gripping, and there is a disadvantage that it will not be possible to use a naguru.

SUMMARY OF THE INVENTION An object of the present invention is to provide a PLL oscillator which overcomes the above-mentioned drawbacks, reduces transient response time, and quickly reaches a stable state.

[Means to solve the problem]

The configuration of the PLL oscillator of the present invention includes a voltage controlled oscillator, a phase detector that senses the phase difference between the output signal of the voltage controlled oscillator and an input signal input from the outside, and an output signal of the phase detector. a low-pass filter that passes low frequency components; a lock detector that detects whether the voltage-controlled generator is in a steady state of oscillation; and a transistor that uses the output signal of the lock detector as a base input. The low-pass filter is characterized in that the low-pass filter is formed so as to change the transient response characteristic depending on the ON state and OFF state of the transistor.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram showing a PLL oscillator according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing the state of the low-pass filter 8 when the oscillator l3 in FIG.
The figure is a circuit diagram showing the state of the low-pass filter 8 when the oscillator 13 in Figure 1 is in a steady state of oscillation, that is, synchronization is achieved, and Figure 4 is a transient response of the low-pass filter 8 of the PLL oscillator of this embodiment. FIG. 3 is a circuit diagram showing characteristics (solid line). Incidentally, the transient response characteristic of the conventional low-pass filter is shown by the dotted line in FIG.

In FIG. 1, the PLL oscillator of this embodiment senses the phase of the input signal input from the external input terminal (IN) and the input signal output from the voltage controlled oscillator 13, and detects the detected level. A phase detector 7 outputs an output value according to the phase detector 7, and a low-pass filter 8 (resistor 9
．． :I capacitor 10.11), a voltage controlled oscillator 13 whose oscillation frequency can be changed by the input voltage l. N
PN type transistor 14. The oscillator 13 is configured to include a lock detector 15 that detects whether the oscillator l3 is in a steady state of oscillation or not. Here, the lock detector 15
is the input signal from the input terminal IN and the voltage controlled oscillator 13
It senses the phase of the input signal output from the oscillator, and outputs the power supply voltage level when the oscillation is in a steady state, and outputs the ground level when the oscillation is not in a steady state.

Now, when the power is turned on, or when the oscillation is not in a steady state due to noise or the like and the lock detector 15 is not in a steady oscillation state, the lock detector 15 detects that the oscillation is not in a steady state. The NPN transistor l4 is turned off, and the capacitors 10 and 11 of the low-pass filter 8 are connected in series as shown in Figure 8g2.

Here, the capacitance value of the capacitor 10 is set to CI. :1 If the capacitance value of capacitor l1 is C2, the overall capacitance value C3 is C2.
3=(CI+C2)/(CIXC2). The overall capacity iiC3 becomes a smaller value than Cll, the transient response characteristic of the low-pass filter 8 improves, and the level of the input 120 of the voltage controlled oscillator 130 rises rapidly as shown by the solid line in Figure 4, stabilizing the oscillation frequency. Therefore, the time required to reach the oscillation frequency stable point B is shortened from t to jl.

Furthermore, when the oscillation is in a steady state, the lock detector 15 outputs the power supply voltage level, and the NPN transistor 14 is turned on.
state, and the capacitor 11 becomes short-circuited, so one end of the capacitor 10 of the low-pass filter 8 is grounded and connected in series as shown at 01 in FIG. Therefore, the capacitor capacitance value of the low-pass filter 8 is only the capacitor 10, and its response value is CI, which is larger than the capacitance value C3 of the low-pass filter 8 when the oscillation is not in a steady state and is in a non-uniform state. The transient characteristic is at the stable point A in Figure 4, and the conventional P
It can be automatically made to have the same characteristics as the low-pass filter of the LL oscillator.

〔Effect of the invention〕

As explained above, the present invention improves the transient response characteristics of the low-pass filter when it is not in an oscillation state and is asynchronous. For example, when powering on digital communications,
This has the effect of achieving stable oscillation in a short period of time even if synchronization occurs due to noise or the like.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a PLL oscillator according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a low-pass filter when the oscillator shown in FIG. Circuit diagram of the low-pass filter when the oscillator shown in the figure is in a stable oscillation state, No. 4
1, FIG. 5 is a block diagram of a conventional PLL oscillator, and FIG. 6 is a transient response characteristic diagram of the oscillator shown in FIG. 5. IN...External input signal terminal, OUT...
・External output signal terminal, 1.7...phase detector,
3.9...Resistor, 4,10.11...
・Capacitor, 2.8...Low pass filter, 6
, l3... Voltage controlled oscillator, 14...
NPN transistor, 15...Lock detector, t, t. x... Time to delay the oscillation frequency to a stable point, A. B... Stable point. Agent Patent Attorney Shinsei Uchihara 71!1 O 2 Diagram No. 3m Test Bowl Sengoku Otsuke

Claims (1)

[Claims] A voltage controlled oscillator, a phase detector that senses the phase difference between the output signal of the voltage controlled oscillator and an input signal input from the outside, and a low-pass filter that passes the low frequency component of the output signal of the phase detector. and a lock detector for sensing whether or not the voltage controlled oscillator is in a steady state of oscillation, and a transistor whose base input is an output signal of the lock detector, and the conduction or non-conduction of the transistor:
A PLL oscillator, characterized in that the low-pass filter is formed so as to change transient response characteristics.