JPH0229039A - Pilot signal elimination circuit - Google Patents

Pilot signal elimination circuit

Info

Publication number
JPH0229039A
JPH0229039A JP3654889A JP3654889A JPH0229039A JP H0229039 A JPH0229039 A JP H0229039A JP 3654889 A JP3654889 A JP 3654889A JP 3654889 A JP3654889 A JP 3654889A JP H0229039 A JPH0229039 A JP H0229039A
Authority
JP
Japan
Prior art keywords
pilot signal
level
output
input
variable gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3654889A
Other languages
Japanese (ja)
Other versions
JP2711343B2 (en
Inventor
Bunichi Okubo
大久保 文一
Naotoshi Higashiyama
東山 尚稔
Yasuo Kawakami
泰雄 川上
Tetsuo Nakamura
哲夫 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP1036548A priority Critical patent/JP2711343B2/en
Publication of JPH0229039A publication Critical patent/JPH0229039A/en
Application granted granted Critical
Publication of JP2711343B2 publication Critical patent/JP2711343B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To completely eliminate a pilot signal, to eliminate the need for the adjustment of the addition rate of triangle waves in a conventional circuit and to save the adjustment man-hour in the entire set by adopting a constitution such that the signal level of the triangle wave being the elimination signal and that of the pilot signal are always in the same level. CONSTITUTION:The amplification factor of a variable gain amplifier 6 is controlled by a difference between the level of the triangle wave being an output of the variable gain amplifier 6 and a level of a pilot signal at a terminal 13 being a input terminal of a stereo signal and the triangle wave of the same level as the level of the pilot signal at the input terminal 13 is given always at the output 7 of the variable gain amplifier 6. Thus, a triangle wave level detection circuit 11 is connected to the output of the variable gain amplifier 6, the pilot signal level detection circuit 12 is connected to the input terminal 13, a comparator 10 taking a DC level difference between the triangle wave level detection circuit 11 and the pilot signal level detection circuit 12 is connected, and the relation between the pilot signal and the triangle wave for eliminating the pilot signal in a 2-input adder 8 shows the same level in the opposite phase and the pilot signal component is eliminated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、FMステレオ復調器におけるパイロット信号
除去システムに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pilot signal cancellation system in an FM stereo demodulator.

〔従来の技術〕[Conventional technology]

一般的なFM (Frequency Modulat
ion)ステレオ放送においては、19KH’zの正弦
波のパイロット信号が存在する。パイロット信号は、P
LL (Phase Locked Loop)におい
て重要な働きをするが入力信号に含まれているので、単
に復調すると復調器出力にも出てくる為、聴感上問題と
がる。そこで、この19KHzのパイロット信号の除去
が必要である。従来の19KHzのパイロット信号の除
去システムを第3図に示す。システムハは、三角波変換
器16.可変利得増幅器18、加算器20.パイロット
信号レベル検波回路22より構成される。ステレオ信号
は端子23より入力され加算器20を経て出力24に出
力される。実際には、前記加算器20においてパイロッ
ト信号の位相と180逆位相の三角波と(正弦波)のパ
イロット信号の加算が行われ、パイロット信号の除去を
行うものである。前述した逆位相の三角波については、
PLLでのパイロット信号と90゛位相差のある方形波
を使用し、三角波変換器16により方形波を三角波に変
換し、通常三角波変換器16に設けられた容量(図示せ
ず)の充放電により三角波に変換する為、三角波変換器
16の入力端子15に入力される方形波と三角波変換器
16の出力における三角波との関係は第4図の(a)、
 (b)となり、方形波の位相と比べて三角波はさらに
90°の位相差が生じパイロット信号と180°位相差
となる。三角波変換器出力は、可変利得増幅器18に接
続されており可変利得増幅器18の増幅率は、ステレオ
信号入力端子23に接続されているパイロット信号レベ
ル検波回路22により制御され、入力端子23のパイロ
ット信号レベルに応じた三角形が加算器の出力端子であ
る19に出力され加算器に入力され、ステレオ信号と加
算され、パイロット信号と加算される為、常に入力端子
19のパイロット信号レベルに応じた除去を可能とした
システムである。
General FM (Frequency Modulat
ion) In stereo broadcasting, there is a 19 KHz sine wave pilot signal. The pilot signal is P
Although it plays an important role in the LL (Phase Locked Loop), it is included in the input signal, so if it is simply demodulated, it will also appear in the output of the demodulator, causing problems in terms of hearing. Therefore, it is necessary to remove this 19 KHz pilot signal. A conventional 19 KHz pilot signal cancellation system is shown in FIG. System C includes a triangular wave converter 16. Variable gain amplifier 18, adder 20. It is composed of a pilot signal level detection circuit 22. A stereo signal is input from a terminal 23, passes through an adder 20, and is output to an output 24. In reality, the adder 20 adds a triangular wave (sine wave) pilot signal having a phase 180 opposite to that of the pilot signal, and removes the pilot signal. Regarding the anti-phase triangular wave mentioned above,
A square wave with a phase difference of 90 degrees from the pilot signal in the PLL is used, and the square wave is converted into a triangle wave by the triangular wave converter 16. Normally, by charging and discharging a capacitor (not shown) provided in the triangular wave converter 16, In order to convert into a triangular wave, the relationship between the square wave input to the input terminal 15 of the triangular wave converter 16 and the triangular wave output from the triangular wave converter 16 is as shown in (a) in FIG.
(b), the triangular wave has a phase difference of 90° compared to the phase of the square wave, resulting in a 180° phase difference with the pilot signal. The triangular wave converter output is connected to a variable gain amplifier 18, and the amplification factor of the variable gain amplifier 18 is controlled by a pilot signal level detection circuit 22 connected to a stereo signal input terminal 23, and the pilot signal at the input terminal 23 is controlled by a pilot signal level detection circuit 22 connected to a stereo signal input terminal 23. Since a triangle corresponding to the level is outputted to the output terminal 19 of the adder, inputted to the adder, added to the stereo signal, and added to the pilot signal, removal is always performed according to the level of the pilot signal at the input terminal 19. This is a system that makes it possible.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、前述した従来のパイロット除去システム
においては、パイロット信号レベル検波回路22の利得
等のバラツキにより加算器における三角波の加算率もバ
ラツキを生ずる。その為前述した従来のパイロット除去
システムを使用する場合、バラツキを調整する必要があ
る。また、従来のパイロット除去システムを集積回路化
した場合バラツキを調整する端子と外付素子(通常ボリ
ューム)が必要となる。
However, in the conventional pilot removal system described above, variations in the gain of the pilot signal level detection circuit 22 cause variations in the addition rate of the triangular wave in the adder. Therefore, when using the conventional pilot removal system described above, it is necessary to adjust for variations. Furthermore, when a conventional pilot removal system is integrated into an integrated circuit, a terminal and an external element (usually a volume) are required to adjust variations.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によるパイコツト信号除去回路は、三角波変換器
の出力が可変利得増幅器の入力に接続され、前記可変利
得増幅器の出力が2入力加算器の1つの入力と接続され
、さらに第1のレベル検波回路の入力に接続され、前記
2入力加算器の他の入力が第2のレベル検波回路の入力
と共通で入力端子とし、前記第1のレベル検波回路の出
力と前記第2のレベル検波の出力はレベル比較器の比較
−端子にそれぞれが接続され、前記レベル比較器の出力
が前記可変利得増幅器の増幅率制御端子に接続され、前
記2入力加算器の出力を出力端子としている。
In the piezoelectric signal removal circuit according to the present invention, the output of the triangular wave converter is connected to the input of a variable gain amplifier, the output of the variable gain amplifier is connected to one input of a two-input adder, and further includes a first level detection circuit. , the other input of the two-input adder is a common input terminal with the input of the second level detection circuit, and the output of the first level detection circuit and the output of the second level detection circuit are Each is connected to a comparison terminal of a level comparator, the output of the level comparator is connected to an amplification control terminal of the variable gain amplifier, and the output of the two-input adder is used as an output terminal.

〔実施例〕〔Example〕

次に本発明のシステム図を第1図に示す。システムは、
三角波変換器2.可変利得増幅器6.三角波レベル検波
回路11.パイロット信号レベル検波回路12.比較器
10.加算器8より構成される。ステレオ信号は、端子
13より入力され加算器8を経て出力14に出力される
。本発明回路においては、加算器8においてパイロット
信号と逆位相の三角波とパイロットの加算が行われ、パ
イロット信号の除去を行うものである。パイロット信号
と逆位相の三角波については、従来例と同様PLLでの
パイロット信号と90゛位相差のある方形波を使用する
。端子1に入力された方形波は、三角波変換器2により
三角波に変換される。
Next, a system diagram of the present invention is shown in FIG. the system,
Triangular wave converter 2. Variable gain amplifier6. Triangular wave level detection circuit 11. Pilot signal level detection circuit 12. Comparator 10. It consists of an adder 8. The stereo signal is input from the terminal 13, passes through the adder 8, and is output to the output 14. In the circuit of the present invention, the adder 8 adds a triangular wave having an opposite phase to the pilot signal and removes the pilot signal. As for the triangular wave having a phase opposite to that of the pilot signal, a square wave having a phase difference of 90° from the pilot signal in the PLL is used as in the conventional example. A square wave input to terminal 1 is converted into a triangular wave by triangular wave converter 2 .

三角波変換は容量の充放電により行う為、三角波変換器
2の入力端子1と出力端子2における関係は、第2図の
(a)、 (b)となり、方形波の位相と比べて三角波
は、さらに90°の位相差が生じパイロット信号と18
0°位相差となる。三角波変換器2の出力は、可変利得
増幅器6に接続されている。可変利得増幅器6の増幅率
は、可変利得増幅器6出力の三角波のレベルと、ステレ
オ信号と入力端子である端子13のパイロット信号のレ
ベルとの差により制御し、入力端子13のパイロット信
号レベルと常に同レベルの三角波が可変利得増幅器6の
出カニ7に出る・ようにする。そのために、可変利得増
幅器の出力に三角波レベル検波回路11が接続され、入
力端子13にパイロット信号レベル検波回路12が接続
されておりさらに前記三角波レベル検波回路11とパイ
ロット信号レベル検波回路12とのDCレベル差をとる
比較器10が接続されている。以上のことにより2入力
加算器8におけるパイロット信号とパイロット信号除去
用の三角波との関係は、逆位相で同レベルとなり出力端
子14におけるステレオ信号にはパイロット信号成分が
除去されたものが出力される。集積回路に用いた場合、
三角波レベル検波回路11とパイロット信号レベル検波
回路12は互いに同様なバラツキを生じる為、比較器1
0の出力では、各々のレベル検波器のバラツキは除いて
考えれば良い。
Since the triangular wave conversion is performed by charging and discharging the capacitor, the relationship between the input terminal 1 and the output terminal 2 of the triangular wave converter 2 is as shown in (a) and (b) in Fig. 2, and compared to the phase of the square wave, the triangular wave is Furthermore, a phase difference of 90° occurs and the pilot signal and 18
The phase difference is 0°. The output of the triangular wave converter 2 is connected to a variable gain amplifier 6. The amplification factor of the variable gain amplifier 6 is controlled by the difference between the level of the triangular wave output from the variable gain amplifier 6 and the level of the pilot signal at the stereo signal and the input terminal 13, and is always equal to the pilot signal level at the input terminal 13. A triangular wave of the same level is outputted to the output 7 of the variable gain amplifier 6. For this purpose, a triangular wave level detection circuit 11 is connected to the output of the variable gain amplifier, a pilot signal level detection circuit 12 is connected to the input terminal 13, and a DC voltage between the triangular wave level detection circuit 11 and the pilot signal level detection circuit 12 is connected. A comparator 10 that takes a level difference is connected. As a result of the above, the relationship between the pilot signal in the two-input adder 8 and the triangular wave for pilot signal removal is in opposite phases and at the same level, and the stereo signal at the output terminal 14 is output with the pilot signal component removed. . When used in integrated circuits,
Since the triangular wave level detection circuit 11 and the pilot signal level detection circuit 12 produce similar variations, the comparator 1
In the case of an output of 0, it is sufficient to consider excluding variations in each level detector.

さらに三角波変換器2と可変利得増幅器6との間にパイ
ロット除去を大きくする為の三角波から正弦波への変換
回路を挿入しても本発明の効果は同様に得られる。
Further, even if a triangular wave to sine wave conversion circuit is inserted between the triangular wave converter 2 and the variable gain amplifier 6 to increase pilot rejection, the same effect of the present invention can be obtained.

第5図に本発明の他の実施例を示す。本実施例は、第1
図のシステムに波形整形器24及びバ。
FIG. 5 shows another embodiment of the invention. In this example, the first
The system shown in the figure includes a waveform shaper 24 and a bar.

ノアアンプ25.疑似sin波変換器27を追加したも
のであり、構成回路の一例を第7図に示す。
Noah amp 25. A pseudo sine wave converter 27 is added, and an example of the configuration circuit is shown in FIG.

波形整形器24はトランジスターTry(以下トランジ
スターは省略)、Trz、抵抗R1〜R4゜定電流源工
、からなる差動増幅器で入力端子1からのパイロット信
号と90°位相差のある方形波の整形を行に三角波変換
器2に入力される。三角波変換器2は、第7図に示すよ
うにTr3+Tr4+容量C1定電流源I2.Isによ
り成り容量C及び定電流源I2.I3により波形整形器
24かの方形波を充放電により三角波に変換する(第6
図端子30波形参照)。三角波変換器2の出力は、Tr
s〜T r s +定電流源I4.Isから成るバッフ
ァアンプ25により、疑似sin波変換器27の入力イ
ンピーダンスの影響を受けない様にしており、疑似si
n波変換器27は、抵抗R5〜R7、T r 9゜Tr
、。、定電流源re、Itから差動の入出力特性により
三角波からsin波に変換され(第6図端子26の波形
参照)可変利得増幅器6に入力される。
The waveform shaper 24 is a differential amplifier consisting of a transistor Try (the transistor is omitted hereafter), Trz, and a constant current source with resistors R1 to R4, and shapes a square wave with a 90° phase difference from the pilot signal from the input terminal 1. is input to the triangular wave converter 2 in rows. As shown in FIG. 7, the triangular wave converter 2 includes Tr3+Tr4+capacitance C1 constant current source I2. Is, the capacitance C and the constant current source I2. I3 converts the square wave of the waveform shaper 24 into a triangular wave by charging and discharging (6th
(Refer to the waveform of terminal 30 in the figure). The output of the triangular wave converter 2 is Tr
s~T r s + constant current source I4. The buffer amplifier 25 consisting of Is prevents it from being affected by the input impedance of the pseudo sine wave converter 27.
The n-wave converter 27 includes resistors R5 to R7, Tr 9°Tr
,. , constant current sources re and It are converted from triangular waves to sine waves by differential input/output characteristics (see waveforms at terminals 26 in FIG. 6) and input to the variable gain amplifier 6.

加算器以後については、第1図で説明した内容と同じで
あり、第5図のシステムにおいては、2入力加算器8に
おけるパイロット信号とパイロット信号除去用疑似si
n波の関係は逆位相で同レベルとなり端子14には疑似
sin波で除去されたステレオ信号が出力され、第1図
のシステムにおける三角波での除去よりも効率がよい。
The contents after the adder are the same as those explained in FIG. 1, and in the system shown in FIG.
The relationship between the n waves is that they have opposite phases and the same level, and a stereo signal removed by a pseudo sine wave is outputted to the terminal 14, which is more efficient than the removal by a triangular wave in the system of FIG.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明におけるパイロット信号除去
システムにおいては、除去用信号である三角波とパイロ
ット信号の信号レベルが常に同レベルになる為、パイロ
ット信号を完全に除去し、従来回路においての、三角波
の加算率の調整も必要無くなり、セット上における調整
工数の削除が可能となる。さらに集積回路化した場合調
整端子の削減、さらにパイロット信号除去率が高くかく
安定に維持、継続可能となる。さらに、三角波変換器2
と可変利得増幅器6との間に三角波から正弦波への変換
回路を挿入することによりパイロット除去率の増大及び
レベル検波回路11,12がまったく同じ回路を使用で
きる利点もある。
As explained above, in the pilot signal removal system of the present invention, the signal level of the triangular wave, which is the removal signal, and the pilot signal are always at the same level, so the pilot signal is completely removed. There is no need to adjust the addition rate, and adjustment man-hours on the set can be eliminated. Furthermore, when it is integrated into an integrated circuit, the number of adjustment terminals can be reduced and the pilot signal rejection rate is high, making it possible to maintain stability and continue. Furthermore, the triangular wave converter 2
By inserting a triangular wave to sine wave conversion circuit between the variable gain amplifier 6 and the variable gain amplifier 6, there is an advantage that the pilot rejection rate can be increased and that the level detection circuits 11 and 12 can use exactly the same circuit.

角波変換器、3,17・・・・・・三角波変換器出力端
子、6.18・・・・・・可変利得増幅器、7,19・
・・・・・可変利得増幅器出力端子、8,20・・・・
・・加算器、9゜21・・・・・・可変利得増幅器制御
端子、10・・・・・・比較器、11,12.22・・
・・・・レベル検波回路、13゜23・・・・・・ステ
レオ信号入力端子、14.24・・・・・・出力端子、
24・・・・・・波形整形器、27・・・・・・疑似s
in波変換器、25・・・・・・バッファアンプ。
Angular wave converter, 3, 17... Triangular wave converter output terminal, 6.18... Variable gain amplifier, 7, 19...
...Variable gain amplifier output terminal, 8, 20...
...Adder, 9゜21...Variable gain amplifier control terminal, 10...Comparator, 11, 12.22...
... Level detection circuit, 13゜23 ... Stereo signal input terminal, 14.24 ... Output terminal,
24... Waveform shaper, 27... Pseudo s
In-wave converter, 25...buffer amplifier.

代理人 弁理士  内 原   晋Agent: Patent Attorney Susumu Uchihara

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のシステム図、第2図は第1
図における実施例の信号波形図、第3図は従来例のシス
テム図、第4図は従来例の波形図、第5図は本発明の他
の実施例のシステム図、第6図は第5図における実施例
の信号波形図、第7図は第5図における実施例の具体的
な回路図である。 1.15・・・・・・方形波入力端子、2,16・・・
・・・三菊 Z 図 第 図
Fig. 1 is a system diagram of one embodiment of the present invention, and Fig. 2 is a system diagram of an embodiment of the present invention.
3 is a system diagram of a conventional example, FIG. 4 is a waveform diagram of a conventional example, FIG. 5 is a system diagram of another embodiment of the present invention, and FIG. 6 is a system diagram of a conventional example. FIG. 7 is a signal waveform diagram of the embodiment shown in the figure, and FIG. 7 is a specific circuit diagram of the embodiment shown in FIG. 1.15... Square wave input terminal, 2,16...
...Three chrysanthemums Z diagram

Claims (1)

【特許請求の範囲】[Claims] 三角波変換器の出力が可変利得増幅器に供給され、前記
可変利得増幅器の出力が2入力加算器の1つの入力と接
続され、さらに、第1のレベル検波回路の入力に接続さ
れ、2入力加算器の他の入力が第2のレベル検波回路の
入力と共通でパイロット信号除去システムの入力端子と
し、前記第1のレベル検波回路の出力と前記第2のレベ
ル検波の出力はレベル比較器の比較端子にそれぞれ接続
され、前記レベル比較器の出力が前記可変利得増幅器の
増幅率制御端子に接続され、前記2入力加算の出力をパ
イロット信号除去システムの出力端子とすることを特徴
とするパイロット信号除去回路。
The output of the triangular wave converter is supplied to a variable gain amplifier, and the output of the variable gain amplifier is connected to one input of a two-input adder, which is further connected to the input of a first level detection circuit, and the output of the variable gain amplifier is connected to one input of a two-input adder. The other input is common to the input of the second level detection circuit and serves as an input terminal of the pilot signal removal system, and the output of the first level detection circuit and the output of the second level detection are the comparison terminals of the level comparator. a pilot signal removal circuit, wherein the output of the level comparator is connected to an amplification factor control terminal of the variable gain amplifier, and the output of the two-input addition is used as an output terminal of a pilot signal removal system. .
JP1036548A 1988-04-25 1989-02-15 Pilot signal removal circuit Expired - Fee Related JP2711343B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1036548A JP2711343B2 (en) 1988-04-25 1989-02-15 Pilot signal removal circuit

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-103286 1988-04-25
JP10328688 1988-04-25
JP1036548A JP2711343B2 (en) 1988-04-25 1989-02-15 Pilot signal removal circuit

Publications (2)

Publication Number Publication Date
JPH0229039A true JPH0229039A (en) 1990-01-31
JP2711343B2 JP2711343B2 (en) 1998-02-10

Family

ID=26375610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1036548A Expired - Fee Related JP2711343B2 (en) 1988-04-25 1989-02-15 Pilot signal removal circuit

Country Status (1)

Country Link
JP (1) JP2711343B2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487101A (en) * 1977-12-23 1979-07-11 Hitachi Ltd Adjusting circuit for electronic circuit
JPS5853805A (en) * 1981-09-25 1983-03-30 Matsushita Electric Ind Co Ltd Inductance adjustment method and inductor
JPS5871742A (en) * 1981-10-26 1983-04-28 Matsushita Electric Ind Co Ltd Canceling circuit of pilot signal
JPS6041337A (en) * 1984-06-22 1985-03-05 Pioneer Electronic Corp Pilot signal eliminating circuit of fm stereo receiver
JPS6058725A (en) * 1983-09-09 1985-04-04 Sanyo Electric Co Ltd Harmonic eliminating circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5487101A (en) * 1977-12-23 1979-07-11 Hitachi Ltd Adjusting circuit for electronic circuit
JPS5853805A (en) * 1981-09-25 1983-03-30 Matsushita Electric Ind Co Ltd Inductance adjustment method and inductor
JPS5871742A (en) * 1981-10-26 1983-04-28 Matsushita Electric Ind Co Ltd Canceling circuit of pilot signal
JPS6058725A (en) * 1983-09-09 1985-04-04 Sanyo Electric Co Ltd Harmonic eliminating circuit
JPS6041337A (en) * 1984-06-22 1985-03-05 Pioneer Electronic Corp Pilot signal eliminating circuit of fm stereo receiver

Also Published As

Publication number Publication date
JP2711343B2 (en) 1998-02-10

Similar Documents

Publication Publication Date Title
US4054839A (en) Balanced synchronous detector circuit
US4164624A (en) Demodulation circuits of FM stereophonic receivers
JPH0229039A (en) Pilot signal elimination circuit
US4124780A (en) FM stereophonic receiver providing a test signal
US4539697A (en) FM Stereo demodulating circuit
US4633496A (en) Low-pass filter circuit
JP3479334B2 (en) Circuit for stereo and dual audio signal recognition
US3821654A (en) Wideband discriminator circuit with improved operating characteristics
JP2665190B2 (en) Pilot signal removal circuit
JPS5918772Y2 (en) FM stereo signal demodulation circuit
JPH0322644A (en) Pilot signal eliminating system
JPS58142620A (en) Waveform shaping circuit
US4620314A (en) Method of generating an approximately sinusoidal signal and circuit arrangement for implementing this method, particularly in a stereo demodulator
JPS6334360Y2 (en)
JPS6247383B2 (en)
JP3593446B2 (en) Stereo demodulator
JPH0537238A (en) Signal detection circuit
JPH0537239A (en) Signal detection circuit
JPS6245202A (en) Frequency multiplier circuit
JPS5955633A (en) AM receiver
JPS59153335A (en) Receiver for am and fm
JPS58201407A (en) Synchronous detecting circuit
JPS6267905A (en) multiplication circuit
JPS6336568B2 (en)
JPS6349416B2 (en)

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313117

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081031

Year of fee payment: 11

LAPS Cancellation because of no payment of annual fees