JPH02298090A - Semiconductor light-emitting and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor light emitting device and a method for manufacturing the same. In particular, the present invention relates to a visible light semiconductor light emitting device made of an AlGa1nP semiconductor and a method for manufacturing the same.

BACKGROUND OF THE INVENTION In recent years, visible light semiconductor light emitting devices formed on GaAs substrates by chemical vapor deposition using organic metals have been attracting attention as light sources for optical communication systems using plastic fibers, optical disks, and the like.

The visible light semiconductor light emitting device has Ga1nP1 or (Mu1xGa+-x)*, sln@, 5P(Ocx
cf) as the cladding layer (AlvGa+-y)s
, s Ina, 5P (x (y: at)) are used. The device structure using Ga1nP as the active layer and its manufacturing method are shown in Figure 3. Lett,
) Vol. 43, pp.

987-989 (1983)] This ridge-embedded laser is based on an n-GaAs semiconductor substrate (11).
qBA3burrer' layer (12), n- with thickness fμn
After sequentially forming an AlGa1nP cladding layer (13), a GaInP active layer (14), and a P-AIGalnP cladding layer (15) with a thickness of 0.7 μm, a 5tol (lli
) by selective etching using a mask, P-AIGaln
The P cladding layer (15) is etched to the middle to form a convex stripe, and then the area with the 5101IC1B) mask is selectively grown using the low pressure MOVPE method using S10* (18) as a selective growth mask. Except n
- Fill with a GaAs current confinement layer (17). Next 810
2 After removing the mask 1B, the p-caAs contact layer (1
8) is formed by low pressure MOVPE method to form a P-type electrode (19).
, an n-type electrode (20) is formed.

Problems to be Solved by the Invention In the structure of the A IGa InP semiconductor light emitting device according to the conventional example described above, the current I is 1μs of n-AlG
a1nP cladding layer (13), 0.7 μm P-AIG
It flows through the alnP cladding layer (t5). AlGa[nP
Quaternary mixed crystals have high specific resistance (especially P-
It is quite difficult to reduce the resistance of the AI GalnP layer. For example, Z-doped P-(AlxGa+-x
)11. s In11. In sP, when χ = 0.5, the resistivity is about 0.5Ω*cm, when χ = 0.7, the resistivity is several Ω cm, and when the composition χ of AI is increased, the resistivity increases. χ cannot be increased because χ increases. In addition, since the thermal resistance of AlGa1nP is high, P-A
IGa! There was a problem in that good temperature characteristics could not be obtained because heat generated in the nP cladding layer (15) was not sufficiently dissipated, making it difficult to extend the life. The present invention has been made to solve the above-mentioned conventional problems, and its purpose is to reduce heat generation in the AlGa1nP cladding layer in an AlGa1nP-based visible light semiconductor light emitting device. The present invention provides a semiconductor light emitting device having good characteristics and a method for manufacturing the same.

Means for Solving the Problems In order to solve the above problems, the present invention provides a double heterojunction structure consisting of a semiconductor substrate, a first cladding layer, an active layer, and a second cladding layer having a convex stripe structure. A structure is formed which has a P-type conductive region on one side and an N-type conductive region on the other side, with stripes sandwiched between them.

The present invention also provides a manufacturing method for manufacturing the above structure.

Operation In a conventional semiconductor light emitting device, the current flows through a 1 μm n-AlG
a [nP cladding layer, 0.7 μm P-AI Galn
Since it flows through the P cladding layer, it is difficult to reduce the resistance, and P-
Heat generation in the AI GalnP cladding layer is a problem, but in the present invention, even if the second cladding layer is formed of P-AIGalnP etc., the resistance of the part of the second cladding layer that will become a current path is lowered by introducing impurities. In addition, since a thin portion of the second cladding layer can be used as a current path portion, it is possible to generate heat and exhibit good performance.

Further, by the manufacturing method of the present invention, a semiconductor light emitting device having the manufacturing method of the present invention can be easily manufactured.

Embodiment A semiconductor light emitting device and its manufacturing method, which is one of the embodiments of the present invention, will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of manufacturing a semiconductor light emitting device according to an embodiment of the present invention, and FIG.
Figures (a) to (c) are cross-sectional views showing the manufacturing process of the semiconductor light emitting device of the example. First, as shown in FIG. 2(a), S, 1. (semi-insulating) -Ga
Thickness on As substrate 1! , OμI undoped (undo
ped) (AI@, tGa@, *) i, s In1. s
P cladding layer 2, Ga1nP active layer 3 with a thickness of 0.1 μs
, 1.0 μm thick undoped (Alm, v(ia@,
3) Epitaxial growth of @, aln@, and sP cladding layers 4 is performed sequentially. Note that the layer 2 is A I I nP
, Ga1nP may be used as the layer 4. next,
By selective etching using hot sulfuric acid using S+02El as a mask, (Ala, vGa*, a) 1. sln++,
5Pii4 is selectively etched to a depth of 0.7 μm to leave layer 4 in the form of convex stripes. During striping, the width is 7 μm. Next, SIO! By selective growth using low pressure MOvPE method using 9 as a mask for selective growth, 5102
9.Undoped GaAs layer 5. except for areas with masks.
θ is epitaxially grown. The selective growth of the GaAs layers 5 and 6 is performed at a growth temperature of 700° C. to form the structure shown in FIG. 2(b). Next, heat diffusion or a. By on-implantation method, undoped GaAs, l! ! 15.6 respectively,
Doping is performed to form a P+n region. Zn is used for P-type doping, and Se is used for N-type doping.
was used. For doping by thermal diffusion, doping for 30 minutes7
Heat treatment was performed at 00°C to form Zn1Se (Alm,
vGa@, *)s, s In@, sP Diffuse to layer 2. In this way, a P-vacant region 7 + an n-type region 8 is formed to obtain the structure shown in FIG. 2(c). Similarly, in the ion implantation method, (AI@, rGa@, s ) s, s In@,
The implantation is performed so as to reach the sP layer 2, and annealing is performed at 700° C. to form low resistance regions 7 and 8. Finally, a P-type electrode 9 is formed on the P-GaAs layer 5, and an n-type electrode IO is formed on the n-GaAs layer 6 to form the structure shown in FIG. By using the above structure method, since the cladding layers 2 and 4 are non-doped, high-quality crystal growth is possible, and (A I@, 7G
ai, s) i, 5lns, sP The crystallinity of the cladding layers 2 and 4 does not deteriorate due to doping in either thermal diffusion or ion implantation, so it is possible to extend the lifespan and improve the performance of semiconductor light emitting devices. becomes. Due to the device structure of the present invention, the electron e is transferred from the n-GaAs layer to the n-type layer with a thickness of 0.
．． 3μI n-(Ale,tGa@,s)s, 5lns
, flows into the four-layer portion of the sP layer and is injected into the active layer 3. On the other hand, the holes are 0, which has become P type from the P-GaAs layer 7,
3μm? -(Alm, 〒Gas, s) @, s In
a, the current flows into the sP layer portion 4b and is injected into the active layer 3, that is, the current is injected from the low-resistance regions on both sides of the active region, and the layer 40.48 is also thin and low-resistance. No fever occurs.

Recombine with electrons. The thickness of the cladding layer in the light emitting region of the active layer 3 is 1 μm, which is good for light confinement. Further, since the light emitting region is also a Pn junction region in the active layer 3, it can be narrowed down to a minute spot, light can be confined in the active layer 3 in a parallel direction, and transverse mode can be controlled. The present inventor confirmed that the device structure of the present invention causes fundamental transverse mode oscillation, and confirmed that the device has an output of 3 mm and a life of 1000 hours. It should be noted that the structure according to the present invention is not limited to the above-mentioned embodiments. For example, the structure according to the present invention is
A.I.

It is also possible to use (ial-x)s, @In@, and 6P. Mata, other semiconductor materials such as AlGaAsGa
5b, InGaAsP, etc., and even ZnS etc.
It goes without saying that it is also possible to use an I[-Vl compound semiconductor. In addition, various modifications can be made without departing from the gist of the present invention. In addition, in the manufacturing method of the present invention, the doping material is n-type Se, p
Although Zn was used in the mold, other doping materials such as S
It goes without saying that it is also possible to use 1+Mg+Be.

Effects of the Invention As described above, according to the present invention, the crystallinity of the light emitting region in the active layer is improved, the resistance of the device is lowered, and the heat generation is reduced. higher performance,
Longer life and control of transverse mode are realized. The present invention has a very large practical effect as a semiconductor light emitting device structure and manufacturing method, and greatly contributes to the realization of high performance semiconductor lasers.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a schematic structure of a semiconductor light-emitting device according to an embodiment of the present invention, and FIGS. Figure 3(a)~
(d) is a sectional view showing a conventional laser manufacturing process. 1...GaAs substrate, 2...AlGa1nP
Cladding layer, 3...Ga1nP active layer, 4...
・AlGa1nP cladding layer, 5...GaAs layer,
8...GaAs layer, 7...P type region, 8...
...n type region, 9...P type electrode, IO...n
type electrode. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (2)

[Claims] (1) In a double heterojunction structure consisting of a semiconductor substrate, a first cladding layer, an active layer, and a second cladding layer with a convex stripe structure, there is a P-type conductivity type region on one side with the convex stripe in between, and an n-type conductivity type region on the other side. 1. A semiconductor light emitting device comprising a conductivity type region, and a current is injected from the region into an active layer. (2) On the semiconductor substrate, a first cladding layer, an active layer, a second
After sequentially forming the cladding layers, etching is performed halfway through the second cladding layer to form convex stripes, and then selective growth is performed to form a semiconductor layer made of a material with lower resistance and refractive index than the second cladding layer. A step of forming P on both sides of the convex stripe, and a step of forming P on one side from the semiconductor layer formed on both sides of the convex stripe to the middle of the first cladding layer.
1. A method for manufacturing a semiconductor light emitting device, comprising a step of doping one type impurity with an n-type impurity by diffusion or ion implantation.