JPH0230642U - - Google Patents
Info
- Publication number
- JPH0230642U JPH0230642U JP10882488U JP10882488U JPH0230642U JP H0230642 U JPH0230642 U JP H0230642U JP 10882488 U JP10882488 U JP 10882488U JP 10882488 U JP10882488 U JP 10882488U JP H0230642 U JPH0230642 U JP H0230642U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- operational amplifier
- reset
- bias
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Description
第１図は、本考案の電源ＯＮ時リセツト回路の
回路構成図、第２図は、第１図のリセツトパルス
のタイミングチヤート図である。
１０…オペアンプ、１２…コンデンサ、１４…
コンパレータ、１６…フリツプフロツプ、１８…
集積回路、Ｒ１，Ｒ２…バイアス抵抗、１０ａ…
非反転入力端子、ｂ…スレツシユホールド電圧。
FIG. 1 is a circuit diagram of a power-on reset circuit according to the present invention, and FIG. 2 is a timing chart of the reset pulse shown in FIG. 10... operational amplifier, 12... capacitor, 14...
Comparator, 16...Flip-flop, 18...
Integrated circuit, R 1 , R 2 ... bias resistor, 10a...
Non-inverting input terminal, b...Threshold voltage.
Claims (1)
持するフリツプフロツプとを内蔵する集積回路の
電源ＯＮ時リセツト回路において、 前記オペアンプにバイアス電圧を供給するバイ
アス回路と、 該バイアス電圧を安定化するコンデンサと、 前記バイアス電圧と通常動作時のバイアス電圧
よりも低い所定のスレツシユホールド電圧値とを
比較し、電源ＯＮ時から該スレツシユホールド電
圧値に至るまでの充電時間に応じたリセツトパル
スを得るリセツトパルス発生回路と、を有し、 前記オペアンプ用のバイアス回路及びコンデン
サを利用し、電源ＯＮ時に所定のリセツトパルス
を出力し、前記フリツプフロツプをリセツトする
ことを特徴とする電源ＯＮ時リセツト回路。[Claims for Utility Model Registration] A power-on reset circuit for an integrated circuit that includes an operational amplifier that performs amplification and a flip-flop that maintains a predetermined state, comprising: a bias circuit that supplies a bias voltage to the operational amplifier; The capacitor that stabilizes the voltage is compared with the bias voltage and a predetermined threshold voltage value that is lower than the bias voltage during normal operation, and the charging time from when the power is turned on until the threshold voltage value is reached is calculated. and a reset pulse generating circuit for generating a reset pulse according to the operational amplifier, and outputs a predetermined reset pulse when the power is turned on using the bias circuit and capacitor for the operational amplifier to reset the flip-flop. Reset circuit when ON.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10882488U JPH066626Y2 (en) | 1988-08-18 | 1988-08-18 | Reset circuit at power ON |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10882488U JPH066626Y2 (en) | 1988-08-18 | 1988-08-18 | Reset circuit at power ON |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0230642U true JPH0230642U (en) | 1990-02-27 |
| JPH066626Y2 JPH066626Y2 (en) | 1994-02-16 |
Family
ID=31344524
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10882488U Expired - Lifetime JPH066626Y2 (en) | 1988-08-18 | 1988-08-18 | Reset circuit at power ON |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH066626Y2 (en) |
-
1988
- 1988-08-18 JP JP10882488U patent/JPH066626Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH066626Y2 (en) | 1994-02-16 |
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