JPH0230906Y2 - - Google Patents

Description

[Detailed description of the invention] This invention relates to a muting circuit that prevents the output of noise from an output device such as a power amplifier of a tape recorder, and the invention relates to a muting circuit that prevents noise contained in an input signal to the output device from being output from the output device. The purpose is to reliably prevent output.

Generally, a muting circuit provided in a tape recorder or the like is effective against noise caused by the circuit in which the muting circuit is provided.
For example, in the case of a muting circuit provided for a power amplifier, pop noise that occurs when the amplifier is turned on and off is prevented from being output from the amplifier, but the muting circuit is triggered when the amplifier is turned on, that is, when the power is turned on. Since the muting circuit is driven only at the instant of input, if the beginning of the audio input signal to the amplifier contains noise, the muting circuit has already stopped operating, and the noise in the input signal is reduced. There is a drawback that the signal is amplified and output from the amplifier as it is.

By the way, the noise in the input signal is a low frequency component with a spectrum of 1 kHz or less that includes a DC component, while a significant audio signal is a high frequency component of 10 kHz or more in a spectrum that does not include a DC component. distinguishing the noise from the significant audio signal using a filter or the like;
Although a switch or the like is used to output only the significant audio signal from the power amplifier, since there is an operation time delay inherent to the filter, some of the noise may actually be reduced based on this delay. Therefore, it is not possible to reliably prevent the noise contained in the input signal to the amplifier from being output.

This invention was made with the above-mentioned points in mind, and includes an amplifying section that amplifies a part of the input signal to an output device such as a power amplifier of an audio device, and an output signal of the amplifying section and a reference signal. a comparison section that compares the output signal and outputs a detection signal when the output signal is smaller than the reference signal; a time constant capacitor into which the output signal of the comparison section is injected via a backflow prevention diode; a clear signal output section having a transistor to which a voltage is applied to the base and stops outputting the clear signal when the input signal shifts to an audio signal with a higher frequency than the noise signal; a counter that is reset by an input, counts the number of times the detection signal is input to the clock terminal after the input of the clear signal is stopped, and outputs a command signal until the count value reaches a predetermined value; and an input of the command signal. The present invention provides a muting circuit comprising: a relay that becomes inactive due to the inoperation; and a normally open relay contact that is provided in the output line of the output device and is turned off when the relay is inoperable.

Therefore, according to the muting circuit of this invention, when the input signal changes from noise to audio signal, the detection signal of the comparison section changes from low frequency to high frequency.

Due to this change, in the clear signal output section, the time constant capacitor shifts to a charged state, the transistor switches and is inverted, and output of the clear signal is stopped.

Furthermore, the counter operates by stopping the output of the clear signal, and after counting the detection signal a predetermined number of times, the counter command signal is no longer output, the relay shifts from non-operation to operation, and the relay contact is reversed from OFF to ON. , muting of the output device is canceled.

Therefore, when the input signal transitions from noise to an audio signal, muting is canceled after it becomes an audio signal, and the noise contained in the input signal to the output device is reliably output from the output device. It can be prevented.

Next, this invention will be explained in detail with reference to drawings showing one embodiment thereof.

In FIGS. 1 and 2, 1 is a power amplifier whose input terminal is connected to an audio signal generator via a first connection terminal 2, and an output device to which the audio signal of this generator is input; 3 is a power amplifier whose one end is A first resistor 4 is connected to the terminal 2 and the other end is grounded, 4 is a first capacitor for direct current removal whose one end is connected to the first connection terminal 2, and 5 is a first capacitor 4 whose one end is connected to the other end. A second resistor whose end is grounded, a third resistor 6 whose one end is connected to the other end of the first capacitor 4, and a numeral 7 whose inverting input terminal (-) is connected to the other end of the third resistor 6, which is connected to the other end of the third resistor 6, and which is connected to the other end of the first capacitor 4, and which is connected to the other end of the third resistor 6, which is connected to the other end of the first capacitor 4; A first operational amplifier (hereinafter referred to as an operational amplifier) consisting of an integrated circuit whose gain is adjusted so as to operate even when inputting, 8 has both ends connected to the inverting input terminal (-) and output terminal of the first operational amplifier 7. A fourth resistor 9 is a fifth resistor whose one end is connected to the non-inverting input terminal (+) of the first operational amplifier 7;
~The fifth resistors 6, 8, and 9 constitute an inverting amplifier circuit 10, and the first and second resistors 3, 5, the first capacitor 4, and the inverting amplifier circuit 10 constitute an amplifying section 11. A part of the audio signal is extracted and amplified to output an amplified signal.

12 is a sixth resistor, one end of which is connected to the output terminal of the first operational amplifier 7; 13, both ends of which are connected to the positive power supply terminal (+
B) and a variable resistor connected to the negative power supply terminal (-B), 14 has an inverting input terminal (-) and a non-inverting input terminal (+) connected to the other end of the sixth resistor 12 and the sliding piece of the variable resistor 13. A second operational amplifier consisting of a connected integrated circuit is adjusted so that the output becomes the voltage -Vb of the negative power supply terminal (-B) when the output of the first operational amplifier 7 is zero, and the sixth resistor 12, A comparison section 15 is configured by the variable resistor 13 and the second operational amplifier 14, and the amplified signal from the amplification section 11 is compared with a reference signal of a predetermined level determined by the variable resistor 13, and when the amplified signal is smaller than the reference signal, , a low level detection signal of voltage -Vb is output.

16 and 17 each have one end connected to the second operational amplifier 1
7th and 8th resistors connected to the output terminal of 4, 18
19 is a first diode for backflow prevention whose anode is connected to the other end of the eighth resistor 17; 19 is a second capacitor for a time constant whose one end is connected to the cathode of the first diode 18 and the other end is grounded; 20; is an NPN type first transistor whose collector is connected to the positive power supply terminal (+B) via the ninth resistor 21, whose base is connected to the cathode of the first diode 18, and whose emitter is grounded; 18, constitutes a clear signal output section together with the capacitor 19, and outputs the collector of the transistor 20 by inputting a detection signal at a predetermined time according to the time constant of the resistor 17 and the capacitor 19, such as after the device is powered on or after the end of the audio signal. Outputs a high level clear signal as a terminal.

22 is a second NPN transistor whose collector is connected to the other end of the seventh resistor 16 and whose emitter is grounded; 23 is a tenth resistor whose one end is connected to the base of the second transistor 22; and 24 is a cathode connected to the positive power supply. The anode is connected to the terminal (+B) and the seventh resistor 1
6, a third diode 25 whose cathode is connected to the anode of the second diode 24, whose anode is grounded, and which constitutes a clamp circuit 26 together with the second diode 24;
27 is a binary counter consisting of an integrated circuit, a clock terminal 27a is connected to the other end of the seventh resistor 16, a clear terminal 27b is connected to the collector of the first transistor 20, and a power supply terminal 27c is connected to the positive power supply terminal ( +B), and the output terminal 27d is connected to the other end of the tenth resistor 23, and the first and second transistors 20, 22, and the seventh to
10th resistor 16, 17, 21, 23, second capacitor 19, first to third diodes 18, 24, 25
and a counter 27 constitute a command section 28, the detection signal is input to a clock terminal 27a, the number of inputs of the detection signal from the comparison section 15 is counted, and the count value reaches a predetermined value, for example "4". Until then, a low level command signal is output from the output terminal 27d, and the count value reaches "4".
", the output terminal 27d becomes high level.

29 is the 11th resistor whose one end is connected to the output terminal 27d of the counter 27, and 30 is the 11th resistor 2 whose base is connected to the output terminal 27d of the counter 27.
NPN connected to the other end of 9 and the emitter is grounded.
The third transistor 31 of the type is a relay whose both ends are connected to the positive power supply terminal (+B) and the collector of the third transistor 30, and the eleventh resistor 29 and the third
A stop section 32 is configured by the transistor 30 and the relay 31, and the third transistor 30 is turned off while a low level command signal is input.
The relay 31 becomes inactive, and the second connection terminal 3 connected to the output terminal of the power amplifier 1 and the speaker etc.
The normally open relay contact 34 provided between the power amplifier 1 and the power amplifier 3 is kept off, and the output of the signal from the power amplifier 1 to the second connection terminal 33 is stopped.

Before a signal is input to the power amplifier 1, that is, when there is no signal, the output of the first operational amplifier 7 of the amplification section 11 is zero, so the output of the second operational amplifier 14 of the comparison section 15 is a detection signal of -Vb. is held, the first transistor 20 is turned off, and the positive power supply terminal (+
B) A high level clear signal of voltage +Vb is input, the counter 27 is reset and held, the output terminal 27d of the counter 27 is held at a low level command signal, and the second and third transistors 22, 3
0 turns off and relay 31 does not operate,
Relay contact 34 is turned off and the output of power amplifier 1 is maintained in a muting state.

Next, as shown in FIG. The amplified amplified signal is output, and the output level of the comparator 15 becomes voltage -Vb and voltage +Vb when the amplified signal falls below and exceeds the reference signal of a predetermined level set by the variable resistor 13, respectively.
As shown in FIG. 2, the output signal of the comparator 15 is inverted and converted into a pulse signal clamped to 0 to +Vb by the clamp circuit 26, and then output to the counter 2.
When the clear signal is turned off and the reset is canceled, the rise of the pulse signal as shown in FIG. 7 is counted by the counter 27 as the number of inputs of the detection signal.
When the count value reaches "4", the output terminal 27d becomes high level, and the second and third transistors 2
2 and 30 are turned on, the relay 31 is activated, the relay contact 34 is turned on, and muting is canceled.
A signal from the power amplifier 1 is outputted to a male speaker or the like via the relay contact 34 and the second connection terminal 33.

By the way, when noise as shown in FIG. Since the voltage drops below the predetermined level of the reference signal only about twice, the capacitor 19 is not charged to the ON level of the first transistor 20 while the noise is being output, and this transistor 20 is kept OFF. The counter 27 is reset, a low level command signal continues to be output from the output terminal 27d of the counter 27, and the relay contact 34 also remains off, and as the muting continues, the noise is input from the power amplifier 1 to the speaker etc. It will not be done.

Next, when the input signal of the power amplifier 1 shifts from the noise to a significant audio signal, the second capacitor 19 is repeatedly charged in short cycles due to the high frequency of this signal, and the first transistor 20 is charged repeatedly in short cycles.
is inverted to the on state, the clear terminal 27b of the counter 27 becomes low level, and the counter 27
The reset is canceled.

Then, the number of input pulses to the clock terminal 27a based on the audio signal reaches 4, and the counter 2
When the count value of 7 becomes "4", the output terminal 27
d is inverted from a low level to a high level, the command signal is turned off, the relay contact 34 is turned on, muting is canceled, and the audio signal amplified by the power amplifier 1 is supplied to a speaker or the like.

Further, when the input of the significant audio signal ends, the first transistor 20 is turned off at the same time as the discharge of the second capacitor 19 ends, and a high-level clear signal is input to the clear terminal 27b of the counter 27. is reset,
A low level command signal is output from the output terminal 27d, the relay 31 becomes inactive, and the relay contact 3
4 is off.

Therefore, according to the embodiment, the counter 2
The input signal to the power amplifier 1 can be distinguished into a significant signal and noise depending on whether the count value of the number of inputs of the detection signal from the comparison unit 15 by the comparison unit 7 reaches a predetermined value or not. It is possible to reliably prevent noise contained in the input signal to the power amplifier 1 from being outputted from the power amplifier 1 by using a device having an inexpensive configuration.

When the noise contained in the input signal to the power amplifier 1 has a higher frequency than the case shown in FIG. The output from the power amplifier 1 can be reliably prevented.

Note that the output device is of course not limited to the power amplifier 1.

[Brief explanation of the drawing]

The drawings show one embodiment of the muting circuit of this invention, with FIG. 1 being a block diagram, FIG. 2 being a detailed wiring diagram, and FIGS. 3a and 3b being diagrams for explaining the operation. DESCRIPTION OF SYMBOLS 1... Power amplifier, 11... Amplifying part, 15... Comparing part, 27... Counter, 27a... Clock terminal, 2
7b...Clear terminal, 31...Relay, 34...Relay contact.

Claims (1)

[Claims for Utility Model Registration] An amplification section that amplifies a part of an input signal to an output device such as a power amplifier of an audio device; an output signal of the amplification section is compared with a reference signal, and the output signal is determined as the reference signal. a comparison section that outputs a detection signal when the signal is smaller than the signal; a time constant capacitor into which the output signal of the comparison section is injected via a diode for preventing backflow; and a transistor to which the voltage of the capacitor is applied to the base. a clear signal output section that stops outputting a clear signal when the input signal shifts to an audio signal with a higher frequency than a noise signal; and a clear signal output section that is reset by inputting the clear signal to a clear terminal and outputs the clear signal. a counter that counts the number of times the detection signal is input to the clock terminal after the input of the relay stops, and outputs a command signal until the count value reaches a predetermined value; a relay that becomes inactive upon input of the command signal; A muting circuit comprising a normally open relay contact provided in an output line of an output device and turned off when the relay is not operated.