JPH0239272A - Function expressing system - Google Patents

Abstract

PURPOSE:To change a function block diagram into a logic circuit diagram with high working efficiency by using a function block information storing means, a polarity information storing means, a signal line tentative polarity setting means, and a polarity checking means. CONSTITUTION:The information on a function block is stored in a function diagram data storing part 4, and the information on a signal line is stored in a signal line data storing part 5. Then a polarity pattern that can be acquired by the input/output signals in case the logical conversion is applied to a function diagram is stored in a polarity data storing part 6. A polarity deciding 1 decides automatically the polarity of the signal line, and a user polarity designating part 2 designates the polarity with the key operation of a user when the polarity of the signal line becomes conflicting or uncertain at the part 1. A polarity control part 3 sets the signal line at the polarity designated by the part 2. A decided polarity data storing part 7 stores the polarities of the signal line decided by the parts 1-3 respectively. In such a constitution, a function block including the conflict is automatically detected and the polarity of each signal line can be decided with high efficiency. As a result, a function block diagram can be changed into a logic circuit diagram with high efficiency.

Description

[Detailed Description of the Invention] [Objective of the Invention] (Industrial Application Field) The present invention is a functional representation system used when converting a functional block diagram or a functional description into a logical circuit diagram in hardware design. Regarding.

(Prior Art) In recent years, tools for converting functional block diagrams or functional descriptions into logical circuit diagrams have been developed in hardware design.

By the way, signal lines (connections) in hardware have positive (+) polarity and negative (-) polarity.

Generally, the signal lines described at the functional level are of positive polarity, but at the logic level, signal lines of both polarities are mixed together. Therefore, when converting from a functional level to a logic level, it is necessary to consider the polarity of the signal line.

The conversion and synthesis tools currently being developed employ either of the following methods: (1) setting signal lines based on ten polarities, or (2) allowing the designer to determine the polarity of all signal lines.

For example, the logic circuit is configured so that only medium polarity appears on the signal line.

Or, when a designer performs dialog processing, the polarity of the signal line is set to 1, considering the configuration when converting the functional level to the logical level.
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(Problem to be solved by the invention) However, if all signal lines on the logic circuit diagram are set to + polarity, the number of elements such as inverters increases when actually assembling the circuit, and the number of elements (stages) through which the signal passes also increases. There is a problem in that the number of parts increases, so it takes a lot of time and effort to design.

The present invention has been made under these circumstances, and aims to provide a functional representation system that can efficiently convert a functional block diagram into a logical circuit diagram.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve this purpose, the functional expression system of the present invention has the following features:
functional block data storage means for storing data regarding the functional blocks; polarity data storage means for storing data indicating polarity patterns of input/output signals and control signals when the functional blocks are converted into logic circuits; a signal line low polarity setting means for setting temporary polarity;
and polarity verification means for detecting a functional block in which a contradiction occurs when the polarity of the board is set based on the polarity pattern.

(Function) The function representation system of the present invention has a function of temporarily setting the polarity of a signal line and automatically detecting a functional block in which a contradiction occurs. can make good decisions.

(Example) Hereinafter, details of an example of the present invention will be described based on the drawings.

FIG. 1 is a diagram showing the configuration of an embodiment of the present invention.

In the figure, 1 is a polarity determining unit that automatically determines the polarity of the signal line, and 2 is a user who specifies the polarity by the user's key operation when the polarity of the signal line becomes contradictory or undefined in the polarity determining unit 1. A polarity specifying section 3 is a polarity adjusting section that adjusts the signal line to the polarity specified by the user polarity specifying section 2.

Further, 4 is a functional diagram data storage section that stores data regarding functional diagrams (as shown in FIG. 2), 5 is a signal line data storage section that stores data regarding signal lines (as shown in FIG. 3), and 6
7 is a polarity data storage section that stores the polarity pattern (shown in FIG. 4) that the human output signal can take when the functional diagram is logically converted; This is a determined polarity data storage section that stores the determined polarity of the signal line.

FIG. 5 is a diagram showing a process of converting a functional block diagram into a logic circuit diagram using the system of this embodiment.

Note that here, a case is taken as an example in which a functional block diagram corresponding to a selector is converted into a logic circuit diagram.

In the figure, (a) is a functional block diagram of a three-man power, three-control, one-output selector, and (b) is a logic circuit diagram of the selector. And (C) shows the polarity of each signal line in the functional diagram and logic circuit diagram.

Here, the polarity of each signal line in the functional block diagram is determined without considering the relationship between the front and back, so all input/output signal lines have medium polarity.

Next, FIG. 6 shows an example in which the functional block diagram is logically converted by taking into account the relationship between the front and back.

In the same figure, is (a) a two-person system? A diagram showing an example of a functional diagram using three @1 output selectors, (b) is a logic circuit diagram obtained when considering only medium polarity signal lines at the functional diagram level, (C) is a functional diagram level The logic circuit diagram (d) obtained when it is assumed that the signal lines have positive and negative polarities is a summary of the polarities of each signal line.

Comparing (b) and (C), the number of passing elements (stages) and number of used elements are both smaller in (c), so logic conversion should be performed taking into account the polarity of the signal line at the functional diagram level. I know there is something I need to do.

FIG. 7 is a diagram showing the processing in the polarity determining section 1.

First, the polarities of the signal lines are tentatively determined (step 801), and it is checked whether there is any contradiction in the polarities of the signal lines tentatively determined on the functional block diagram (step 802).

The polarity of the signal line with no contradiction is set as the polarity of the signal line (step 803), and the polarity pattern of the functional block diagram is narrowed down based on this polarity (step 804).

Then, display the functional block and signal line in which the conflict has occurred (step 805), have the user decide the polarity pattern of the functional block (step 806), and adjust the polarity of the signal line connected to the functional block (step 805).
07).

FIG. 8 is a diagram showing an example of a process for temporarily determining the polarity of a signal line.

First, one of the signal lines whose polarity is not determined (hereinafter referred to as signal line A) is taken out (step 901).

Assuming that the signal line A has ten polarities, the number M1 of functional blocks in which contradiction occurs is determined (step 902).

Next, if it is assumed that the signal line A is unipolar, the number M2 of functional blocks in which a contradiction occurs is determined (step knob 903).

From these, the following four verification results are obtained for signal line A.

- The polarity of signal line A cannot be determined (10-no contradiction occurs with both polarities: step 904).

(2) Tentatively determine the polarity of the signal line A to ten polarities (step 905 because a contradiction occurred with the negative polarity).

- Temporarily determine the polarity of signal line A to be one polarity (step 906 because a contradiction occurred with + polarity).

■Cannot decide signal line A to either polarity (10-polarity)
Step 907 because a contradiction occurred in both polarities.
).

The process ends when the polarities of all signal lines are determined (step 908).

FIG. 9 is a diagram showing a method of checking whether there is a contradiction in the tentatively determined polarity.

First, one of the functional blocks (hereinafter referred to as functional block) is taken out (step 1001).

Next, it is checked whether any of the signal lines connected to functional block K match the polarity pattern of K (step 1002).

1 and the information of the signal line connected to it are left in the functional block (step 1003).

The operation of the system of this embodiment will be comprehensively explained.

First, the signal line A whose polarity has not been determined is taken out from the signal line data storage section 5 (however, if the polarity of all signal lines has been determined, the process ends).

If the signal line A is assumed to be depolar or unipolar,
The number Ml (+
polarity) and M2 (-polarity).

Depending on the values of M1 and M2, one of the following verification results can be obtained for signal line A.

At the time of 0M1-0 and M2-0, the polarity of the signal line A is undefined.

(2) When M1-0, M2≠0, the polarity of the signal line A is ten polarity.

When 0M1≠0 and M2-0, the polarity of the signal line A is unipolar.

When 0M1≠0 and M2≠0, the polarity of the signal line A is unipolar.

The polarization determined here is stored in the signal line data storage section 5, and the above procedure is repeated until the signal line is searched through -.

Once the tentative determination is made, it is checked whether there are any inconsistencies in the tentatively determined signal lines. That is, one of the temporarily determined polarity patterns for the functional block is retrieved from the polarity data storage section 6 and compared with the polarity and polarity of the signal line connected to the functional block K.

If a matching polarity pattern exists, the next functional block is extracted. If there is no matching polarity pattern, information on the signal line connected to that functional block is left.

The above process is repeated until all functional blocks have been searched.

If the polarity can be determined to either ten polarity or - polarity without causing any contradiction, that polarity is determined as the polarity of the signal line.

Then, the polarity patterns of the functional blocks are narrowed down based on the determined polarity of the signal line (polarity patterns that do not match the polarity of the signal line are deleted). If there is no signal line that can be tentatively determined, information on the signal line of the functional block where the conflict has occurred is displayed.

In this case, the user determines the polarity pattern of the functional block, thereby adjusting the polarity of the signal line connected to the functional block, and storing it in the signal line data storage section 5.

The above process is repeated until the polarities of all signal lines are determined.

In this way, the system of this embodiment automatically determines the polarity of the signal line, and inquires of the designer when the polarity of the signal line cannot be automatically determined, so the designer can determine the polarity of all signal lines. There is no need to decide.

[Effects of the Invention] As explained above, according to the system of the present invention, the number of elements (inverters) used in the logic circuit is reduced, and the number of elements (stages) through which signals pass in the logic circuit is reduced.
As a result, design can be carried out efficiently.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the configuration of an embodiment of the present invention, Fig. 2 is a diagram showing an example of functional diagram data, Fig. 3 is a diagram showing an example of signal line data, and Fig. 4 is an example of polarity data. Figure 5 showing
The figure shows the process of converting a functional block diagram into a logic circuit diagram, Figure 6 shows an example of converting a functional block diagram into a logic circuit diagram taking into account the relationship between the front and back, and Figure 7 shows the polarity determining section. FIG. 8 is a diagram showing an example of the process of tentatively determining the polarity of a signal line, and FIG. 9 is a diagram showing the process of checking whether there is a contradiction in the tentatively determined polarity. 1... Polarity determining section, 2... User polarity specifying section, 3.
...Polarity adjustment section, 4...Function diagram data storage section, 5...
- Signal line data storage section, 6...Polarity data storage section, 7
...determined polarity data storage section. Applicant Toshiba Corporation Patent Attorney Su Yama Sa - Tsuru 1 Ward Figure 3 Figure 2 @ Figure 4 E I213 (.) Hi-Neng (b) Logic (Circuit) Diagram Party 5 Figure Peng 7 Figure 6 Figure 8 Proceedings Amendment (Voluntary) April 6, 1999
Name of invention No. 63-191555 Relationship with the case of the person who amends the functional expression system / Patent applicant Toshiba Corporation Agent 2-1 Kanda Tamachi, Chiyoda-ku, Tokyo 101 (1) Specification Column 6 of "Detailed Description of the Invention", Contents of Amendment (1) "-Polarity" on page 9, line 18 of the specification is corrected to "contradiction".

Claims (1)

[Claims] (1) Functional block data storage means for storing data related to functional blocks; polarity data storage means for storing data indicating polarity patterns of input/output signals and control signals when the functional blocks are converted into logic circuits; A signal line temporary polarity setting means for setting a temporary polarity of a signal line, and a polarity verification means for detecting a functional block that causes a contradiction when the temporary polarity is set based on the polarity pattern. Features a functional expression system.