JPH0241204B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a noise limiting circuit, and more particularly to a noise limiting circuit that limits and eliminates small amplitude noise components contained in a signal.

2. Description of the Related Art Conventionally, there have been noise limiting circuits that limit and eliminate small amplitude noise contained in a signal. FIG. 4 shows a circuit diagram of an example of a conventional circuit. In the figure, a signal entering terminal 1 is amplified by amplifier 2 and taken out via diodes D ₁ and D ₂ connected in parallel in opposite directions between output terminals 3 and 4 of amplifier 2. . Terminal 4 is grounded via load resistor _R1 . The forward voltage of diodes D ₁ and D ₂ is approximately
Conducts when the voltage exceeds 0.6V. As a result, the output signals of the amplifier 2 are cut off from positive and negative signals up to about 0.6V, and signals of about 0.6 or more are outputted between positive and negative sides.

Problems to be Solved by the Invention Generally, the amplification degree of the amplifier 2 in the above circuit needs to be very large. This is the peak-to-peak noise voltage of the output of amplifier 2, which is to be cut off.
This is because the peak value must be approximately twice the forward conduction voltage of the diode _D1 or _D2 , and if the amplification degree of the amplifier 2 is small, even the low level components of the necessary signal will be cut off. This is because For example, if the forward conduction voltage of diodes D ₁ and D ₂ is 0.6V, and the input signal noise level is 10mV _PP for an input signal of 1V _PP , the output signal noise level must be 1.2V _PP . Not,
Therefore, the amplification degree of amplifier 2 is set to 120. The signal voltage at terminal 4 is therefore 120V _PP .
For this reason, the amplifier 2 requires a high power supply voltage, resulting in increased power consumption and deterioration of signal characteristics.Also, the amplifier 2 requires high-voltage transistors and the like used in subsequent circuits. The problem was that it was impossible to integrate the circuits.

Furthermore, assuming the DC potential between output terminal 3 and terminal 4 is the same, it is necessary to make the cutoff voltage by diodes D ₁ and D ₂ constant in both positive and negative directions with respect to the AC component of the signal. The problem is that the amplifier 2, which has a large amplification degree, generally has a large variation in its output DC potential, and requires DC offset adjustment.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a noise limiting circuit that solves the above problems by using a differential amplifier and first and second feedback circuits.

Means and action for solving the problem A differential amplifier that differentially amplifies a supplied input signal and a feedback signal, and a method that limits and removes a predetermined small amplitude component of the signal output from the differential amplifier. a first feedback circuit that feeds back the signal to the differential amplifier, and a second feedback circuit that extracts a DC component from the signal output from the differential amplifier and feeds it back to the differential amplifier.
The second feedback circuit is configured to obtain an output signal in which small-amplitude noise is limited and removed, and each embodiment thereof will be explained with reference to FIG. 1 and the following figures.

Embodiment FIG. 1 shows a circuit diagram of a first embodiment of the circuit of the present invention. In the figure, 10 is a terminal, into which, for example, a video signal is input. The output signal ei at terminal 10 is supplied to a non-inverting input terminal of differential amplifier 11. Diodes D ₃ and D ₄ and resistors R 2 and _{R 3} connected in series are connected between the output terminal 12 and the inverting input terminal of the differential amplifier 11.
Each is connected in parallel. The diodes D ₃ and D ₄ of the first feedback circuit are connected in opposite directions. Further, the connection point between the resistors R ₂ and R ₃ is grounded via the capacitor C ₁ to form a second feedback circuit, and the inverting input terminal of the differential amplifier 11 is connected to the terminal 13 .

In the above circuit, among the signals output from the output terminal 12 of the differential amplifier 11, the diodes D ₃ ,
Signals with voltages exceeding the forward conduction voltage (for example, 0.6V) of each of _D4 are negatively fed back at a feedback rate of about 1.
Therefore, a signal having approximately the same voltage as the signal voltage input to the terminal 10 appears at each of the output terminals 12 and 13. In addition, among the signals output from the output terminal 12, signals below the forward conduction voltage of the diodes D ₃ and D ₄ , that is, noise components, are the signals output from the diodes D ₃ and D ₄ .
blocked by.

Further, the AC component of the signal output from the output terminal 12 is bypassed by the capacitor _C1 , and the DC component is negatively fed back via the resistors _R2 and _R3 . For this reason,
The DC potentials across the output terminal 12 and terminal 13 of the differential amplifier 11, that is, the diodes D ₃ and D ₄ are always the same potential.

In this way, from the signal entering the terminal 10, a signal is extracted from the terminal 13 in which the small amplitude noise component based on the DC potential is limited and blocked. Since the maximum value of the signal voltage at the output terminals 12 and 13 of the circuit is about the same as that at the terminal 10, the power consumption of the circuit is small, there is no signal distortion, and the circuit can be integrated. Furthermore, since there is no need for offset adjustment, there is no need for man-hours.

In the circuit shown in the first diagram, an output signal eo corresponding to the input signal ei at the terminal 10 is taken out from the terminal 13.
This input/output voltage ratio (that is, the amplification degree of the circuit shown in the first diagram) changes depending on the level of the input signal ei, and the second
It becomes as shown by the solid line I in the figure. The amplification factor does not exceed 1. If the differential amplifier 11 exhibiting the characteristics shown by the solid line has an amplification degree μ ₁ , and the differential amplifier 11 has a smaller amplification degree μ ₂ , the input/output voltage ratio of the circuit shown in Figure 1 is as shown by the solid line in Figure 2. It becomes as shown in. By varying the amplification degree of the differential amplifier 11 in this way, it is possible to arbitrarily set the signal level at which the signal is regarded as noise and is blocked.

FIG. 3 shows a circuit diagram of a second embodiment of the circuit of the invention. In the figure, the same parts as in FIG. 1 are designated by the same reference numerals, and their description will be omitted. In FIG. 3, a resistor _R4 is provided in parallel with diodes _D3 , _D4, etc. between the output terminal 12 and the inverting input terminal of the differential amplifier 11. Due to this low resistance R ₄ , a portion of the signal output from the output terminal 12 that is lower than the forward conduction voltage of the diodes D ₃ and D ₄ is partially removed according to the ratio of the resistances R ₃ and R ₄ . and the rest is output from terminal 13. As a result, when the amplification degree of the differential amplifier 11 in FIG. 3 is _μ1 , the input/output voltage ratio becomes as shown by the solid line in FIG. 2. By varying the resistance value of the resistor _R4 , the input/output voltage ratio when the input signal ei is at a small level can be arbitrarily controlled. This makes it possible to limit and remove only a portion of the small amplitude components.

Effects of the Invention As described above, the noise limiting circuit according to the present invention includes a differential amplifier that differentially amplifies a supplied input signal and a feedback signal, and a predetermined small amplitude of the signal output from the differential amplifier. It consists of a first feedback circuit that limits and removes the DC component and feeds it back to the differential amplifier, and a second feedback circuit that extracts the DC component from the signal output from the differential amplifier and feeds it back to the differential amplifier. In order to obtain an output signal with small-amplitude noise limited and removed from the second feedback circuit, the power consumption of this noise limiting circuit is reduced, signal distortion does not occur, and the circuit can be integrated. , there is no need for offset adjustment, and by arbitrarily variably controlling the input/output voltage ratio of this noise limiting circuit for small amplitude components with the first feedback circuit, only a part of the small amplitude components can be controlled accordingly. It has features such as being able to remove restrictions.

[Brief explanation of drawings]

1 and 3 are circuit diagrams of each embodiment of the circuit of the present invention, FIG. 2 is a characteristic diagram of the circuit shown in FIGS. 1 and 3, and FIG. 4 is a circuit diagram of an example of a conventional circuit. 1, 4, 10, 13... terminal, 3, 12... output terminal, 11... differential amplifier, _D1 to _D4 ... diode, _R1 to _R4 ... resistor, _C1 ... capacitor.

Claims (1)

[Claims] 1. A differential amplifier that differentially amplifies a supplied input signal and a feedback signal; It consists of a first feedback circuit that feeds back to the differential amplifier, and a second feedback circuit that extracts a DC component from the signal output from the differential amplifier and feeds it back to the differential amplifier. A noise limiting circuit characterized by obtaining an output signal from a feedback circuit in which small amplitude noise is limited and removed. 2. The noise limiting circuit according to claim 1, wherein the first feedback circuit arbitrarily variably controls the input/output voltage ratio by varying the amount of feedback of the small amplitude component.