JPH0241664A - inverter device - Google Patents

Abstract

PURPOSE:To prevent the short circuit, etc., of a power supply by installing a malfunction preventive circuit converting the signal of an ON state into a signal turning both upper and lower arms of the same phase OFF when the signal of the ON state is output to the upper and lower arms each. CONSTITUTION:With an inverter device, an inverter section transistor(Tr) is composed of U-W phase transistors 1U-2W of each of the upper and lower arms, and a motor 3 is driven by the transistor(Tr). An inverter control circuit 7 and a short circuit preventive circuit 4 consisting of AND gates 5 and NOT gates 6 are mounted. Consequently, when an upper-arm U-phase base signal A and a lower-arm U-phase base signal B are both at a high level in the short circuit preventive operation of the U phase Tr, an upper-arm U-phase base signal A' output from the AND gate 5 for upper-arm U-phase is at a low level, and the upper-arm U-phase Tr 1U is not turned ON. Other each phase is operated similarly, and the simultaneous ON of the Trs of the upper and lower arms is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an inverter device for driving a motor.

[Conventional technology]

In a conventional inverter device, a control signal is supplied from an inverter control circuit to a transistor through a transistor base amplifier circuit. In addition, as a device with a short circuit prevention circuit, as described in Japanese Patent Application Laid-Open No. 62-95990,
It has been discussed that an external Hall element is used to control the inverter, and that malfunctions are prevented when this Hall element is not connected to the control circuit.

[Problem to be solved by the invention]

In the conventional technology, when the inverter control circuit is configured with an iC circuit such as a microprocessor, no consideration is given to malfunction of the transistors when the inverter control circuit malfunctions due to noise generated by the inverter device itself. , there was a risk that an erroneous signal would be sent to the inverter transistors, causing the upper and lower arm transistors to be turned on at the same time, resulting in a power short circuit.

An object of the present invention is to prevent an inverter control circuit from malfunctioning [means for solving the problem].

A malfunction prevention circuit is installed between the inverter control circuit and the transistor-based amplifier circuit, which converts a signal that turns both the upper and lower arm transistors off when a signal that turns both the upper and lower arm transistors on is output to the lower arm. This is achieved by providing

[Effect]

The malfunction circuit provided between the inverter control circuit and the transistor base amplifier circuit is activated only when the inverter control circuit outputs a signal that turns on the upper and lower arm transistors of the same phase. , the lower arm transistors are both turned off, so the upper and lower transistors of the same phase are turned on at the same time, preventing a short-circuited power supply. This will be explained using a time chart. A time chart is shown in Figure 2.

The signal of the upper arm transistor, which is the output of the malfunction prevention circuit, is the inverted signal of the upper arm transistor base signal (A signal) and the lower arm transistor base signal (B signal).
This is the AND signal. The signal of the lower arm transistor is a signal obtained by ANDing a signal obtained by inverting the upper arm transistor base signal (signal A) and a lower arm transistor base signal (signal B). Here, the relationship between each signal in each period ① to ② will be explained.

In period I, since both the A signal and the B signal are inverted, both the A signal and the B signal become H.

Therefore, the output from the malfunction prevention circuit, which is the upper arm transistor signal, becomes L because it is the AND result of the A signal and the B signal. Similarly, the output from the IL circuit during malfunction, which is the lower arm transistor signal, also becomes .

During period ■, the A signal is H and the B signal is L, so
The A signal becomes high, and the B signal becomes H. Therefore, the upper arm transistor signal becomes H, and the lower arm transistor signal becomes L.

During period ■, the A signal is high and the B signal is H, so
The A signal becomes H and the B signal becomes L. Therefore, the upper arm transistor signal becomes L, and the lower arm transistor signal becomes H. As described above, when the A signal and the B signal are not at H level, the same signal as each signal is output from the malfunction prevention circuit.

In period IV, if both A signal and B signal are I], A
Both the signal and the B signal become I7, and the upper arm transistor signal and the lower arm transistor signal both become .

Therefore, only when the upper and lower arm transistors are turned on at the same time, the malfunction prevention circuit converts and outputs a signal that turns both the upper and lower arms off, thereby preventing power supply short circuits, etc. can.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, IU is an upper arm U-phase transistor;
1v is the upper arm V-phase transistor, IW is the upper arm W-phase transistor, 2U is the lower arm U-phase transistor, 2■
2W is a lower arm V-phase transistor, and 2W is a lower arm W-phase transistor, which constitute an inverter section transistor. 3 is a motor, which is driven by an inverter device. An inverter control circuit 7 supplies signals to the inverter transistors 1tJ to IW and 2U to 2W. 5 is an AND gate, and 6 is an N O'I'' gate. 4 is a short circuit prevention circuit composed of an AND gate 5 and a NOT gate 6. A is an upper arm U-phase base signal;
B is the lower arm U-phase base signal, C is the upper arm V-phase signal,
D is a lower arm V-phase base signal, E is an upper 1s W-phase base signal, and F is a lower arm W-phase base signal, which are output from the inverter control circuit 7.

A' to F' are the outputs from the short circuit prevention circuit 4 for A to F.

In the illustration, the short-circuit prevention operation of the U-phase transistor will be explained. Upper arm (upper arm t J-phase base signal A that turns the J-phase transistor IU on is high, and a signal that turns it off is low. Lower arm U
The same applies to phase base signals.

When the upper arm U-phase base signal A and the lower arm U-phase base signal B are both high, the upper arm U-phase base signal A is given to the AND gate 5 for the upper arm U-phase as it is high, Lower arm U phase base signal B is N for upper arm U phase
O"1' is inverted by the gate 6 and given as low. Therefore, the upper arm U phase base signal A' output from the AND gate 5 for the upper arm U phase becomes low, and the base of the upper arm U phase transistor IU becomes low. The lower arm U phase A N +, ) gate 5 is supplied with the −t arm U phase base signal B as high, and the upper arm tJ phase base signal A is lower arm A%tJ. It is inverted by the phase NOT gate 6 and provided as a low signal.

Therefore, N A N 1. for upper arm U phase. ) gate 5
The lower arm AsU phase base signal B' outputted from the lower arm As U phase base signal B' becomes low, and the base of the lower arm tJ phase transistor 2U becomes low, so it is not turned on. As a result, the upper arm U-phase transistor ]U and the lower arm U-phase transistor 2U are not turned on at the same time, thereby preventing a power supply short circuit.

When the upper arm U-phase base signal A is high and the lower arm U-phase base signal is low, the upper arm (J-phase base signal A
' becomes high, the base signal B' for the lower arm U phase output from the gate 5 becomes low, and the upper arm U phase transistor IU turns on.
Since the lower arm U-phase transistor 2U is turned off, normal operation can be performed.

In addition, the upper arm U phase base signal A is low, and the lower arm U
When phase base signal B is high, A for upper arm TJ phase
Upper arm U-phase base signal A output from ND gate 5
' becomes low, and the lower arm [l phase base signal output from gate 5 becomes high, the upper arm U-phase transistor IU turns off, and the lower arm U-phase transistor 2U turns on. Therefore, normal operation can be performed.

Similarly, for the (2) and W phases, the transistors in the (2) and lower arms can be prevented from being turned on simultaneously, so no current short circuit occurs.

〔Effect of the invention〕

According to the present invention, it is possible to prevent a power supply short circuit due to a malfunction of an inverter control circuit, so there is an effect that a new safety function is added to an inverter device.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an inverter device according to an embodiment of the present invention,
FIG. 2 is a time chart of the operation of the control circuit of FIG. 1. IU...Upper arm U phase transistor, 2U...Lower arm tJ phase transistor, 3...Motor, 4...Short circuit prevention circuit, 7...Inverter control circuit.

Claims (1)

[Claims] 1. In a motor drive device comprising a transistor for supplying current to the motor and an inverter control circuit for outputting a control signal to the transistor, a transistor short circuit prevention circuit is provided between the inverter control circuit and the transistor base amplifier circuit. An inverter device characterized by: