JPH0241894Y2 - - Google Patents
Info
- Publication number
- JPH0241894Y2 JPH0241894Y2 JP1983170594U JP17059483U JPH0241894Y2 JP H0241894 Y2 JPH0241894 Y2 JP H0241894Y2 JP 1983170594 U JP1983170594 U JP 1983170594U JP 17059483 U JP17059483 U JP 17059483U JP H0241894 Y2 JPH0241894 Y2 JP H0241894Y2
- Authority
- JP
- Japan
- Prior art keywords
- glass substrate
- display
- connection end
- lead frame
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Electric Clocks (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Description
【考案の詳細な説明】
本考案は主にデジタル時計等に使用される
VFD、プラズマ、EL、等のガラス基板を採用し
た表示素子回路基板に関するものである。従来に
於いては第１図に示す如くガラス基板１，２から
成るVFD等の表示素子３と、電子回路４を配設
したプリント基板５とを別体にて構成し、該表示
素子３とプリント基板５とをリードフレーム６に
て半田付け７するものであり、余分にスペースを
とるため表示装置の小型化、薄型化が難かしく、
大嵩となる等の欠点があつた。[Detailed explanation of the invention] This invention is mainly used for digital watches, etc.
It relates to display element circuit boards that use glass substrates for VFD, plasma, EL, etc. Conventionally, as shown in FIG. 1, a display element 3 such as a VFD made of glass substrates 1 and 2 and a printed circuit board 5 on which an electronic circuit 4 is arranged are constructed separately, and the display element 3 and The printed circuit board 5 is soldered 7 to the lead frame 6, which takes up extra space, making it difficult to make the display device smaller and thinner.
It had drawbacks such as being bulky.
本考案はこれらの点に鑑みなされたもので、特
に従来技術のプリント基板５の削除による製品の
コストダウン、及び表示素子回路基板の小型化、
薄型化を達成せしめたものであり、以下に図示の
実施例に基づきその内容について説明する。 The present invention was developed in view of these points, and in particular, reduces the cost of the product by eliminating the printed circuit board 5 of the conventional technology, and miniaturizes the display element circuit board.
This has achieved a reduction in thickness, and the details thereof will be explained below based on the illustrated embodiments.
第一の実施例（第２図）について。Regarding the first embodiment (Fig. 2).
１１は表示素子本体であり、表示側ガラス基板
１２と裏側ガラス基板１３とを低融点ガラス、又
はエポキシ等から成るシーリング材１４でもつて
結合してある。 Reference numeral 11 denotes a display element main body, in which a display side glass substrate 12 and a back side glass substrate 13 are bonded together with a sealing material 14 made of low melting point glass, epoxy, or the like.
前記裏側ガラス基板１３の表面１５及び裏面１
６には導電膜１７Ａ及び１７Ｂ（AgPb，In2O3，
SnO2等）を蒸着法、スパツタリング、導体ペー
スト印刷等により夫々適宜配設してあり、夫々内
部回路部１８と外部回路部１９とを形成してあ
る。 Front surface 15 and back surface 1 of the back side glass substrate 13
6 has conductive films 17A and 17B (AgPb, In 2 O 3 ,
SnO2 , etc.) are appropriately disposed by vapor deposition, sputtering, conductor paste printing, etc., to form an internal circuit section 18 and an external circuit section 19, respectively.
２０は前記内部回路部１８と外部回路部１９と
を接続する為の略〓形状の弾力性を有するリード
フレーム端子（42アロイ等を採用している）であ
り、他方の接続端部２３の長さを、一方の接続端
部２１の長さよりも略長目に採つて、裏側ガラス
基板１３の表面１５上の奥所にある内部回路部１
８に届くように成してある。 Reference numeral 20 denotes a lead frame terminal (made of 42 alloy or the like) having elasticity and approximately a square shape for connecting the internal circuit section 18 and the external circuit section 19, and the length of the other connecting end 23 is The internal circuit section 1 located deep on the surface 15 of the back glass substrate 13
It is designed to reach 8.
一方の接続端部２１は前記外部回路部１９の一
部を構成する処の導電膜１７Ｂの一部に半田２２
等によつて熱溶着してある。 One of the connection ends 21 has a solder 22 attached to a part of the conductive film 17B that constitutes a part of the external circuit part 19.
It is heat welded by etc.
又、他方の接続端部２３は内部回路部１８の一
部を構成する処の導電膜１７Ａに圧接してある。
２４はIC回路であり、リード端子２５を導電膜
１７Ｂ間に半田付け２６してある。 The other connecting end 23 is in pressure contact with a conductive film 17A that constitutes a part of the internal circuit section 18.
24 is an IC circuit, and lead terminals 25 are soldered 26 between conductive films 17B.
次に叙上の如き構成より成る本考案の作用につ
いて説明する。 Next, the operation of the present invention constructed as described above will be explained.
先づ、裏側ガラス基板１３の側面に略Ｌ字型の
リードフレーム端子２０を挿入し、該裏側ガラス
基板１３の裏面１６に配設した外部回路部１９の
導電膜１７Ｂとリードフレーム端子２０の接続端
部２１とを半田２２等にて溶着する。 First, a substantially L-shaped lead frame terminal 20 is inserted into the side surface of the back glass substrate 13, and the lead frame terminal 20 is connected to the conductive film 17B of the external circuit section 19 disposed on the back surface 16 of the back glass substrate 13. The end portion 21 is welded with solder 22 or the like.
一方、裏側ガラス基板１３の表面１５の内部回
路部１８である導電膜１７Ａとリードフレーム端
子２０の接続端部２３とを圧接し、該外部回路部
１９と導通せしめる。 On the other hand, the conductive film 17A, which is the internal circuit section 18 on the front surface 15 of the backside glass substrate 13, and the connection end section 23 of the lead frame terminal 20 are brought into pressure contact with each other to establish electrical continuity with the external circuit section 19.
従つて、リードフレーム端子２０の弾性復元力
によつて内部回路部１８と接続端部２３とは圧接
することとなる。 Therefore, the internal circuit portion 18 and the connection end portion 23 are brought into pressure contact with each other due to the elastic restoring force of the lead frame terminal 20.
第二の実施例（第３図）について。 Regarding the second embodiment (Fig. 3).
本実施例に於いて第一の実施例と同じ部分には
同じ番号を附してある。 In this embodiment, the same parts as in the first embodiment are given the same numbers.
本実施例の特徴は前記リードフレーム端子２０
の接続端部２１にばね性を附与すべく適宜折曲形
成し、該リードフレーム端子２０をばね方式にて
内部回路部１８と外部回路部１９とに挟持圧接せ
しめた点にある。 The feature of this embodiment is that the lead frame terminal 20
The connecting end 21 of the lead frame terminal 20 is bent as appropriate to impart spring properties, and the lead frame terminal 20 is clamped and pressed into contact with the internal circuit section 18 and the external circuit section 19 using a spring method.
従つて、裏側ガラス基板１３の側面から内方
へ、ばね性を附与したリードフレーム端子２０を
挿入し、裏側ガラス基板１３の導電膜１７Ａと１
７Ｂ同志を挟持して内部回路部１８と外部回路部
１９とを導通接続するものである。 Therefore, the lead frame terminal 20 with spring properties is inserted inward from the side surface of the back glass substrate 13, and the conductive films 17A and 1 of the back glass substrate 13 are connected to each other.
The internal circuit section 18 and the external circuit section 19 are electrically connected by sandwiching the comrades 7B.
而して、第一及び第二の実施例に示した如く本
考案では、弾力性を有するリードフレーム端子２
０の略長目の接続端部２３を、表示側ガラス基板
１２によつて覆い隠されて見えない裏側ガラス基
板１３表面１５上の奥所にある内部回路部１８に
点圧接すべく成したので、表面１５上の表示側ガ
ラス基板１２によつて見え難い隘路での半田付作
業が不要となり、少なくとも片方のみの半田付作
業のみで済み、その導通も確実なものとなり、小
型化薄型化にも適する効果がある。 Therefore, as shown in the first and second embodiments, the present invention uses a lead frame terminal 2 having elasticity.
The substantially long connection end 23 of 0 is made to be in point pressure contact with the internal circuit section 18 located deep on the surface 15 of the back glass substrate 13, which is hidden and hidden by the display side glass substrate 12. The display-side glass substrate 12 on the front surface 15 eliminates the need for soldering work in difficult-to-see corners, and only requires soldering work on at least one side.The conduction is also ensured, and it also facilitates miniaturization and thinning. It has a suitable effect.
第１図は従来技術に於ける要部の縦断側面図、
第２図乃至第３図は本考案を示し、第２図は第一
の実施例を示す要部の縦断側面図、第３図は同じ
く本考案の第二の実施例を示す要部の縦断側面図
である。
１２……表示側ガラス基板、１３……裏側ガラ
ス基板、１７Ａ，１７Ｂ……導電膜、２０……リ
ードフレーム端子。
Figure 1 is a vertical side view of the main parts in the conventional technology.
Figures 2 and 3 show the present invention, Figure 2 is a longitudinal cross-sectional side view of the main part showing the first embodiment, and Figure 3 is a longitudinal cross-section of the main part showing the second embodiment of the invention. FIG. 12... Display side glass substrate, 13... Back glass substrate, 17A, 17B... Conductive film, 20... Lead frame terminal.
Claims (1)
とを適宜間隙を隔ててシーリング材１４にて結
合重合せしめると共に、該裏側ガラス基板１３
の表面１５及び裏面１６に夫々内部回路部１８
及び外部回路部１９を設ける一方、弾力性を有
するリードフレーム端子２０の接続端部２１と
該接続端部２１よりも略長目の接続端部２３と
によつて、前記両回路部１８，１９を該裏側ガ
ラス基板１３の縁部から挟持接続せしめ、該接
続端部２３を裏側ガラス基板１３の表面１５上
であつて、前記表示側ガラス基板１２によつて
覆い隠された奥所の内部回路部１８の一部分に
点圧接すべく成したことを特徴とする蛍光表
示、プラズマ表示等の表示素子回路基板。 (2) 実用新案登録請求の範囲第１項の記載に於い
て、リードフレーム端子２０の接続端部２１を
外部回路部１９に半田等で熱溶着すると共に、
接続端部２３を内部回路部１８に圧接せしめた
蛍光表示、プラズマ表示等の表示素子回路基
板。 (3) 実用新案登録請求の範囲第１項の記載に於い
て、リードフレーム端子２０の接続端部２１に
ばね性を附与すべく適宜折曲形成し、外部回路
部１９と内部回路部１８とを挟持接続すべく成
した蛍光表示、プラズマ表示等の表示素子回路
基板。[Scope of claims for utility model registration] (1) Display side glass substrate 12 and back side glass substrate 13
are bonded and superposed with a sealing material 14 with an appropriate gap between them, and the back glass substrate 13
An internal circuit section 18 is provided on the front surface 15 and back surface 16 of the
and an external circuit section 19, while the connection end section 21 of the lead frame terminal 20 having elasticity and the connection end section 23, which is substantially longer than the connection end section 21, connect both the circuit sections 18, 19. are sandwiched and connected from the edge of the back glass substrate 13, and the connecting end 23 is connected to the inner circuit on the surface 15 of the back glass substrate 13 and hidden by the display side glass substrate 12. A display element circuit board for a fluorescent display, a plasma display, etc., characterized in that it is brought into point pressure contact with a portion of the portion 18. (2) In the description of claim 1 of the utility model registration claim, the connection end 21 of the lead frame terminal 20 is thermally welded to the external circuit part 19 with solder or the like,
A display element circuit board for fluorescent display, plasma display, etc., in which the connecting end 23 is pressed against the internal circuit section 18. (3) In the description of claim 1 of the utility model registration claim, the connection end 21 of the lead frame terminal 20 is bent as appropriate to impart spring properties, and the external circuit portion 19 and the internal circuit portion 18 are bent as appropriate. A display element circuit board for fluorescent displays, plasma displays, etc., which is designed to sandwich and connect the
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17059483U JPS6078188U (en) | 1983-11-02 | 1983-11-02 | Display element circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17059483U JPS6078188U (en) | 1983-11-02 | 1983-11-02 | Display element circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6078188U JPS6078188U (en) | 1985-05-31 |
| JPH0241894Y2 true JPH0241894Y2 (en) | 1990-11-08 |
Family
ID=30372378
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17059483U Granted JPS6078188U (en) | 1983-11-02 | 1983-11-02 | Display element circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6078188U (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4670855B2 (en) * | 2007-11-08 | 2011-04-13 | セイコーエプソン株式会社 | Display device and clock |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5626487A (en) * | 1980-01-21 | 1981-03-14 | Futaba Denshi Kogyo Kk | Bothhside wiring board |
| JPS5895890A (en) * | 1981-12-01 | 1983-06-07 | 富士通株式会社 | Both-side printed board |
| JPS58164179A (en) * | 1982-03-25 | 1983-09-29 | 日本精機株式会社 | Connecting structure of conductive part to other electric part |
-
1983
- 1983-11-02 JP JP17059483U patent/JPS6078188U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6078188U (en) | 1985-05-31 |
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