JPH0242178B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit photometric circuit;
In particular, a photoelectric conversion element such as a photodiode (SPD) or a phototransistor is used, and the electrical signal (photocurrent) converted by the photoelectric conversion element is amplified by a high input impedance operational amplifier (hereinafter referred to as an operational amplifier), and The present invention relates to a photometry circuit that measures the amount of photocurrent by logarithmically compressing the photocurrent using a feedback diode and measuring the logarithmically compressed voltage.

FIG. 1 shows an example of a conventional photometric circuit using a logarithmic compression circuit. In the figure, Q ₁ is a photoelectric conversion element such as SPD, Q ₂ and Q ₂ ' are the inputs of the operational amplifier 100,
This is a feedback diode for logarithmic compression connected between the outputs. Further, 100 is an operational amplifier circuit, which is composed of transistors Q ₃ to Q ₈ , constant current sources I ₁ to _{I 3} , and capacitor C ₁ , and MOS-FETs Q ₃ and Q ₄ are used in the operational amplifier input section to achieve high input impedance. This is what I did. These transistors Q ₃ and Q ₄ are usually P-channel MOS-
FET is used. Further, Q ₅ and Q ₆ are constant current loads for setting the voltage gain in the first stage, Q ₇ is an operational amplifier in the second stage whose load is the constant current source I ₂ , and Q ₈ is an output transistor for impedance conversion. Also
Vref is a reference voltage for bias voltage setting.

The general operation of the conventional circuit is as follows.

The optical signal irradiated to the photoelectric conversion element Q ₁ is photoelectrically converted into a photocurrent, but the photocurrent I _P flowing through this conversion element Q ₁ is normally negligible because the input current of the operational amplifier 100 is on the order of picoamperes. ,
Flows into the compression diode Q ₂ . As a result, for diode Q ₂ , V _BE2 = kT/q lnI _P /I _S (where k: Boltzmann's constant, T: absolute temperature,
I _S :Diode saturation current). As a result, the photocurrent I _P is generated as a voltage logarithmically compressed by the compression diode Q ₂ at the operational amplifier output (emitter of the transistor Q ₈ ), and becomes the output voltage Vo of this circuit.
This output voltage Vo is expressed by the following equation (1).

Vo = Vref + V _BE2 = Vref + kT / q lnI _P /I _S ...... (1) Therefore, in order to increase the signal output of the compressed voltage for the same photocurrent, connect diodes in series in multiple stages and change the photocurrent I _P. It is necessary to increase the signal amplitude of the output voltage Vo. For this reason, in devices that require a high S/N ratio and devices that handle minute signal voltages (such as cameras), it is desirable, and often the case, to have a multi-stage compression diode configuration, such as a two-stage configuration.

However, in this case, for devices that use a battery and can only use a low power supply voltage (1.5V to 3V), the minimum operating power supply voltage is limited by the circuit system of the output circuit of the operational amplifier circuit 100. That is, since the operational amplifier output voltage increases by connecting diodes in multiple stages, it is necessary to increase the potential difference between the + power supply and the operational amplifier output as the output dynamic range of the operational amplifier. Minimum operating power supply voltage in the conventional circuit shown in Figure 1
When compression diodes are connected in multiple stages, Vccmin is expressed by the following formula.

Vccmin=Vo+V _BE(8) +V _CE(I2) =Vref+n・kT/q l
nI _P /I _S +V _BE(8) +V _CE(I2) ......(2) (where n: number of compression diode stages) Therefore, how many stages of compression diode can be increased to improve S/N? Required operating voltage V _BE(8) + between supply voltage V _CC and operational amplifier output Vo
It is determined by how much you can lower V _{CE (I2)} and widen the output dynamic range.

Considering these points, the conventional circuit is limited by the base-to-emitter voltage _VBE of the emitter follower transistor _Q8 , and Vref≒500
In the case of mV, the minimum operating power supply voltage Vccmin of a normal two-stage compression diode is limited to 2.5 to 2.6V.

In accordance with the detection voltage level required in the photometric circuit as described above, the present invention uses a logarithmic compression circuit with only one stage, which is normally used, but by connecting compression diodes in multiple stages in series, so that the detection voltage level can be adjusted for a constant photocurrent value. The purpose of this invention is to provide a particularly effective means for increasing the compressed voltage output when the power supply voltage is low and operation at the low voltage is required, such as in batteries for camera ICs, etc. .

That is, the present invention uses a level shift circuit with a composite connection of an emitter follower NPN transistor and an emitter follower PNP transistor in the output circuit of the operational amplifier so as to suppress the phase rotation of the signal within the operational amplifier. By configuring the signal dynamic range between the operational amplifier output and the power supply voltage Vcc to be determined only by V _{CE (4)} without reducing the input impedance seen from the _Q7 collector output), multi-stage compression can be achieved. It is an object of the present invention to provide a semiconductor integrated circuit photometry circuit that can ensure stable operation and reduce the minimum operating power supply voltage even in the case of a diode.

FIG. 2 shows a semiconductor integrated circuit photometric circuit according to an embodiment of the present invention.

In FIG. 2, transistors Q ₁ to Q ₈ and current sources I ₁ to I ₃ are the same as the conventional circuit shown in FIG. 1.

In this embodiment, the emitter follower stage, which in the conventional circuit was composed of only the transistor Q ₈ , is replaced with the npn transistor Q ₈ and the pnp transistor Q ₉ shown in the figure.
and a level shift circuit 2 consisting of constant current sources I ₃ and I ₄
The feature is that it is configured with 00.

The circuit operation of this embodiment is the same as that described in the conventional circuit, but the level shift circuit 200 converts the operational amplifier output (emitter output of transistor Q ₉ ) into
The voltage required for _circuit operation _between
0.2V), the limitation on the number of stages in which compression diodes are connected in multiple stages due to the narrow output dynamic range of the operational amplifier 100 has been improved.

In other embodiments of the invention, the transistor
By connecting a diode in series with the level shift circuit composed of Q ₈ , Q ₉ and constant current sources I ₃ and I ₄ , the compression diode can be used without affecting the circuit configuration of the first and second stages of the operational amplifier. Level shifting is possible according to the number of stages.

In addition, in the present invention, considering the semiconductor integrated circuit,
In other words, considering that the current amplification rate h _fe of the pnp transistor in the IC cannot be very high, a level shift circuit with high input impedance and low output impedance is constructed using the composite connection of the above npn transistor and pnp transistor. However, pnp
If the h _fe (grounded emitter current amplification factor) of the transistor is high, or even if the h _fe of the PNP transistor is low, the load effect on the second stage output (collector output of transistor _Q7 ) and the influence of offset voltage on the first stage etc. An emitter follower configuration using a pnp transistor is also included within the scope of the present invention, if it can be ignored.

As described above, according to the present invention, by adding a level shift circuit based on a composite connection of npn transistors and pnp transistors to the output circuit of a high input impedance operational amplifier, the power supply
Since the required operating voltage between the operational amplifier outputs is lowered, the power supply voltage can be lowered, and logarithmic compression diodes can be connected in multiple stages.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional semiconductor integrated circuit photometric circuit, and FIG. 2 is a circuit diagram of a semiconductor integrated circuit photometric circuit according to an embodiment of the present invention. Q ₁ ... photoelectric conversion element, 100 ... operational amplifier,
Q ₂ , Q ₂ '...logarithmic compression diode (logarithmic compression circuit), 200...level shift circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1. A photoelectric conversion element that converts an optical signal into an electric signal, and an operational amplifier that converts a current signal of the photoelectric conversion element into a voltage signal and amplifies it, and an anode and a cathode of the photoelectric conversion element. A logarithmic compression circuit connected between two inputs, a non-inverting input and an inverting input of the operational amplifier, and comprising a single or a plurality of diodes connected in series between the inverting input and the output of the operational amplifier, converts the photoelectric conversion element into a logarithmic compression circuit. In a photometric circuit that logarithmically compresses the photocurrent and converts it into voltage, the output stage of the operational amplifier is a pnp transistor,
1. A semiconductor-integrated photometric circuit comprising a plurality of connected emitter follower circuits using npn transistors, and level-shifting an output voltage using the output stage.