JPH0243715A - Manufacture of grain boundary insulating type semiconductor porcelain substrate - Google Patents

Abstract

PURPOSE:To make it possible to have a plurality of capacitors built-in in an electrically isolated state by a method wherein the component for a specific low permeability is supplied on the main surface of the molded body consisting of a specific high permeability composition in such a manner that a plurality of regions will be formed, and a crystal grain boundary is insulated after the low permeability composition has been diffused into the molded body. CONSTITUTION:One or more kinds of the ingredients for low permeability selected from V2O5, Cr2O3, CoO, NiO and SnO2 is fed to the main surface of the molded body 4, mainly composed of SrTiO3 and consisting of a high permeability composition containing a valency control agent, in such a manner that a plurality of regions will be formed. After said low permeability composition has been diffused into the molded body 4, the crystal grain boundary is insulated. For example, a low permeability composition is coated on the prescribed part on the main surface of the molded body 4, consisting of a high permeability composition as the paste 5 obtained by adding ethyl cellulose, a solvent and the like. Then, after the above-mentioned material has been cAlcined at 600 to 1200 deg.C in the atmospheric air, it is sintered at 1320 to 1450 deg.C in a reducing atmosphere or a neutral atmosphere, and a semiconductor substrate 6, in which a low permeability composition is diffused on the prescribed region 2, is obtained. Subsequently, the crystal grain boundary is insulated.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention is directed to a grain boundary method that has two or more types of dielectric constants and can be used for various electronic circuit boards or substrates containing a plurality of capacitors. The present invention relates to a method for manufacturing an insulated semiconductor ceramic substrate.

(Conventional technology) In recent years, there has been an active movement toward miniaturization of electronic devices.

Among these, the ceramic substrate has a conductive circuit, a resistor, etc. formed by a thick film method or a thin film method on its surface, and also has chip-shaped capacitors, inductances, etc. mounted thereon. However, since the role of this board is simply to mount the electronic components, it is, so to speak, a space in terms of electrical functionality, and by moving some of the electronic components into this space, that is, into the board , attempts are being made to further reduce the size. As a specific example, a technique has been proposed in which a capacitor is built into a substrate and miniaturized by multilayering dielectric sheets.

(Problems to be Solved by the Invention) However, the type of capacitor-embedded substrate made of multilayered dielectric sheets is made up of multiple layers by alternately laminating dielectric sheets and electrode materials, which makes the process complicated and Since the capacitance between the built-in capacitors (hereinafter referred to as cross capacitance) is large, there is a problem in that signal leakage l cannot be ignored. That is, it has conventionally been completely difficult to form a capacitor-embedded substrate in a state in which a plurality of capacitors are sufficiently electrically isolated from each other in a simple manner.

It is an object of the present invention to connect a plurality of capacitors made of grain-boundary insulated semiconductor porcelain with a high dielectric constant to a state in which they are sufficiently electrically isolated from each other, without a decrease in mechanical strength, and without shape distortion. It is an object of the present invention to provide a method for manufacturing a ceramic substrate that can be incorporated in a ceramic substrate.

(Means for Solving the Problems) The present invention provides, as a first step, VzOs+ CrzO, Coo, Ni
At least one selected from the group consisting of O and SnO□
Low dielectric constant component of seeds, or VzOs, CrzO3
, CoO, NiO and SnO2 and 55.0 to 99.9 mol% of at least one component selected from the group consisting of S
I Oz + T l Oz + M n Oz +
Supplying a low dielectric constant composition comprising 45.0 to 0.1 mol % of at least one component selected from the group consisting of CLI O and ZnO so that a plurality of regions are defined; The present invention relates to a method for manufacturing a grain boundary insulated semiconductor ceramic substrate, characterized in that, as a second step, the component for low dielectric constant is diffused into the inside of the molded body; and as a third step, grain boundaries are insulated.

In a preferred embodiment of the method according to the invention, the diffusion is carried out by calcination. In this case, there is an advantage that no special process is required for diffusion, and diffusion can be achieved during the firing process normally required for manufacturing grain boundary insulated ceramic substrates.

Here, "component for low dielectric constant" or "composition for low dielectric constant"
"Seno" means a component or composition added to change a high dielectric constant molded body to a low dielectric constant. Furthermore, the term "composition" includes compounds in addition to mixtures.

The invention will now be explained by way of example with reference to the drawings.

FIG. 1 is a cross-sectional view of a grain-boundary insulated semiconductor ceramic substrate having two types of permittivity manufactured by the method of the present invention, and FIG. 2 is a cross-sectional view of the ceramic substrate of FIG. FIG. 2 is a cross-sectional view of a ceramic substrate with a built-in capacitor. In FIGS. 1 and 2, 1 is a high dielectric constant region used as a capacitor, 2 is a low dielectric constant region for reducing the capacitance between built-in capacitors, and 3 is an electrode of the capacitor. 6 is a grain boundary insulated semiconductor ceramic substrate.

In the high dielectric constant region l used as a capacitor,
The dielectric constant is preferably 15,000 or more. In this case, even if the thickness of the ceramic changes, it is possible to form a capacitor with a capacitance of 1000 pF or more, and many types of capacitors among the commonly used ceramic chip capacitors can be formed in ceramic. be able to.

Furthermore, the ceramic constituting the capacitor is required to have good performance in terms of not only dielectric constant but also dielectric loss (tan δ) and temperature characteristics. 5 as satisfying them.
Grain boundary insulated semiconductor ceramics containing rTiO1 as a main component are known.

The constituent components of the grain boundary insulated semiconductor porcelain mainly composed of 5rTiO are Y, 0. Nbz05. Ta205. W.O.
3 and at least one valence side f' selected from the group consisting of lanthanum series element oxides including La2O3
Ill agent is used. Furthermore, to obtain a high dielectric constant,
It is necessary to increase the crystal grain size of porcelain, and for this purpose, appropriate additives are also added.

Examples include additives such as MnO□, CuO, SiO□, and ZrO□.

On the other hand, for the main component 5rTi03, in order to adjust its temperature characteristics, dielectric constant, dielectric loss, etc.
It is also possible to slightly change the ratio of r to Ti from 1 or to replace a portion of Sr with Ca and Ba.

In order to separate the high dielectric constant region having the above-mentioned composition into a plurality of regions, a low dielectric constant region 2 is provided in the substrate as shown in FIG. 1. Refer to and explain.

First, as a first step: 1) A molded body 4 made of a high dielectric constant composition is obtained by an extrusion molding method, a doctor blade method, or the like.

2) As shown in FIG. 3, the above-mentioned low dielectric constant component or low dielectric constant composition is applied to a predetermined portion of the main surface (preferably both the front and back surfaces) of the molded body 4. A paste 5 obtained by adding ethyl cellulose, a solvent, etc. is applied. In this case, the paste application width is 0.1
mm or more, preferably 0.2 mm or more is required.

Then, as a second step: 3) Calcinate at 600 to 1200°C in the atmosphere to remove the binder component in the molded body and in the coating paste.

4) This calcined body is placed in a reducing atmosphere such as a mixed gas of hydrogen and nitrogen, a mixed gas of hydrogen and argon, or nitrogen,
1320-14 in a neutral atmosphere such as argon
Sintering is performed at 50° C. to obtain semiconductor porcelain. Also, in this process,
The low dielectric constant component or low dielectric constant composition in the applied paste 5 diffuses into the molded body, and a semiconductor ceramic substrate 6 is produced (see FIG. 4).

After that, as a third step: 5) In order to insulate the grain boundaries of this semiconductor porcelain, for example, the weight ratio of old zoz/CuO/ethyl alcohol = 0.7
10.3/10 or PbO/ethyl alcohol = 1
/10 in a suspension, then 1 in the atmosphere.
Bake at 100°C to 1300'c. As a result, the part coated with the paste 5 becomes the low dielectric constant porcelain 2, and the remaining part becomes the high dielectric constant porcelain 1. (Then, high permittivity porcelain 1
A grain boundary insulated semiconductor ceramic substrate 6 is obtained, which is made of the low dielectric constant ceramic 2 and the low dielectric constant ceramic 2.

Note that Ag+Au+AI+Ni+Cu+Zn+Ag-P is deposited at a desired location on the main surface of the grain boundary insulated semiconductor ceramic substrate 6.
A capacitor can be formed by baking the electrode 3 such as d.

Note that the reduction in dielectric constant can be confirmed by measuring the capacitance between adjacent capacitors, that is, the cross capacitance.

Furthermore, the strength of the ceramic substrate obtained by the zero-happiness method as a substrate is significantly improved compared to the case where only the high dielectric constant region is used.

As described above, the method of the present invention makes it possible to incorporate a capacitor with good capacitor characteristics and a significant reduction in cross capacitance, and to manufacture a substrate with good mechanical strength.

(Function) V2O, Cr2O:l, Coo, Ni coated on the predetermined surface of the compact forming the high dielectric constant porcelain after grain boundary insulation.
At least one selected from the group consisting of O and SnO□
A low dielectric constant component of the species, or Vz05. Cr201. C
55.0 to 99.9 mol% of at least one component selected from the group consisting of oo, NiO and SnO□ and SiO
2. At least one component selected from the group consisting of TiOz, MnOz, CuO and ZnO 45.0 to 0.1
The effect of the composition for low dielectric constant consisting of mol % will be explained below.

First, when these components or compositions for low dielectric constant are used as a coated article, a characteristic of the coated article is that the shrinkage rate after sintering does not change significantly depending on whether or not it is coated. As a result, 1. the shape distortion of the sintered body is significantly reduced compared to, for example, when only a mixture of Alz(h and Sing is coated), and excellent dimensional stability is obtained.

V2O1, Cr2 is added to the molded body made of the high dielectric constant composition.
03 When at least one component selected from the group consisting of CoO, NiO, and SnO□ is added, the crystal grain size of the semiconductor porcelain decreases as the amount of addition increases, and the volume resistivity increases. The dielectric constant decreases significantly. That is, V2O,, Cr20z, Coo, Ni
At least one selected from the group consisting of O and SnO□
The presence of the seed component selectively converts the high dielectric constant composition to a low dielectric constant composition.

Next, at least one component selected from the group consisting of V2O3, CrzO*+ Cod, NiO and SnO2 is applied to the molded body made of the high dielectric constant composition, and then the usual process for grain boundary insulated semiconductor porcelain is carried out. Accordingly, by firing in air to remove the binder and then firing in a neutral or reducing atmosphere, the coating material is diffused into the interior of the porcelain, and the diffusion region is converted to a low dielectric constant region.

However, the diffusion rate of V2O5I CrzOi+ Cod, NiO and 5nOz into the interior of the porcelain is relatively slow, so if the thickness of the molded body (i.e. porcelain) is thick, the diffusion into the interior of the porcelain will be insufficient and the dielectric constant will decrease. It also slows down.

In other words, applying at least one component selected from the group consisting of V2O5, Cr2O3, Coo, NiO, and SnO2 to the surface of the molded product is effective when the thickness of the molded product (i.e., porcelain) is not very thick. This is effective when the thickness is approximately 0.6 mm or less.

On the other hand, V2O5, Cr2O3, Cod, NiO
and 55.0 to 99.9 mol% of at least one component selected from the group consisting of SnO□ and 5i02. TiO
2. When a composition for low dielectric constant consisting of 45.0 to 0.1 mol% of at least one component selected from the group consisting of MnO2, CuO and ZnO is applied, the thickness of the porcelain is approximately Even if the valence exceeds 0.6, the dielectric constant decreases significantly. Therefore, Sing, Ti0z, Mn0z+ C
uO and ZnO diffuse themselves inside the porcelain, as well as V2O5, Cr2O2, Cod.

It has the effect of promoting the diffusion of NiO and SnO□ into the molded body.

Furthermore, S+Oz+ T+Oz+ MnOz, CuO, and ZnO have the effect of significantly improving the mechanical strength of the low dielectric constant region.

The reason for limiting the numerical value of the composition in the composition for low dielectric constant is as follows. SiO2, Ti0z, Mn0z, Cu
When at least one component selected from the group consisting of O and ZnO exceeds 45.0 mol%, the conversion from high dielectric constant to low dielectric constant becomes slow, and the bending strength is Mechanical strength decreases significantly.

Conversely, at less than 0.1 mol%, VZO5+ Cr2O2
, Co.

When the diffusion promotion effect of NiO and SnO□ into the interior of the porcelain decreases and the thickness of the porcelain becomes thick, the conversion from high dielectric constant to low dielectric constant becomes noticeably slower, and an improvement in mechanical strength is observed. This is not desirable as it will prevent you from doing so.

The required amount of coating varies depending on the thickness of the molded body, and the coating amount increases as the thickness increases. However, since the thickness of commonly used circuit porcelain substrates is up to 1.6 mm, the coating amount should be 20 mg/application area. A coating amount of less than cm2 is sufficient. 2
If it is applied in an amount exceeding 0 mg/cm2, the mechanical strength will be significantly reduced, which is not preferable.

(Effects of the Invention) According to the method of the present invention, a ceramic substrate consisting of regions having two or more types of dielectric constants can be obtained, so that a plurality of capacitor parts can be incorporated in a state where they are sufficiently electrically isolated from each other. Therefore, it can greatly contribute to the miniaturization and performance improvement of circuit boards and, ultimately, electronic devices.

In addition, at least one component selected from the group consisting of V2O5, Crz(h+ Cod, NiO and SnO□) and S+Oz+TiO2, MnO2, CuO and Zn
When at least L type components selected from the group consisting of
The mechanical strength is further increased than in the high dielectric constant region, and it is also possible to reduce the occurrence of defects such as breakage during the manufacturing process.

In addition, the shrinkage rate during sintering of the part where the low dielectric constant component or composition is applied and diffused, that is, the low dielectric constant region and the high dielectric constant region, is almost equal, so there is little distortion in shape and it is easy to process thick films. The positioning accuracy is also equivalent to the normal Aj2z (h board).

(Example) Next, the present invention will be explained with reference to Examples and Comparative Examples.

Each raw material was weighed out so as to have the composition shown in Table 1, pulverized and mixed in a wet ball mill for 12 hours, and dried.

Next, the mixture was calcined in air at 1150° C. for 15 hours, and then ground in a wet ball mill for 18 hours. After drying this mixture, methylcellulose was added and extrusion molded to obtain molded products having the thickness shown in Table 2. This molded body is 18.8mm
It was punched out to a size of 12.5++un. As shown in FIG. 3, on both the front and back sides of the molded product, apply the ratio shown in the column of "Application to molded product" in Table 2, parallel to the short side of the molded product at the center position of the molded product 4. A paste consisting of powder prepared in A sample without coating was also prepared for comparison.

In order to remove the binder component, it was calcined in the air at 900°C for 2 hours. Then 10% by volume hydrogen and 90% nitrogen
4 at 1400°C in an atmosphere consisting of % by volume.
Sintering was performed for a period of time to obtain semiconductor porcelain that had sintered and shrunk by about 20%, and the coating material was diffused into the interior of the porcelain. This semiconductor porcelain was soaked in a suspension with a weight ratio of Bit's/Cub/ethyl alcohol = 0.710.3/10, and then 1
It was fired in air at 250°C for 130 minutes to form an insulating layer at the grain boundaries.

The semiconductor ceramic base Fi,6 shown in FIG. 4 obtained in this way
Ag electrodes 3 were baked on both sides of the high dielectric constant region 1 to be used as a capacitor section in the shape shown in FIG. 5 at intervals of 1 mm.

Next, the capacitance (nF), apparent dielectric constant, tan δ (%), and temperature change rate of capacitance were measured as the characteristics of the capacitor section. Note that the rate of change in capacitance with temperature is the rate of change in capacitance in a temperature range of -25°C to 185°C, which is determined based on a value of 25°C.

In addition, in order to determine the state of electrical separation of the capacitor part, the capacitance between electrodes located on the same plane (cross capacitance)
(pF) was measured.

In addition, the semiconductor ceramic substrate was cut along the lines A and B in Figure 4, and a test piece with a width of 2 mm and a length of 15 mm was cut out, and the test pieces were arranged as shown in Figure 6 and three points were cut out. A bending test was conducted to measure the bending strength.

In addition, with respect to the short side length of 12.5 mm of the molded body (18.8 mm x 12.5 mm), the corresponding length (n++n) in the high dielectric constant region and low dielectric constant region of the fired ceramic substrate L and 12 respectively in Figure 4
) was determined as IIJ, and the shrinkage rate due to sintering was determined using the following formula.

The results of these measurements are shown in Table 2. In Table 2, * marks indicate comparative examples, and others indicate examples.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of an example of a grain-boundary insulated semiconductor ceramic substrate manufactured by the method of the present invention, Fig. 2 is a cross-sectional view of a ceramic substrate with a built-in capacitor using the ceramic substrate of Fig. 1, and Fig. 3 is a cross-sectional view of a ceramic substrate with a built-in capacitor. FIG. 4 is a perspective view showing the step of supplying the component or composition for low dielectric constant to the molded body in the method of the invention, and FIG. FIG. 5 is a perspective view of a part of the capacitor-embedded board of FIG. 2, and FIG. 6 is a perspective view showing the arrangement of test pieces in a bending test. 1... High permittivity area (high permittivity porcelain, capacitor part)
2... Low dielectric constant region (low dielectric constant porcelain) 3... Electrode 4... Molded body (molded body made of high dielectric constant composition) 5.
... Paste (paste containing a low dielectric constant component or a low dielectric μ composition) 6 ... Grain boundary insulated semiconductor ceramic substrates A, B ... Cutting lines 1, . . . when cutting out a test piece.
12... Length after sintering

Claims (3)

[Claims] 1. V_2
O_5, Cr_2O_3, CoO, NiO and SnO
Supplying at least one component for low dielectric constant selected from the group consisting of __2 so that a plurality of regions are defined, and diffusing the component for low dielectric constant into the inside of the molded body, A method for manufacturing a grain boundary insulated semiconductor ceramic substrate, which comprises subsequently insulating grain boundaries. 2. On the main surface of the molded body made of the high dielectric constant composition,
55.0 to 99.9 mol% of at least one component selected from the group consisting of V_2O_3, Cr_2O_3, CoO, NiO and SnO_2 and SiO_2, TiO_2
, 45.0 to 0.1 mol % of at least one component selected from the group consisting of MnO_2, CuO, and ZnO, and a low dielectric constant composition is supplied so as to define a plurality of regions. The method according to claim 1. 3. 3. The method according to claim 1, wherein said diffusion is performed by firing.