JPH0244412A - Sum of squares limitation circuit - Google Patents

Abstract

PURPOSE:To obtain a square sum limitation circuit with a low price and with high accuracy by forming a feedback loop using a PI arithmetic circuit, and supplying an external limitation signal to a signal limiting means by a limitation control function. CONSTITUTION:A sum of squares arithmetic circuit 11 operates the square value P<2> of an active power P, and also, a sum of squares arithmetic circuit 22 operates the square value QL<2> of a reactive power Q limited to QL at a signal limitation circuit 21. An adder 6 operates the sum of those square values i.e. P<2>+QL<2>=S<2>, and next, inputs deviation with Smax<2> set by an addition operated result and a sum of squares limitation value setter 2 to the proportional-plus- integral arithmetic circuit (PI arithmetic circuit) 7. The PI arithmetic circuit 7 supplies a control signal Qmax which sets difference between the Smax<2> and the S<2> at 0 when it goes to a negative value to the signal limitation circuit 21 as the external limitation signal, thereby, limits the reactive power Q. In such a way, it is possible to obtain the square sum limitation circuit with accuracy higher than ever and with simple constitution.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention prioritizes the first quantity and subordinates the second quantity so that the sum of the squares of two quantities does not exceed a predetermined limit value. This invention relates to a sum-of-squares limiting circuit that limits the sum of squares.

[Conventional technology]

When using DC power generated by fuel cells, solar cells, etc. by connecting it to a commercial power system, these DC power sources operate in parallel with the commercial power system via an inverter.

In power control of such an inverter, it is necessary to give priority to the active power output by the inverter, control the reactive power to follow this active power, and limit it so that it does not exceed the device capacity (i.e., apparent power). There is.

Now, if we define the active power P as the first I, the reactive power Q as the second view, and the apparent power S, these three quantities have the following relationship.

P=S −cosα −・・−・−−−
−1−−−・・−−−1−−・−−−1−−−−・・−
・---(])Q -S -s in α---
−−−−−−−−−(2) The square value of these equations (1) and (
2) The sum with the square value of 2 is expressed as equation (3).

P! + Q ” -S ” −・−−−−−−−
−−−−・−−−−・−・(3) The maximum allowable value of the apparent power S is S wax, and the reactive power Q is the active power P
If the maximum allowable value of this reactive power Q is Qmax, then the following equation (4) can be derived from the above equation (3).

Qmax =2-11-,,,,,,,-,,,,,,,
,,,,,,,,-,,,,,,,,,,-,, (4)
Figure 2 shows a conventional example of calculating a sum-of-squares limit value that prioritizes the first quantity so that it does not exceed the sum of the squares of two quantities or a predetermined limit value, and limits the second quantity subordinately. FIG.

In the conventional circuit shown in FIG. 2, the value of Qs+ax is (4
) is configured to perform calculations according to the formula. That is, the active power setter 10 sets the value of the eleventh active power P, and the square calculation circuit 11 calculates the square value P2 of this active power P.
Calculate.

On the other hand, sum of squares control! (The a setting device 2 sets the value S Llax", and the adder 3 calculates the difference in rain sound, that is, Smaxz-P". This calculation result is input to the square root calculation circuit 4. So, this square root calculation circuit 4
From this, Qmax can be extracted as shown in equation (4).

The reactive power Q as a second view is output from the reactive power setter 20, and it has already been mentioned that this reactive power Q is an amount that changes in accordance with the change in the active power P described above. (However, the illustration that this Q is a mouse that follows P is omitted.) This reactive power Q is transferred to the signal limiting circuit 21.
\Input to this signal limiting circuit 21 is as follows.
Since Qmax, which is the output of the square root calculation circuit, is input as the limiting value, the value of the limited reactive power Q output from the signal limiting circuit 21 will not exceed Qmax.

[Problem to be solved by the invention]

With the conventional circuit shown in FIG. 2, it is possible to limit the reactive power Q to its maximum value, minimum value, or both the maximum and minimum values. However, since this conventional circuit uses the square root calculation circuit 4, its calculation error cannot be ignored. In particular, there is a problem in that as the input value of this circuit becomes smaller, the error in the limit value Qsax that is its output becomes larger.

Furthermore, since this limiting operation is performed in an oven loop, there is also the problem that the limiting error occurring in the signal limiting circuit 21 cannot be corrected.

Therefore, when controlling the active power, reactive power, and apparent power in the above-mentioned power system, the sum of squares limit value setter 2 is used to set the value 5 to be on the safe side with respect to calculation errors.
Since Ilaxt is set to be lower than a predetermined value, it is not possible to utilize 100% of the capacity of the device, resulting in a decrease in utilization rate.

SUMMARY OF THE INVENTION An object of the present invention is to provide a highly accurate sum-of-squares limiting circuit with a simple configuration, thereby improving the utilization rate of devices in power systems to which this sum-of-squares limiting circuit is applied.

[Means to solve the problem]

In order to achieve the above object, the square sum limiting circuit of the present invention has two quantities, an eleventh quantity and a second quantity, which can be set to increase or decrease, and the square value of the first fi and the second quantity The second fake is +flrl+ so that the sum with the multiplication value does not exceed a predetermined limit value.
In the sum-of-squares limiting circuit, the first injection setting means sets the first tail, the first square calculation means performs a square calculation of the first @, and the second sum limit circuit sets the second sum. a second quantity setting means, a signal limiting means for limiting the upper limit or the lower limit of the second quantity in response to an external limiting signal, and a second square calculation means for performing the square calculation of the limited 2mth. and addition means for calculating the sum of the outputs of these double square calculation means,
Sum-of-squares limit value setting means for setting the predetermined limit value;
The deviation between this predetermined limit value and the output of the adding means is input, and when the output of the adding means exceeds the predetermined limit value, a signal is output to control this input deviation to zero [L example fl1 minute calculation means] In addition, this proportional-integral calculating means output signal is limited (No. 3) and is given to the signal limiting means.

[Effect]

This invention adds the square value of 1st I and the square value of the limit value of the 2nd quantity limited according to the 1st view of 1 and 2, and this addition result and the square value set separately. The deviation from the sum limit value is input to the proportional integral calculation circuit, and when the addition result exceeds the square sum limit value, that is, when the deviation becomes negative, the proportional integral is calculated so that this input deviation becomes zero. By limiting the second quantity using the output of the arithmetic circuit, the use of the square root arithmetic circuit, which has a large calculation error, is omitted.

〔Example〕

FIG. 1 is a control block diagram showing an embodiment of the present invention.

In FIG. 1, an active power setting device 10 outputs a first dynamic power P, and a reactive power setting device 20 sets a second amount of reactive power Q. The fact that Q changes in accordance with changes in the wall active power P (not shown) is the same as in the conventional circuit described in FIG. 2.

The sum-of-squares circuit 11 has P2, which is the square value of the active power P.
, and the sum of squares calculation circuit 22 is connected to the signal limiting circuit 21
The square value of the reactive power Q, which is limited to QL, is
Calculate.

Addition H6 is the sum of these squared values P”+QL,
That is, S2 is calculated, and then this addition calculation result and 2
The deviation from Smaxt set by the multiplication-sum limit value setter 2 is calculated by a proportional-integral calculation circuit (hereinafter abbreviated as PI calculation circuit) 7.
is being entered. This PI arithmetic circuit 7 outputs a control i'Jl signal that makes the input deviation, that is, the difference between Smax'' and 82, zero when it becomes negative, and this control jn signal is And this Qn+ax
By supplying as an external limiting signal to the signal limiting circuit 21, the reactive power Q is limited so that its upper limit, lower limit, or upper and lower limits do not exceed this Qmax.

[Effect of the invention] According to this invention, the second crab follows the first crab! In order to obtain the external limit signal that determines the limit level of t, a feedback loop using a P] calculation circuit is formed and the limit control function applies an external limit (No. 3) to the signal limit means, so that This eliminates the need for a complex square root calculation circuit with many errors, and the feedback function allows correction of liminter errors, making it possible to provide an inexpensive and highly accurate sum of squares limiting circuit.

[Brief explanation of the drawing]

Fig. 1 is a control block diagram showing an embodiment of the present invention, Fig. 2 is a control block diagram showing an embodiment of the present invention.
The figure shows a conventional example of calculating a sum-of-squares limit value that prioritizes the first quantity so that the sum of squares of two quantities does not exceed a predetermined limit value, and limits the second bond subordinately. It is a circuit diagram.

Claims (1)

[Claims] 1) There are two quantities, a first quantity and a second quantity, which can be increased or decreased, and the sum of the square value of the first quantity and the square value of the second quantity should not exceed a predetermined limit value. The sum-of-squares limiting circuit for limiting the second quantity includes a first quantity setting means for setting the first quantity, a first square calculation means for performing a square calculation of the first quantity, and a first quantity setting means for setting the first quantity; a second quantity setting means for setting the second quantity; a signal limiting means for limiting the upper limit or the lower limit of the second quantity in response to an external limiting signal; and a second quantity setting means for calculating the square of the limited second quantity. 2 square calculation means, addition means for calculating the sum of the outputs of these two square calculation means, square sum limit value setting means for setting the predetermined limit value, and the predetermined limit value and the addition. proportional-integral calculating means for inputting a deviation from the output of the adding means and outputting a signal for controlling the input deviation to zero when the output of the adding means exceeds the predetermined limit value;
A sum-of-squares limiting circuit characterized in that the output signal of the proportional-integral calculation means is given to the signal limiting means as a limiting signal.