JPH0246570A - Demodulating circuit - Google Patents

Abstract

PURPOSE:To eliminate a noise to occur at the time of switching an FM modulating wave and the corrected noise by continuously sampling a demodulating signal and hiding a noise to occur at the time of switching the FM modulating wave in a sampling period. CONSTITUTION:The signal of a switch 5 passes through a BPF 6 with a band width being limited, and thereafter, demodulated by an FM demodulator 7. When the signal is inputted to first and second S&H circuits 9 and 10, a second switch 13 is synchronized with the output of a clock pulse generator 11, and take out the output at the side held always from the output of the first and second S&H circuits 9 and 10 by the third output of a holding pulse generator 15. Next, the frequency spectrum added by the sampling included in the output signal of the second switch 13 is removed by a second LPF14 and the demodulating output is obtained at an output terminal 16. Thus, the noise to occur when the signal is switched can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a demodulator circuit, and in particular to a demodulator circuit for a VTR Hi-F
This invention relates to a demodulation circuit that eliminates noise generated when switching signals from two audio heads in an audio signal demodulation circuit or the like.

[Prior Art] As shown in FIG. 5, a conventional demodulation circuit converts the output of a switch having first and second modulated wave input terminals 3.4 into a band pass filter (hereinafter abbreviated as BPF) 6. After limiting the bandwidth with The switch 5 performs a switching operation based on the signal from the switching signal generator 1, and
The S&H circuit 9 was controlled by a hold pulse generator 2 receiving a signal from the switching signal generator 1.

Next, the operation of this circuit will be explained with reference to FIG. The first input terminal 3 and the second input terminal 4 have a certain simultaneous existence period as shown in FIG. 6C and D, respectively.
FM modulated waves are input alternately. At this time, the switch 5 switches the FM modulated waves input to the input terminal 3 and the input terminal 4, and is controlled by the switching signal generator 1 so that either FM modulated wave is output, and the output is the sixth one. The result is a continuous signal as shown in Figure E. After passing through the BPF 6, the signal is demodulated by the FM demodulator 7, resulting in the demodulated signal shown in FIG. 6F. At this time, at the moment when the switch 5 switches, there is a minute discontinuity point in the FM modulated wave, so noise is generated. This F
In order to remove noise generated at discontinuous points of the M modulated wave,
The hold pulse generator 2 outputs a hold pulse at the timing shown in FIG. 6B in synchronization with the switching signal of the SW switching signal generator 1 (FIG. 6A), and only during the noise period of the demodulated signal shown in FIG. 6F. The S&H circuit 9 applies hold and outputs the demodulated signal shown in FIG. 6G to the output terminal 16. 6th
In the figure, there is a difference between the switching time shown in FIG. 6A and the noise generation time shown in FIG. 6F because there is a delay in the circuit. In normal cases, the width Th of the hold pulse In addition to the original noise width Tn, a delay time Td of the BPF 6 or the like is added and used under the condition of Th≧Td+Tn.

[Problems to be Solved by the Invention] In the conventional demodulation circuit described above, the noise generated when switching the modulated wave can be removed, but as shown in FIG. There is a drawback that a difference in level occurs between the potential of the demodulated signal and the normal demodulated signal potential, and this creates a noise that is very audible to the ears.

[Means for Solving the Problems] The demodulation circuit of the present invention has a first modulated wave input terminal and a second modulated wave input terminal, and has the ability to output a signal to either input terminal. a demodulator that demodulates the output of the switch, and an S&H circuit that samples and holds the output of the demodulator at a constant repetition frequency; and its repetition frequency are characterized in that they are selected so as to mask the period during which noise occurs due to switching of the input signal of the switch.

[Example] Next, an example of the present invention will be described with reference to FIG.

In FIG. 1, the same numbers as those in FIG. 5 mean the same things. And 9.10
are first and second S&H circuits, 11 is a clock pulse generator, 12 is a D-flip-flop (hereinafter abbreviated as D-FF), 13 is a second switch, 14 is an LPF, and 15 is a hold pulse. It is a generator. In this example, the first
, the output from the first switching device 5 having the second input terminal 3.4 is input to the FM demodulator 7 via the BPF 6, and the demodulated signal is sent to the first and second input terminals via the first LPF 8. S&H
It is input to the input terminal of circuit 9.10. The outputs of the first and second S&H circuits 9.10 are input to the first and second input terminals of the second switch 13, respectively, and the output signal from the second switch 13 is input to the second input terminal of the second switch 13. The signal is taken out from the output terminal 16 via the LPF 14. The output of the switching signal generator 1 and the output of the clock pulse generator 11 are input to the data input terminal and clock input terminal of the D-FF 12, respectively, and the output serves as a control input signal for the switching device 5. . Further, the output of the clock pulse generator 11 is input to the input terminal of the hold pulse generator 15, and the first,
The second and third outputs are used as control input signals for the first and second S&H circuits 9.10 and the second switch 13, respectively.

Next, the operation of this circuit will be explained with reference to FIG. From the clock pulse generator 11, as shown in FIG. 2H,
A pulse with a pulse width Th is being sent out. Now, switch 5
input from the first input terminal 3 to the second input terminal 4
shall be switched to. As shown in FIG. 2C and D, FM modulated waves are input to the first input terminal 3 and the second input terminal 4, respectively, with a certain simultaneous existence period.

At this time, when the output from the switching signal generator 1 changes as shown in FIG. 2A, the output of the D-FF changes at the next rising timing of the clock pulse shown in FIG. Figure ■). Then, the first switch 5 switches the input modulated wave from the input terminal 3 to the input terminal 4 at this timing, and a signal having the waveform shown in FIG. 2E is sent from the output terminal. After this signal passes through the BPF 6 and its bandwidth is limited, it is demodulated by the FM demodulator 7 (FIG. 2F). At this time, the moment the switch 5 switches, noise is generated due to minute discontinuities existing between the FM modulated waves. However, since this noise is delayed by a circuit such as the BPF 6, it appears at point F in FIG. 1 after a certain delay time Td has elapsed (FIG. 2 F). Next, this signal is subjected to bandwidth restriction by the first LPF 8, and then this signal is input to the first and second S&H circuits 9.10. The first and second S&H circuits 9 and 10 are operated in a complementary manner by the first and second outputs of the hold pulse generator 15 in synchronization with the output of the clock pulse generator shown in FIG. 2H. and from its output terminal,
A signal with a waveform shown in K is obtained. These signals are then alternately selected by the second switch 13. That is,
As shown in the second figure, the second switch 13 is switched between the first and second switches by the third output of the hold pulse generator 15 in synchronization with the output of the clock pulse generator 11 (H in figure 2). 2
The output of the S&H circuit 9.10 always takes out the held output. Next, the frequency spectrum added by sampling included in the output signal of the second switch 13 (L in FIG. 2) is removed by the second LPF 14, and the demodulated output shown in M in FIG. 2 is output to the output terminal. Get it on 16. In this embodiment, the clock frequency is 1/(T11X2), and the hold pulse width is used under the condition of T h≧Td+Tn, as in the prior art.

Next, other embodiments of the present invention will be described with reference to FIGS. 3 and 4. In this embodiment, the S&H circuit 18
This embodiment differs from the previous embodiment in that it receives the output of the hold pulse generator] 7 and continuously performs sampling and bold operations, but other points are the same as the previous embodiment. . FIG. 4 shows a signal waveform diagram of each part of this embodiment. The signal waveforms at points H and F in FIG. 3 are similar to the signal waveforms at the corresponding points in FIG. The output waveform shown is obtained.

Note that the hold pulse width is not limited to the above value. For example, by providing a delay circuit in the hold pulse generator 15 or 17, sampling at a higher repetition frequency can be performed. In short, it is sufficient if the signal during the noise generation period can be masked by sample and hold operation.

[Effects of the Invention] As explained above, the present invention continuously samples the demodulated signal and hides the noise generated when switching the FM modulation wave during the sampling period, thereby solving the conventional problem that was unpleasant to the ear. It is possible to eliminate noise generated when switching FM modulated waves and its correction noise.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention.
FIG. 3 is a block diagram of another embodiment of the present invention. FIG. 4 is a signal waveform diagram of each part of the embodiment of FIG. 3. FIG. , block diagram of conventional example,
FIG. 6 is a diagram of signal waveforms at various parts in a conventional example. 1...Switching signal generator, 2.15.17...Hold pulse generator, 3.4...Input terminal, 5.13
...Switcher, 6.Band pass filter, 7..
FM demodulator, 8.14...Low pass filter, 9.1
0.18...sample/hold circuit, ]T1・
- Clock pulse generator, 12...D-flip-flop, 16... Output terminal.

Claims (1)

[Claims] A switch that takes a first modulated wave input signal and a second modulated wave input signal as its input signals and outputs either input signal by switching each input signal; and a demodulator that demodulates the output of the switch. and a sample/hold circuit that samples the output signal of the demodulator at a predetermined repetition frequency and a predetermined timing and holds the value, and obtains a demodulated signal by the output of the sample/hold circuit. In the demodulation circuit, the predetermined repetition frequency and the predetermined timing of the sample/hold circuit are selected so as to mask a period in which noise occurs due to the input signal switching operation of the switch. A demodulation circuit characterized by: