JPH0246764A - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPH0246764A JPH0246764A JP63197674A JP19767488A JPH0246764A JP H0246764 A JPH0246764 A JP H0246764A JP 63197674 A JP63197674 A JP 63197674A JP 19767488 A JP19767488 A JP 19767488A JP H0246764 A JPH0246764 A JP H0246764A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- insulating film
- storage device
- thin
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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- Read Only Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野J
本発明は、非熔断固定記憶装置の構造及び材料構成に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application J] The present invention relates to the structure and material composition of a non-fusible fixed storage device.
従来、非熔断固定記憶装置は、第3図に示す如き構造を
とっていた。すなわち、Slから成る半導体基板21の
表面には、SiO2から成る絶縁膜22が形成され、該
絶縁膜22に開けられた窓から拡散層から成る第1の電
極23を形成し、該第1の電極23の表面の一部にオキ
シナイトライド(S i ON)から成る薄い絶411
1124を形成し、該薄い絶縁膜24の表面に第2の電
極25を形成して成るのが通例であった0本例の反熔断
固定装置としての動作は、第1の電極23と第2の電極
25との間に電圧を印加し、薄い絶縁膜24を絶縁破壊
されて第1の電極23と第2の電極25とを導通状態と
なさせるもので、非溶断固定記憶動作となるわけである
。Conventionally, non-fusible fixed storage devices have had a structure as shown in FIG. That is, an insulating film 22 made of SiO2 is formed on the surface of a semiconductor substrate 21 made of Sl, and a first electrode 23 made of a diffusion layer is formed through a window opened in the insulating film 22. A thin insulator 411 made of oxynitride (SiON) is formed on a part of the surface of the electrode 23.
1124, and a second electrode 25 is formed on the surface of the thin insulating film 24. The operation of the anti-fusing fixing device in this example is based on the first electrode 23 and the second electrode 25. A voltage is applied between the first electrode 23 and the second electrode 25, and the thin insulating film 24 is dielectrically broken down to bring the first electrode 23 and the second electrode 25 into a conductive state, resulting in a non-fusing fixed memory operation. It is.
[発明が解決しようとする課題]
しかし、上記従来技術によると半導体基板には、出来る
限りトランジスタを多数形成し、集積度を高めようとす
るのに対し、非熔断固定記憶装置を半導体基板に形成す
るわけであるから集積回路の集積度の向上には向かない
と云う課題があった。[Problems to be Solved by the Invention] However, according to the above-mentioned conventional technology, as many transistors as possible are formed on a semiconductor substrate to increase the degree of integration, whereas it is difficult to form a non-melting fixed memory device on a semiconductor substrate. Therefore, there was a problem in that it was not suitable for improving the degree of integration of integrated circuits.
本発明、かかる従来技術の課題を解決し、半導体集積回
路装置における非熔断固定記憶装置部を3次元的に配置
し、半導体集積回路装置の集積度の向上を計る事を目的
とする。It is an object of the present invention to solve the problems of the prior art, to three-dimensionally arrange a non-meltable fixed storage device in a semiconductor integrated circuit device, and to improve the degree of integration of the semiconductor integrated circuit device.
〔課題を解決するための手段)
上記課題を解決するために、本発明は、非熔断固定記憶
装置に関し、半導体基板上に、絶縁膜を形成し、該絶縁
膜上に形成した、第1の電極の表面又は側面のいずれか
又は表面と側面一部には、5iOz、SiO□とSi、
N4.Sin、とAl2O5あるいは5itN4あるい
はAλ20s等から成る薄い絶縁膜を形成し、該薄い絶
縁膜を介して、第2の電極を形成する手段をとる事を基
本とする。[Means for Solving the Problems] In order to solve the above problems, the present invention relates to a non-melting fixed storage device, in which an insulating film is formed on a semiconductor substrate, and a first insulating film formed on the insulating film is provided. Either the surface or side surface of the electrode, or a portion of the surface and side surface, contains 5iOz, SiO and Si,
N4. The basic method is to form a thin insulating film made of Sin, Al2O5, 5itN4, Aλ20s, etc., and form the second electrode via the thin insulating film.
[実 施 例]
以下、実施例により本発明を詳述する。第1図及び第2
図は本発明の実施例を示す非熔断固定記憶装置の要部の
断面図である。[Examples] Hereinafter, the present invention will be explained in detail with reference to Examples. Figures 1 and 2
The figure is a sectional view of a main part of a non-melting fixed storage device showing an embodiment of the present invention.
第1図では、Siから成る半導体基板lの表面に、S
i Otから成る絶縁膜2を形成し、該絶縁膜2の表面
に、多結晶Si、Ar1、W、WSi等から成る第1の
電極3を形成し、CVD5 i O。In FIG. 1, S
An insulating film 2 made of i Ot is formed, and a first electrode 3 made of polycrystalline Si, Ar1, W, WSi, etc. is formed on the surface of the insulating film 2, and then CVD5 i O is formed.
等による、眉間絶縁膜6を更に、その上に形成後該層間
絶縁11i6の第1の電極3上の一部を窓開けし、CV
D法や酸化法により、5iO=、5iON、5isN4
、Afi 、 O、等の薄い絶縁膜4を形成し、該薄い
絶縁膜4上に、多結晶Si、A1、W、WSi等から成
る第2の電極5を形成して成る。尚薄い絶、tlIII
4は第1の電極3の側面に迄形成され、その上に、第2
の電極5が第1の電極3の側面の一部に迄延在して形成
されてもよく、又、この場合には、必ずしも空間絶縁膜
6はなくても良い。After further forming the glabellar insulating film 6 thereon, a part of the interlayer insulating film 11i6 above the first electrode 3 is opened, and CV
By D method or oxidation method, 5iO=, 5iON, 5isN4
, Afi, O, etc., and a second electrode 5 made of polycrystalline Si, A1, W, WSi, etc. is formed on the thin insulating film 4. Sho thin absolute, tlIII
4 is formed up to the side surface of the first electrode 3, and on top of that, the second electrode 3 is formed.
The electrode 5 may be formed extending to a part of the side surface of the first electrode 3, and in this case, the space insulating film 6 may not necessarily be provided.
第2図では、Siから成る半導体基板1の表面には、S
iO□等から成る絶縁膜12が形成され、該絶縁膜12
の表面には多結晶Si、AA、W、WSi等から成る第
1の電極3と第2の電極5が形成され、該第1の電極3
と第2の電極5の少くともギャップ間に、5iOa、5
iON。In FIG. 2, the surface of the semiconductor substrate 1 made of Si has S
An insulating film 12 made of iO□ or the like is formed, and the insulating film 12
A first electrode 3 and a second electrode 5 made of polycrystalline Si, AA, W, WSi, etc. are formed on the surface of the first electrode 3.
and the second electrode 5 between at least the gap of 5iOa, 5
iON.
5izN4、A 1− Os等から成る薄い絶縁膜14
がCVD法や酸化法により形成されて成る。尚薄い絶縁
膜4は第1の電極3や第2の電極5の表面や側面に延在
して形成されても良い。Thin insulating film 14 made of 5izN4, A1-Os, etc.
is formed by a CVD method or an oxidation method. Note that the thin insulating film 4 may be formed extending over the surfaces and side surfaces of the first electrode 3 and the second electrode 5.
[発明の効果]
本発明により半導体集積回路装置に非熔断固定記憶装置
を集積度高く形成する事ができる効果がある。[Effects of the Invention] The present invention has the effect that a non-fuse fixed memory device can be formed with a high degree of integration in a semiconductor integrated circuit device.
1 l 、 l 2、 l 3、 l 4. 15゜ ・半導体基板 ・絶縁膜 ・第1の電極 ・薄い絶縁膜 ・第2の電極 ・層間絶縁膜 以上 出願人 セイコーエプソン株式会社 代理人 弁理士 上 柳 雅 誉(他1名)1 l, l 2、 l 3, l 4. 15° ・Semiconductor substrate ・Insulating film ・First electrode ・Thin insulation film ・Second electrode ・Interlayer insulation film that's all Applicant: Seiko Epson Corporation Agent: Patent attorney Homare Kamiyanagi (1 other person)
第1図及び第2図は本発明の実施例を示す非熔断固定記
憶装置の要部の断面図であり、第3図は従来技術におけ
る非熔断固定記憶装置の要部の断面図である。FIGS. 1 and 2 are sectional views of essential parts of a non-fusible permanent storage device showing an embodiment of the present invention, and FIG. 3 is a sectional view of essential parts of a conventional non-fusible permanent storage device.
Claims (3)
に形成された、第1の電極の表面又は側面のいずれか又
は、表面と側面の一部には、SiO_2、SiO_2を
Si_3N_4、SiO_2N、Al_2O_3あるい
はSi_3N_4あるいはAl_2O_3等から成る薄
い絶縁膜が形成され、該薄い絶縁膜を介して第2の電極
が形成されて成る事を特徴とする非熔断固定記憶装置。(1) An insulating film is formed on the semiconductor substrate, and SiO_2, SiO_2 and Si_3N_4 are applied to either the surface or side surfaces, or a part of the surface and side surfaces, of the first electrode formed on the insulating film. , SiO_2N, Al_2O_3, Si_3N_4, Al_2O_3, etc., and a second electrode is formed through the thin insulating film.
結晶Siとなす事を特徴とする請求項1記載の非熔断固
定記憶装置。(2) The non-melting fixed memory device according to claim 1, wherein the first electrode or the first electrode and the second electrode are made of polycrystalline Si.
lとなす事を特徴とする請求項1記載の非熔断固定記憶
装置。(3) Connect the first electrode or the first electrode and the second electrode to A
2. The non-fusible fixed storage device according to claim 1, wherein the non-fusible fixed storage device is 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19767488A JP2715456B2 (en) | 1988-08-08 | 1988-08-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19767488A JP2715456B2 (en) | 1988-08-08 | 1988-08-08 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0246764A true JPH0246764A (en) | 1990-02-16 |
| JP2715456B2 JP2715456B2 (en) | 1998-02-18 |
Family
ID=16378452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19767488A Expired - Lifetime JP2715456B2 (en) | 1988-08-08 | 1988-08-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2715456B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6888215B2 (en) | 2000-04-27 | 2005-05-03 | International Business Machines Corporation | Dual damascene anti-fuse with via before wire |
| US7281710B2 (en) | 2003-12-22 | 2007-10-16 | Honda Motor Co., Ltd. | Conveyor system and method of setting operation thereof |
| JP2008192883A (en) * | 2007-02-06 | 2008-08-21 | Elpida Memory Inc | Semiconductor device |
| JP2024526464A (en) * | 2022-06-24 | 2024-07-19 | チャンシン メモリー テクノロジーズ インコーポレイテッド | Semiconductor structure and method of manufacture thereof, memory and method of operation thereof |
-
1988
- 1988-08-08 JP JP19767488A patent/JP2715456B2/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6888215B2 (en) | 2000-04-27 | 2005-05-03 | International Business Machines Corporation | Dual damascene anti-fuse with via before wire |
| US7281710B2 (en) | 2003-12-22 | 2007-10-16 | Honda Motor Co., Ltd. | Conveyor system and method of setting operation thereof |
| JP2008192883A (en) * | 2007-02-06 | 2008-08-21 | Elpida Memory Inc | Semiconductor device |
| JP2024526464A (en) * | 2022-06-24 | 2024-07-19 | チャンシン メモリー テクノロジーズ インコーポレイテッド | Semiconductor structure and method of manufacture thereof, memory and method of operation thereof |
| US12349342B2 (en) | 2022-06-24 | 2025-07-01 | Changxin Memory Technologies, Inc. | Semiconductor structure and method for manufacturing same, memory and operation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2715456B2 (en) | 1998-02-18 |
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