JPH0246981B2 - DEIJITARUSHINGOSHORISOCHI - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal processing device suitable for use in audio signal processing, image signal processing, communication fields, etc. The present invention relates to a digital signal processing device having multifunctional signal processing capabilities.

Conventionally, as devices of this type, many waveform analysis devices with names such as digital spectrum analyzers and FFT analyzers, and signal generators with names such as digital signal generators and random noise generators are known. However, the waveform analyzer has a structure that only processes the signal input from the signal input terminal and displays the processing result, and the signal generator has a structure that only outputs the signal generated from the signal generation circuit from the signal output terminal. Because of the advanced technology, it was impossible to perform all the basic signal processing techniques such as signal analysis, synthesis (generation), and filtering with one device at the same time. Furthermore, something like analysis becomes valuable only when a large number of functions come together, so even if a request to add a new function arises,
The drawback is that functions cannot be added easily to devices that are not equipped with expensive external storage devices (disks, cassette tapes, etc.).

The present invention aims to eliminate these drawbacks of the conventional technology, and it not only enables basic signal processing such as signal analysis, synthesis, and filtering, but also converts it into other physical quantities and characteristic quantities. To provide a compact and inexpensive digital signal processing device that has multifunctional signal processing ability capable of generating a test signal by combining signals, and can easily add new functions. It is something.

An embodiment of the present invention shown in the drawings will be explained in detail below.

First, referring to FIG. 1, an embodiment of a digital signal processing apparatus according to the present invention will be schematically described. This embodiment has two parts A and B that perform digital signal processing calculations, but if more than two parts are provided and more functions are required, the parts surrounded by dotted lines can be added. By adding more functions, it is possible to realize any number of functions. In FIG. 1, 1 is an analog signal input terminal, 2 is an analog signal input section, 31 and 32 are respective digital signal input terminals in circuits A and B, and 41 and 42 are A/D converted by the analog signal input section 2. a selector 61 for selecting the digital signal from the input terminals 31 and 32 or a digital signal from another digital signal processing operation section;
62 is a pulse generation section, 51 and 52 are digital signal processing calculation sections, 7 is an analog signal output section, 8 is an analog signal output terminal, 91 and 92 are digital signal output terminals in each of circuits A and B, 10
is a command input terminal, 11 is an interface section,
12 is a control section.

The analog signal input section 2 is comprised of an amplifier with variable gain, an antialiasing filter with variable cutoff frequency, and an A/D converter with variable quantization bit length. The clock pulses generated by the pulse generators 61 and 62 function as sampling pulses for the A/D converter and timing pulses for signal processing. Further, the analog signal output section 7 is composed of a D/A converter for D/A converting the digital data obtained as a result of processing, a low-pass filter with a variable cutoff frequency, and an amplifier with a variable gain.

In the embodiment of the digital signal processing device configured as described above, processing functions and processing conditions are transferred as commands to the control section 12 via the terminal 10 from an external control device (not shown). FIG. 2 shows an embodiment of the control section 12. The control unit 12 reads out programs for all functions executed by the digital signal processing units 51 and 52, stores them in a signal processing program ROM 13 using a dedicated memory, and processes the programs transferred via the interface unit 11. The functions and processing conditions are inputted to the control circuit 15 from the terminal 14 and decoded there, and the processing program corresponding to the processing function is read out from the signal processing program ROM 13 according to the instruction of the address pointer 16 and outputted to the terminal 17. On the other hand, the processing conditions are as follows: from the control circuit 15 to the analog signal input section 2 in FIG.
The variable amplifier gain, anti-aliasing filter cutoff frequency, A/D converter bits, etc. are input to the analog signal output section 7, the low-pass filter cutoff frequency, variable amplifier gain, etc. are input to the pulse generation section. The period of the clock pulse is transferred to 61 and 62, and the signal selection command is transferred to the selectors 41 and 42, respectively, via the terminal 18.

As shown in FIG. 3, the digital signal processing calculation section 51,
52 examples will be explained in detail.

The signal processing program transferred from the control unit 12 is stored from the terminal 17 into the signal processing program RAM 19, which is a readable/writable memory. this
The capacity of the RAM only needs to be the capacity of a program for realizing one signal processing function, and is much smaller than the capacity of the signal processing program ROM 13 in the control section 12. The arithmetic circuit 20 operates according to the contents of a signal processing program, and executes a product/sum operation, which is a basic operation of digital signal processing. This arithmetic circuit 20 may be a hard wide circuit using multipliers and adders, or may be realized by a microprocessor, digital signal processor, or the like.

A clock pulse, which operates as a start pulse for calculation, is applied to the calculation control circuit 21 from a terminal 22 from the pulse generators 61 and 62 shown in FIG.
Read the program. The digital input signal selected by the selectors 41 and 42 in FIG.
1,92 as a digital output signal. However, the digital signal processing calculation units 51, 5
Depending on the function performed in 2, for example, a signal flow that takes in a digital input signal and stores the result in the data memory 24, such as waveform analysis, or a signal flow that does not take in a digital input signal, such as signal generation, etc. The signal generated in the arithmetic circuit 20 is sent to the terminal 9.
There are several conceivable flows of signals taken out as digital output signals to 1 and 92.

As described above, according to this embodiment, it is possible to process many processing functions simultaneously and in parallel with one digital signal processing device. Addition of processing functions can be achieved by simply adding the signal processing program ROM of the control section 12.

Next, with reference to FIG. 4, an embodiment in which three digital signal processing calculation sections are provided will be described.

One digital signal processing calculation unit 51C generates random noise, and another digital signal processing calculation unit 51B band-limits the band using a digital filter function, and converts this output signal into an analog output signal. , is applied to the system under test M as a test signal, and the response signal from the system under test M is subjected to waveform analysis in another digital signal processing calculation section 51A, thereby easily determining the characteristics of the system under test M under optimal test conditions. Can be measured. As shown in this example, the device of the present invention is multifunctional and flexible, so it is possible to easily create an environment that suits the purpose of the work.

As described above, according to the present invention, not only basic signal processing but also various digital signal processing functions can be achieved with a single device, and signal processing functions can be achieved simply by adding a predetermined circuit configuration. Furthermore, a wide variety of methods can be easily achieved.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing one embodiment of the present invention, and FIGS. 2 and 3 are block circuit diagrams showing details of the control section and digital signal processing calculation section in the embodiment shown in FIG. FIG. 4 is a block circuit diagram showing a modified embodiment of the present invention including three digital signal processing calculation sections. 1... Analog signal input terminal, 2... Analog signal input section, 31, 32... Digital signal input terminal, 41, 42... Selector, 51, 52...
Digital signal processing calculation section, 61, 62... Pulse generation section, 7... Analog signal output section, 8... Analog signal output terminal, 91, 92... Digital signal output terminal, 10... Command input terminal, 11
...Interface section, 12...Control section, 13...
...Signal processing program ROM, 14...Command terminal, 15...Control circuit, 16...Address pointer, 17...Signal processing program terminal, 18...
...Command instruction terminal, 19...Signal processing program RAM, 20...Arithmetic circuit, 21...Arithmetic control circuit, 22...Clock pulse terminal, 23...Digital data terminal, 24...Data memory.

Claims (1)

[Claims] 1 Convert analog signal to digital signal,
In a digital signal processing device that performs digital signal processing such as frequency analysis processing, an analog signal input section consisting of an amplifier with variable gain, an anti-aliasing filter with variable cutoff frequency, and an A/D converter with variable quantization bit length; A digital signal input terminal for inputting a digital signal, a pulse generator for generating a clock pulse with a variable period that functions as a sampling pulse for the A/D converter and a timing pulse for signal processing, and a processing procedure for realizing a digital signal processing function. A digital signal processing calculation unit that stores the data in the form of a program and can change the calculation method under the control of the program, a D/A converter that converts the digital data obtained as a result of processing, and a cutoff frequency. An analog signal output section consisting of a variable low-pass filter and a variable gain amplifier, a digital signal output terminal connected to the output of the digital signal processing section for outputting digital data, and instructions for the digital signal processing function. an interface section for receiving from the outside, and stores all programs to be executed by the digital signal processing calculation section, and based on the processing function and processing conditions received by the interface section, the analog signal input terminal; The variable parameters regarding the pulse generation section, the digital signal processing calculation section, and the analog signal output section are set, the connections between the respective sections are selectively controlled, and a program to be executed by the digital signal processing calculation section is selected to output the digital signal. a control unit for transmitting data to a signal processing calculation unit, and configured to be able to add a plurality of predetermined circuit configurations each including the digital signal input terminal, the pulse generation unit, and the digital signal processing calculation unit as a set. A digital signal processing device characterized by: