JPH0247129B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a low-pass filter connected to the output side of a charge pump in, for example, a digital phase comparison section of a PLL motor servo circuit.

A conventional PLL motor servo circuit is configured as shown in FIG. In the figure, a signal from a frequency generator FG2 installed on the rotating shaft of a motor 1 is passed through a waveform shaping circuit 3 to a digital phase comparison circuit.
Supplied to DPC4. Further, a reference frequency signal from the reference oscillator 5 is supplied to the DPC 4, and the comparison error output thereof is supplied to the charge pump CP6. The signal from this CP 6 is then supplied to a low-pass filter 7 , and the output signal of the low-pass filter 7 is supplied to a voltage comparison circuit 9 through an amplifier 8 . Furthermore, the signal from FG2 is supplied to the voltage comparison circuit 9 through the frequency-voltage conversion circuit 10,
These comparative outputs are sent to the motor 1 through an amplifier 11.
is supplied to

In this circuit, the DPC 4 outputs signals as shown in FIG. 2C and D according to the phase difference between the output signal of the oscillator 5 as shown in FIG. 2A and the output signal of the FG2 as shown in FIG. 2B. A signal is output. Furthermore, CP6 is a kind of switching mechanism,
A signal as shown in FIG. 2E is formed in response to the signal from the DPC 4. In addition, in this signal,
In the part indicated by the broken line, the output end is in a floating state. This signal is then supplied to the low-pass filter 7 and converted into a voltage signal as shown in FIG. rotation is controlled.

In this circuit, a hold-type active filter as shown in FIG. 3 has conventionally been used as the low-pass filter 7 connected to the output side of the CP 6. That is, in Figure 3,
The output terminal of CP6 is connected to the control terminal of FET72 through a resistor 71 with a resistance value of _R1 , and this FET7
The output terminal of the amplifier 8 is connected to the input terminal of the amplifier 8 through Darlington-connected transistors 73 and 74. Furthermore, the control terminal of FET72 has a capacitance value
It is connected to the amplifier 8 through a series circuit of a capacitor 75 with a resistance value of C ₁ and a resistor 76 with a resistance value of R ₂ .

In this circuit, when the output terminal of CP6 is in a floating state, the voltage of capacitor 75 is held, and the voltage supplied to amplifier 8 is also held. On the other hand, when a high-potential pulse is formed at the output terminal of CP6, a high-potential pulse is formed across the resistor 71, and a current flows in the direction of the solid arrow, charging the capacitor 75. . Therefore, the voltage supplied to the amplifier 8 is lowered. Also CP
When a low potential pulse is formed at the output terminal of the amplifier 6, a current is caused to flow in the direction of the dashed arrow, the capacitor 75 is discharged, and the voltage supplied to the amplifier 8 is increased.

In this way, a DC voltage that changes depending on the output of CP6 is taken out from filter 7. The transfer function of this filter 7 is T(s)=1+sC ₁ R ₂ /sC ₁ R ₁ where s=jω.

However, in this circuit, suppose that the servo loop is opened at startup, and then the servo loop is closed after starting the motor 1 by any means. In this case, the FET 72 is turned off while the loop is open, and the terminal voltage of the capacitor 75 is charged to approximately the power supply voltage E. Therefore, even if the loop is closed, this capacitor 75 is discharged through the resistor 71 and the FET
Until the potential V ₁ of the control terminal 72 falls within the predetermined range,
FET72 will not operate. That is,
Even if the servo loop is closed, there will be a time delay before the servo operation starts.

Furthermore, due to the characteristics of the PLL motor servo circuit, the time constant of the low-pass filter 7 must be made considerably long. Therefore, at startup, it takes a long time for the output of the low-pass filter 7 to enter the servo operating range. In this case, in the above-mentioned low-pass filter 7, if the peak value of the voltage supplied from the CP 6 is V ₂ and the peak value of the current is I, then I = V ₂ - V ₁ /R ₁ , and the output voltage of the filter 7 is The slope of the change in is given by I/C ₁ .

In view of these points, the present invention provides a low-pass filter that takes less time to enter servo operation at startup. That is, in the present invention, a low-pass filter is constructed using a lag-lead type filter having a transfer function equivalent to that of the above-described active filter in a servo lock state and a buffer amplifier having a high input impedance. An embodiment of the present invention will be described below with reference to the drawings.

In Figure 4, the output terminal of CP6 has a resistance value of R ₁
is connected to the control terminal of FET82 through resistor 81, and the output terminal of FET82 is connected to resistor 83.
is grounded through the ripple filter 8.
4 to the input terminal of the amplifier 8. Furthermore, the control terminal of the FET 82 is grounded through a series circuit of a capacitor 85 having a capacitance value C ₁ and a resistor 86 having a resistance value R ₂ .

In this circuit, resistors 81, 86 and capacitor 85 constitute a lug-lead type filter, and FET 82 and resistor 83 constitute a high input impedance buffer amplifier.

Next, consider the transfer function of this circuit.

Generally, when a capacitor C ₁ is charged using a sampling switch as a current source, the current source is Ii (A), the output voltage is V ₀ (V), and the sampler frequency and pulse width are T.
(sec) and W (sec), the height of change in V ₀ due to one pulse ΔV=I/C ₁ W, V ₀ = _oT 〓 ^t=0 ΔV= _oT 〓 ^t=0 I/C ₁ W= _oT 〓 ^t=0 I/C ₁・W/T・T However, n=natural number.

becomes.

Here, if the period T is considered to be sufficiently small and the discrete time system is converted into a continuous time system, V ₀ =∫ ^nT _t=0 I/C ₁ ·W/Tdt, resulting in a complete integral response.

Generalizing this, if we put the pulse width W as a function W(t) of time (t) and perform Laplace transform with an initial value of 0, we get V ₀ (s) = I/T・1/sC ₁ W(s)... …(1) becomes.

Next, configure the charging of the capacitor with the voltage source Vi and the resistor R ₁ . In other words, the following linearization condition is W(t)
V ₀ (t) also changes only slightly with respect to a small change in , and the current I≈V ₁ /R ₁ to C ₁ is limited to an operating range where it is considered constant.

In this basis, constant current I = |V ₁ |/R ₁ (V ₁ is the voltage across R ₁ when the switch is turned on), so equation (1) holds, and V ₀ (s) = I/T・I /sC ₁ W (s) = |V ₁ |/T
・1/sC ₁ R ₁ W(s)...(2)

However, |V ₁ | is the pulse height value at both ends of R _1. Furthermore, under this condition, as shown in Figure 4,
According to the principle of superposition, the response when R ₂ is provided is V ₀ (s) = |V ₁ |/T(1/sC ₁ (R ₁ +R ₂ ) +R ₂ /R ₁ +R ₂ )W( s) ...(3) = |V ₁ |/T(1+sC ₁ R ₂ /sC ₁ (R ₁ +R ₂ ))W(s
)...(4) holds true.

However, it is assumed that the discrete time system is converted to the continuous time system by taking the average value of the thin pulse wave component during the period T (the second term of equation (3)).

Therefore, the transfer function T as a filter for this system
(s) is expressed as T(s)=1+sC ₁ R ₂ /sC ₁ (R ₁ +R ₂ ), where by setting R ₁ ≫ R ₂ , complete integration similar to the active filter described above can be achieved. It consists of a shaped low-pass filter.

According to this circuit, FET82 is activated at startup.
Since there is no possibility that the servo becomes inoperative, the start of the servo operation will not be delayed due to this. Also, the peak value of the current supplied to the capacitor 85 is given by I=V ₂ /R ₁ +R ₂ , where R ₁ ≫ R ₂ , so the capacitor 85 has about twice the power of the circuit shown in FIG. Current will be supplied. Therefore, the slope of the change in the output voltage of the filter 7 is approximately doubled, and the time required to enter the servo operating range is shortened.

Furthermore, according to the present invention, as is clear from the figure, the number of elements can be significantly reduced, and the entire circuit can be made smaller and lighter.

This is how the low-pass filter of the PLL motor servo circuit is constructed, and according to the present invention, the time required to enter servo operation at startup can be shortened with a simple configuration.

Note that the buffer amplifier is not limited to the source follower of the above-mentioned FET, but may have any configuration such as an emitter follower of a transistor, an operational amplifier, or the like.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a PLL motor servo circuit, FIG. 2 is a waveform diagram for explaining the same, FIG. 3 is a connection diagram of a conventional low-pass filter, and FIG. 4 is a connection diagram of an example of the present invention. 6 is a charge pump, 81, 83, 86 are resistors, 82 is an FET, and 85 is a capacitor.

Claims (1)

[Claims] 1. A charge pump connected to the digital phase comparator circuit and whose output terminal is in a floating state during steady state, a first resistor to which the output of the charge pump is supplied, and connected between the input and the output, and the output. A lug-lead type filter consisting of a series circuit of a capacitor and a second resistor connected between the reference voltage and a reference voltage, and having a transfer function of 1+sC ₁ R ₂ /1+sC ₁ (R ₁ +R ₂ ), and the output of the lag-lead circuit. A low-pass filter is provided with a high-input-resistance buffer amplifier connected to the filter so that the overall transfer function is 1+sC ₁ R ₂ /sC ₁ (R ₁ +R ₂ ).