JPH0247578A - Receiving apparatus for radar and communication using combined code sequence - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application"
The present invention relates to a receiver for radar and communication that requires high-speed synchronization of phase modulation, and particularly to a receiver for radar and communication that uses a set code sequence.

"Summary of the Invention" When receiving signals created by 0 and π two-phase quadrature modulation and balanced modulation, the present invention synchronizes the signals at high speed and uses a radar and a receiving device to track the target (No. 3). A device that enables high-speed synchronization by improving the combination of the code sequence used for the transmission signal, the code sequence used for the reception signal, and a code sequence orthogonal to the code sequence. It is.

"Conventional technology" This will be explained using the conventional example of the radar shown in FIG.

The 17th transmission source output which is the 16th output of the transmission source is the modulation code sequence 18 which is the output of the modulation code sequence generator 188.
9 is modulated (as the i number, it is modulated at the 2nd position by the 3rd and 2nd phase modulator 13.1, and becomes the transmission signal 1: (5), which is input to the power amplifier 146, power amplified, becomes the power amplifier output 147, and is It is transmitted from antenna no. 10 to the target as transmission no. 11.

The transmitted signal is the first received signal, which is a reflected wave from the target.
3, it is received by the receiving antenna 14 and becomes the receiving antenna output 15, which is input to the power divider 142 and becomes the power divider first output 143 and the power divider second output 145.

The power divider first output 1.t3 is fIS1, which is the output of the first and second phase shifter y4 in the first demodulator 154.
A multiplication operation is performed on the demodulation signal 131 to obtain a first demodulator output 155, which is input to a first intermediate frequency amplifier 162, where the high frequency component is filtered and amplified to become a first intermediate frequency amplifier output 163, which is then input to a multiplier detector. 124 as a reference signal.

The power divider second output 145 is multiplied by the second demodulation signal 133 which is the output of the second and second phase modulator 132 in the second demodulator 156 (multiplication is performed to obtain the t/S2 demodulator signal 157 This is input to the second intermediate frequency amplifier 16.t, where the high frequency component is passed on and amplified to become the second intermediate frequency amplifier output 165, which is synchronously detected in the multiplicative detector 124 and becomes the multiplicative detector output 125.

Multiplicative detector output 12 which is the output of multiplicative detector 124
5 is input to the reduced pass filter 126 and becomes a reduced pass filter output 127 which is a signal of the reduced component, and is inputted to the voltage controlled oscillator 128 as a control voltage. The voltage controlled oscillator output 129 is input as a tarokk signal to the demodulation code sequence generator 170, and the first demodulation code sequence 171 and the second demodulation code sequence 173, which is a signal orthogonal to the demodulation code sequence 171, are demodulated. is output from the code sequence generator 170.

First and second phase shift by the first code sequence 171 for demodulation, $
The local oscillator output 183, which is the output of the local oscillator 182, is modulated in the first demodulator 130 to become a first demodulation signal 131, which is input to the first demodulator 154.

The local oscillator output 183, which is the output of the local oscillator 182, is modulated by the second demodulating code sequence 173 in the second/second phase modulator 132 to become a second demodulating signal 133, which is input to the second demodulating 315G. .

In this manner, the received signal is demodulated in a state in which the code sequence of the received signal and the code sequence within the receiver are synchronized.

``Problem to be solved by the invention'' By the way, the r code sequence conventionally used in the configuration shown in Figure 2 is asymmetric within one dark period, and a code sequence with sharp autocorrelation such as the M sequence is used. Therefore, although the discriminator has a sharp 8-character characteristic, it has the problem of a 010-tuk and a cap that takes a long time to draw in because the drawing width is narrow.

The problems with the conventional method will be described in detail below.

The 17th transmitting source output, which is the 16th output of the transmitting source, is
+ 7 = S j n (”' c+α)
- (1). However, ω. is the angular frequency of the carrier wave, and α is the phase component of the carrier wave. Modulation code sequence 1 which is the output of modulation code sequence generator 188
89×1g9 = 41(ωt)
...(2). However, ω is the angular frequency of the clock of the modulation code sequence generator 188. This modulation code sequence has a sharp autocorrelation like the M1 sequence.

The 17th transmission source output which is the 16th output of the transmission source is the modulation code sequence 18 which is the output of the modulation code sequence generator 188.
9 as a modulation signal, it is two-phase modulated in the third and second phase modulator 134 to become a transmission signal 135, which is then manually input to a power amplifier 146, power amplified, and becomes a power amplifier output 147, which is transmitted from the transmission antenna No. 10 as a transmission signal No. 11. 0
sent to the target. Transmission signal No. 11 is Xll, = ka (ωt) 5in (ωct + α) ・
(3) becomes. However, k is the r term representing the amplitude.

Reception (2j <3 No. 13 reaches the number of reception r after a delay of Ti from transmission i, so the reception signal No. 13 is Ltadk a(ω(t+T;))]zin(ωc(t+
Ti)+a)...(4) The local oscillator output 183, which is the output of the local oscillator 182, is expressed as X +sl=SiI+(ωr1+β)
・Set as (5). However, β is the phase component of the local oscillator output 183. The first code sequence 171 for demodulation, which is the output of the code sequence generator 170 for demodulation, is expressed as X it,=a(ω(L+T o) )]
・Set as (6). However, TO is a phase component of the first demodulation code sequence 171 for synchronizing with the received signal.

The first demodulation signal 131 which is the output of the first/second phase converter 3i 130 is X l ) l = a Cω(t + T o) )
5in(ω, 1+β)−(7). Second demodulation code sequence 173 which is the output of the demodulation code sequence generator 170
X ,,, = A CuO+ To) )
-(8). The second demodulation signal 133, which is the output of the second and second phase modulator 132, is
(L+β)]...(9) It becomes. First? ! The modulator 15.t receives the first demodulation signal is; 131, which is the output of the first and second phase modulators 130, as a demodulation signal (No. 3 and No. 13 are demodulated, and the first demodulator output 155 is input to the first intermediate frequency amplifier 162 and passed to the first intermediate frequency amplifier output 163.
is X 163”ρ□, (ω τ)si [ω+(1+γ)
] ...(10). (!3. L, ρaa(ωτ) = rk a(ωt) a[ω(t+r
),]dt...(1st) γ=ωi T i 10α−β...(1
2) ω・=ω −ω, ・・・
(13) τ = Ti −T,
・(14).

In the second demodulation signal 156, the received signal 13 is demodulated using the first demodulation signal 133, which is the output of the second/second phase modulator 132, as a demodulation signal, and is input to the second intermediate frequency amplifier 164, and is filtered. Since the @2 intermediate frequency amplifier output 165 is
(rJ i(j+γ))−(15). However, ηiA(”r)=5k a(ωt)A
(ω(t+r))ωt (16).

In the multiplicative detector 124, the first intermediate frequency amplifier output 163
and the second intermediate frequency amplifier output 165 is subjected to multiplication detection, and the multiplication detector output 125 is input to the reduced pass filter 128, so the reduced pass filter output 129 is (ωτ)ηaA(ωτ)]′−
E[ηaA(ωτ)] ... (17) This is called the 8-character characteristic of the discret, and is the error output necessary for synchronizing the modulation code sequence 189 and the demodulation first code sequence 171. be. However, E is a symbol representing the average. The problem of entrainment will not be solved unless the 8-character characteristic of the discriminator shown in equation (17) is fundamentally corrected.

To summarize the problems from the above explanation, the following can be concluded.

The code sequences used in the past were asymmetrical in the code ellipse and had sharp autocorrelation. Because the discriminator uses a code sequence with sharp autocorrelation such as an edge sequence, the discriminator has sharp 8-character characteristics, but it also suffers from false locks due to time side lobes, and because the pull-in width is narrow, it takes time to pull-in. There was a very serious problem. Therefore,
The realization of the S-shaped '4' and T-characteristics of Diskly that solves these problems is as follows: (a) It is difficult to cause a false lock or it is easy to prevent a false lock, and (b) The bandwidth of the transmission signal is widened. However, the range of the figure 8 characteristic of the discret in synchronous bowing is wide, (1) the S'r-characteristic of the discreet has a sharp slope near zero and α, and (1) the s'r of the discret - S' that is positive in one half period of the characteristic, negative in one period of the pond, and symmetrical in sign and negative at the zero point?
There was a desire for a receiver tA device for radar and communications that had the '-characteristics.

[Means for resolving the problem] This study aims to perform two-phase modulation of 0 and π or balanced modulation using the modulation-J sequence a(ωt) generated by modulation code sequence generation 7; The signal a(ωt); in
Send a radio wave type signal containing r(ωct) to the targetGi
L, [In order to demodulate the reflected wave signal from one target, the first demodulation code sequence d(ω
t) and the demodulation code sequence generator that is orthogonal to the first demodulation code sequence a(ωt)? ! Using each signal of the two adjustment code series A(ωt), the amplitude is a [ω
(t+T, )) and Δ[ω(shitenT.)] (however, T0
: Phase amount for synchronizing with the input signal) is used to perform a multiplication operation with the received signal in the demodulator to generate an intermediate frequency signal and self-orthogonal signal whose amplitude is the autocorrelation function. An intermediate frequency signal whose amplitude is the correlation function is obtained, but the multiplication detection or F of both intermediate frequency signals (or another intermediate frequency signal created from the intermediate frequency signal) is
The error obtained by FT detection (radar, etc., which synchronizes by feeding back No. 3 to the decoupling code sequence generator via a voltage controlled oscillator, and is described below)
jSl to the combination code sequence of the third means as a(ωt)
and A(ω0).

Although the embodiment of the present invention shown in Fig. fjS1 and the conventional example shown in Fig. 2 can be realized even if the external hardware configuration is the same, Figs. 3 and 4 show that they are completely different in content.
This will be described using an explanatory diagram of a combination code sequence used in the illustrated embodiment. Here, we will explain that there are three types of means to solve the problem.

(First means) The eight modulation code sequences that are the output of the modulation code sequence generator 88 and the demodulation 'jS1 code sequence 71 that is the output of the demodulation code sequence generator 70 have the following symmetry.

This is a code sequence that can be used.

First code sequence 71 for demodulation required as a signal for synchronization
is a code sequence orthogonal to the code sequence generator 70 for demodulation.
The 12 code series 73 for demodulation, which is the output of , is selected so as to have the following symmetry.

However, ω=2πr...(19)
T=1/I...(20
), and the physical meaning of T is the code length or one period of the code sequence. The modulation code sequence 89 and the demodulation first code sequence 71 are calculated as follows from the symmetry condition of equation (18).
Ichirie series expansion is possible.

X as ”X?+ = ωt(ωt)=Σyan
sin [(2n −1)ωt+φ, )−(21)
This code sequence corresponds to 89a and (71a) in FIG. 3. Code sequences that satisfy equation (18) will be referred to as r'x examples hereinafter.
If the regularity of 89a and (71a) in FIG. 3 is followed, this can be easily realized. Since the second code sequence for demodulation 73 is orthogonal to the symmetry condition of equation (22) and the code sequence for demodulation 71, it can be expanded into a 7-lier series as follows.

X,, = Aa (ωt) = hair Z, nC05 [(2n -1) ωt + φ,) - (2
3) (However, Zin is a coefficient of a 7-lier series) This code series corresponds to FIG. 3 (73a).

The code sequence that satisfies the symmetry condition of equation (22) will be expressed as “
This is a code sequence that can be concretely and easily realized by following the regularity of (73a) in the Pt53 diagram described in "Example".

Multiplying detector output 25 which is the output of multiplying detectors 2 and 1
is X25 η, aΔ(ωτ) = S I aa(ωt)Aa(ω(t+
) Ndt=Σ y@4 Zin sing: (2
n 1 )ωτ] (24), and a figure-8 characteristic symmetrical about the zero point is obtained.

(Second means) The modulation code sequence 89 that is the output of the modulation code sequence generator 88 and the demodulation first code sequence 71 of the demodulation code sequence generator 70 have the following symmetry.

The modulation code sequence 89 and the demodulation first code sequence 71 are expressed by the formula (
From the symmetry condition of 25), the 7-lier series expansion can be done as follows.

X ll5= X 71 =a-(”t)=Σ yb
n cos(nωt) ・
(26) This code sequence is 89)] and (71b) in Figure 3.
). Code sequences that satisfy the symmetry condition of equation (25) are 89b and 1 in FIG. 3, which will be explained in "Example" below.
．． If the regularity of # (7th 1st +) is followed, this is a code sequence that can be concretely and easily realized.

First code sequence 71 for demodulation required as a signal for synchronization
is a code sequence orthogonal to the code sequence generator 70 for demodulation.
The second code sequence 73 for demodulation, which is the output of Jζ, is selected so as to have the following symmetry.

A b (ωt) = Al, (-ωt)
(27) The second code sequence 73 for demodulation can be expanded into a 7-lier series as follows from the symmetry condition of equation (27).

X7z = Ab(ωt) =Σ zl,,, sin C(2n -1) ωt)
・(28) This code sequence is shown in (73b) in Figure 3.
).

The code sequence that satisfies the symmetry condition of equation (27) will be expressed as “
This is a sequence that can be concretely easily realized by following the regularity (731>) in FIG. 3, which will be explained in "Example".

The multiplicative detector output 25, which is the output of the multiplicative detector 24, is
[ab(ωt)Ab(”(t+τ))ldt=Σ
y z 5in [(2n −1)ω τ )
- (29) bn bn , and a figure-8 characteristic symmetrical about the zero point is obtained.

(Third Means) The eight modulation code sequences output from the modulation code sequence generator 88 and the first demodulation code sequence 71 of the demodulation code sequence generator 70 have the following symmetry.

Re(ωl" ac(-ωt)...(3
0) Modulation code sequence 89 and ? ! l Chokawa open code series 7
1 can be expanded into a 7-lier series from the symmetry condition of equation (30) as follows.

X 8. ,=X,,=ac(ωt)=Σ
y 5in [(2n 1)ωt] ・ (3
1) 0 units This code sequence corresponds to 89c and (71c) in FIG. Code sequences that satisfy the symmetry condition of equation (30) are 89c and (71c) in FIG. 3, which will be explained in "Example" below.
This is a code sequence that can be easily realized by following the regularity of .

First code sequence 71 for demodulation required as a signal for synchronization
is a code sequence orthogonal to the code sequence generator 70 for demodulation.
The second code sequence 73 for demodulation, which is the output of , is selected so as to have the following symmetry.

The 12 code series 73 for demodulation can be expanded into a 7-lier series as follows from the symmetry condition of equation (32).

X73 = Ac(ωt) =Σz　cos(nωt)・(33)cn This code sequence corresponds to (73c) in FIG.

The code sequence that satisfies the symmetry condition of equation (30) will be expressed as “
This is a code sequence that can be concretely and easily realized by following the regularity of (73c) in the ff13 diagram explained in "Example".

The output 25 of the multiplier wave generator 24, which is the output of the multiplier wave generator 24, is expressed as
t) Ac(ω(L+τ) ) 1dt=f,, y
z 5in [(2n 1)ω(t+τ)]n c
n (34), and a character-eight characteristic symmetrical about the zero point is obtained.

From the explanations so far, if we use the three types of code series mentioned above, there will be an effect in which equations (24), (29), and (34) are the equation %(35), and eventually It can be seen that this is also desirable as a symmetry of the 8-character characteristic of Discri.

"Example" The embodiment of the present invention shown in FIG. 1 will be described.

The transmission source output 17, which is the output of the transmission source 16, is subjected to two-phase modulation in the third and second phase modulators 3 and 1 using the modulation code sequence 89, which is the output of the modulation code sequence generator 88, as a modulation signal, and is then transmitted. The reliable signal 35 is manually amplified by the power amplifier t6 and becomes the power amplifier output 47, which is transmitted from the transmitting antenna 10 to the target as the first transmit signal.

The transmitted signal is sent to the receiving antenna 1 as a received signal 13.
4 and becomes the receiving antenna output 15, which is input to the power divider 42 and becomes the power divider first output 43 and the power divider second output 45.

The power divider first output 43 is ff in the first demodulator 54.
The first demodulation signal 3 which is the output of the 1l/2 phase modulator 30
A multiplication operation with 1 is performed to obtain the first demodulator output 55, which is then manually inputted to the first intermediate frequency amplifier 62, where the high frequency component is passed on and amplified to become the first intermediate frequency amplifier output 63, and the multiplication result is the first intermediate frequency amplifier output 63. Used as a reference signal.

The power divider second output 45 is output to the second demodulator 56.
- A multiplication operation is performed with the second demodulation signal 33 which is the output of the two-phase modulator 32, resulting in the second demodulator output 57, which is input to the second intermediate frequency amplifier 64, where the high frequency component is filtered and amplified to produce a 1lQ2 intermediate signal. It becomes the frequency amplifier output 65, and is synchronously detected in the multiplication wave generator 24, and becomes the multiplication experience wave generator output 25.

The hanging experience wave device output 25 is the output of the hanging experience wave device 24.
is input to the low-pass filter 26 and becomes the low-pass filter output 27, which is a low-frequency component signal.
is input to the voltage controlled oscillator, resulting in two voltage controlled oscillator outputs, and is input as a clock signal to the demodulation code sequence generator 70, and is inputted to the demodulation code sequence generator 70 as a demodulation first code sequence 71 and a demodulation signal which is a signal orthogonal to the demodulation first code sequence 71. A second code sequence 73 is output from the demodulation code sequence generator 70.

The first and second phase modulators 3
0, the local oscillator output 83, which is the output of the local oscillator 82, is modulated to become the first demodulation signal 31, which is input to the first demodulator 54.

The second/second phase modulation 21 is performed by the second code sequence 73 for demodulation.
At 32, the local oscillator output 83, which is the output of the local oscillator 82, is modulated and becomes the @22 demodulation signal 33, which is input to the second demodulator 56. In this way, the sending (i[) and the receiving signal are synchronized.

The other output of the tjS1 intermediate frequency amplifier output 63 is input to the No. 13 detector 80 and becomes the signal detector output 81, and is input to the modulation code sequence generator 88 and demodulation code sequence generator 70 to be converted into a different code sequence. Can be switched. For example, it is possible to switch from the set code series of the first to third means below to the vertical iron Langum code series.

In this way, the most preferable code sequence is selected and the received signal is recovered in synchronization with the received signal.

89a and (71a) in FIG. 3 corresponding to (first means)
) will be explained in relation to the modulation code sequence 89, the first demodulation code sequence 71, and the demodulation 12 code sequence 73.

The modulation code sequence 89 and the first code sequence 71 for the i-th key are created with an even number of bits, so if the code sequence is expressed in units of 2 bits, 89a and (71a) in FIG. 3 are expressed as aa(ωt) = ωt[(L 1), (-1,1
), (1, 1), (1, 1)] ... (38) (1.-1 is the value of 1 bit, aa[] is (-1, +
1 ), ..., (1, 1).

), and in the example of the Pt53 diagram, the code sequence with a code length of 24 bits (-1-1-1, 1-1-1
, -1-first, -1-1, 1-1-1, 11th, 1-1, 1-11), and the symmetry satisfies the condition of equation (18). (73a) in FIG. 3, which corresponds to the second demodulation code sequence 73, corresponds to the 2-bit code of the modulation code sequence 89 or the first demodulation code sequence 71 by a factor of 1, respectively, so that Aa(ωt)=AaC( -1,1), (-1,1),
(1, 1), (1, 1)] ... is created as shown in (39). Alternatively, A & (ωt) = Aa [(1r 1 ), (1, 1
), -1, 1), (-1, 1)]...(40), and the symmetry satisfies the condition of equation (22).

With this method, the modulation code sequence 89, the demodulation first code sequence 71, and the demodulation second code sequence 73 can be created in a fixed manner.

89b and (71b) in FIG. 3 corresponding to (second means)
) will be explained in relation to the modulation code sequence 89, the demodulation first code sequence 71, and the demodulation fiS2 code sequence 73.

The modulation code sequence 89 and demodulation first code sequence 71 are created with an even number of bits, so if the code sequence is expressed in 2-bit length, 89b and (71b) in Fig. 3 are expressed as ab(ωt) = ab[(L 1), (-1,
1), (1, 1), (1, 1)] ... (41), and in the example shown in Figure 3, the code length created by combining four types of code sequences made from 3 bits is 24. A code sequence of bits (1-1-1, -1-1, 1-1-1, 11th, 11th, -1-1st, -1-1, -1-1), The symmetry satisfies condition f1 of equation (25).

(73b) in FIG. 3 corresponding to the second code sequence 73 for demodulation
is the modulation code sequence 89 or the demodulation first code sequence 71
Ab(ω)=Ab[(1, 1), (-1, 1), (
1, 1), (1, 1)] ... (42). Alternatively, Al, (ωt) = Ab[: (x, -1), (1, 1), which is a code sequence with the polarity reversed in Equation (42)
, (-1, 1), (-1, 1)] ... (43), and the symmetry satisfies the condition of equation (27).

By such a method, the modulation code sequence 89, the demodulation first code sequence 71, and the demodulation second code sequence 73 can be specifically created.

89c and (71c) in FIG. 3 corresponding to (third means)
) will be explained in relation to the modulation code sequence 89, the first demodulation code sequence 71, and the second demodulation code sequence 73.

The modulation code sequence 89 and the demodulation ff1l code sequence 71 are created with an even number of bits, so if the code sequence is expressed in units of 2 bits, 89c and (71c) in the Pt53 diagram are ac(ωt) = k s + n (layer sH++(
sinω5(t))1...(44) (However, sign A 24-bit code sequence (-
1-1st, -1-1st, 1-1-1, -1-1-1, 11th, 1-1st, 1-1st, -11th), and the symmetry is expressed by equation (30 ) satisfies the conditions. However, ωS (L
) corresponds to the angular frequency representation of the code sequence.

(73
c) corresponds to the 2-bit code of the modulation code sequence 89 or the demodulation first code sequence 71, respectively, and Ac(ωt) = k 5in(dsHn[cosωS
(shi) Moon... (45) It is created with the following relationship, and the symmetry satisfies the conditions of equation (32). More specifically, (71c) in Figure 3
The relationship between the code sequences forming a set shown in and (73c) is obtained by switching the positive and negative signs at the midpoint of each pulse
A code sequence has been created.

The explanatory diagram of the set code series shown in FIG. 4 used in the first embodiment will be explained.

89d and (89d in Fig. 4, which correspond to an alternative solution of (third means))
The code sequence 71d) will be explained in relation to the modulation code sequence S9, the first demodulation code sequence 71, and the second demodulation code sequence 73.

89d and (71d) in FIG. 4, which correspond to eight modulation code sequences and the first demodulation code sequence 71, are 89c in FIG.
Or, similar to (71c), the symmetry can be expressed as Eq. (30)
satisfies the conditions. (73d) in FIG. 4, which corresponds to the second demodulation code sequence 73, is aa(1)-Ab(1, -1)
・(46)ai(1)→Ad(1,1)
...(47), and the second code sequence for demodulation 73 satisfies the symmetry condition of equation (32).

By such a method, eight modulation code sequences, a first demodulation code sequence 71, and a second demodulation code sequence 73 can be specifically created.

With the above (first means) to (third means),
After synchronizing with the reflected wave from the target using the indicated code sequence and confirming the synchronization using the signal detector output 81, the modulation code sequence 89, the first demodulation code sequence 71, and the second demodulation code sequence are A configuration may be adopted in which the effect of removing the f-required signal is enhanced by switching the code sequence 73 to a vertical random code sequence having a sharp autocorrelation function.

"Supplementary explanation" (A) In the case of 4-phase modulation, X, = ka (ωt) sin [ωcL + α] + k
b(ωt) cos(ωct10 :l
-(48), and if B(ωt) or A(ωt) is created for the cosine component b(ωt) or sine component a(ωt) of two-phase modulation, the received signal is Since it can be demodulated and synchronized, the same effect of the invention can be expected even with four-phase modulation.

(b) Regarding the physical meaning of k regarding equation (3) =
1 + p sin qt = 14
9), it becomes amplitude modulation, so in the embodiment of FIG. 1, an amplitude modulation signal may be used. However, p is the amplitude and q is the angular frequency of the modulation signal.

(1) If we consider the physical meaning of α as a variable related to time, then
It can be seen that phase modulation and frequency modulation are included.

(1) In the example of PJS1 diagram, single super
Although the hetero gain method has been explained, a double or triple super hetero gain method may also be used.

(E) The hanging experience wave device of the embodiment shown in Fig. 1 is an F which is realized in a software manner by folding the Deinotal force type E” F T M.
An FT detector may also be used to extract the error signal.

(Power) PtS1 In the embodiment shown in the figure, a radar in which a transmitter and a receiver are integrated has been explained, but if the transmitter and receiver are located in separate locations, the communication receiving device according to the present invention will be described. This is the basic configuration for synchronous demodulation.

(g) The relationship between equations (39) and (40) is Ab(ωt
) = ± Al [(-1, 1), (-1, 1), (1, 1)
, (1, 1)] ... has the same meaning as (50),
Equations (42) and (43) can also be expressed using similar equations.

(R) The error signal obtained from the multiplication waveform output or FFT detection is E[ηIA(ωτ)ρ2. (ωτ)
], E[ηIA(ωτ)] or E[η, A(ω
τ)/ρ2. (ωτ)] Any erroneous signal may be used.

(vii) The transmission signal may be two-phase modulated by pulse modulation or two-phase modulated by continuous wave.

"Effect of the invention" The effects of the present invention are as follows.

(a) In this system, since the output of the intermediate frequency amplifier is an autocorrelation function of the received signal, it corresponds to configuring a matched filter, and this is a type of maximum jA reception band that realizes high-speed synchronization.

(b) It is difficult to interfere with the intermediate frequency amplifier unless the transmitted signal is decrypted, so it is resistant to radio interference.

(1) Since the transmission code sequence and the orthogonal code sequence for demodulation are matched and used in combination, an 8-character characteristic with good positive and negative symmetry with respect to the zero point is obtained, and the pull-in width is wide.

(1) For radar applications, if the code sequence length is the same,
Switching from a code sequence that is easy to pull in to a code sequence that is resistant to radio wave interference is instantaneous, so it has both easy pull-in and excellent performance against radio wave interference.

[Brief explanation of the drawing]

rIS1 diagram is a block diagram of the embodiment of the present invention, FIG. 2 is a block diagram of the conventional example, and FIG. 3 and fjS
FIG. 4 is an explanatory diagram of an example of a code series used in the embodiment of the present invention. 10... Transmission antenna, 1st... Transmission signal, 13.
...Reception signal quality, 14...Reception antenna, 15...
Reception antenna output, 16... Transmission source, 17... Transmission source output, 24... Multiplying wave generator, 25... Multiplying wave generator output, 26... Reducing pass filter. 27... Reduced pass filter output, 28... Voltage controlled oscillator, 29...
- Voltage controlled oscillator output, 30... First and second phase modulator, 31... First demodulation signal, 32... Second and second phase modulator, 33... Second demodulation signal, 34...3rd...
2-phase modulator, 35... for transmission (No. 3, 42... power divider, 43... power divider first output, 45...
Power divider second output, 1G...power amplifier, 47.
...Power amplifier output, 54...First demodulator, 55...
・First modulator output, 56...Second demodulator, 57...
Second demodulator output, 62... fjS1 intermediate frequency amplifier,
63...First intermediate frequency amplifier output, 64...Second intermediate frequency amplifier, 65...tjS2 intermediate frequency amplifier output, MA0...Demodulation code sequence generator, 71...Demodulation number 1 code sequence, 73...Second code sequence for demodulation, 80.
...Signal detector, 31...Signal detector output, 82...
・Local oscillator, 83...Local oscillator output, 88...
Modulation code sequence generator, 8...Modulation code sequence, 10th...Transmission antenna, 11th...Transmission signal, 1st
3...Reception signal, 14th...Reception antenna, 15th
...Reception antenna output, 16th...Transmission source, 17th
...Transmission source output, 124...Holding experience wave device, 125
... Multiplication experience wave 2; Output, 126 ... Reduced pass filter, 127 ... Reduced pass filter output, 128 ... Voltage controlled oscillator, 129 ... Voltage controlled oscillator output, 13
0... First and second phase modulator, 131... First demodulation signal, 132... Second and second phase modulator, 133...
Second return signal, 1; 3. ■... Third/second phase modulator, 135... Transmission signal, 142... Power divider,
143...Power divider first output, 15th...Power divider second output, 146...Power amplifier, 147...
Power amplifier output, 154...first demodulator, 155...
・[1st demodulator output, 156... 2nd demodulator, 157・
...12 demodulator output, 162...first intermediate frequency amplifier, 163...! R1 intermediate frequency amplifier output, 164...
・12 intermediate frequency amplifier, 165... 2nd intermediate frequency amplifier output, 170... code sequence generator for demodulation, 171.
...First code sequence for demodulation, 173... Second code sequence for demodulation, 182... Local oscillator, 183... Local oscillator output, 188... Code sequence generator for modulation, 189.
...Modulation code sequence.

Claims (1)

[Scope of Claims] (1) Signal a(ωt) sinf( ω_ct) (where f(ω_ct): a function of ω_ct, ω_c: the angular frequency of the carrier wave) is transmitted toward a target, and in order to demodulate the received signal, which is a reflected wave signal from the target, The first demodulation code sequence a(ωt) generated by the demodulation code sequence generator and the first demodulation code sequence a(ωt)
Using each signal of the second demodulation code sequence A(ωt) generated by the demodulation code sequence generator which is orthogonal to
However, using each demodulation signal (T_0: phase amount for synchronizing with the input signal), a demodulator performs a multiplication operation with the received signal to generate an intermediate frequency signal whose amplitude is the autocorrelation function. and an intermediate frequency signal whose amplitude is the self-orthogonal correlation function, and the error signal obtained by multiplication detection or FFT detection of both intermediate frequency signals or other intermediate frequency signals created from both intermediate frequency signals is determined as a voltage. Synchronization is achieved by feeding back to the demodulation code sequence generator via a controlled oscillator, and as the modulation code sequence a(ωt) and demodulation first code sequence a(ωt), a_ with the following symmetry a_a(ωt)=-a_a(ωt+T/2)
a(ωt), and as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the set, the following symmetry A_a(ωt)=−A_a(ωt+T/2 ) with A_
a(ωt), or the following symmetry a_b(T/
a_b(ω) with 2+ωt)=a_b(T/2-ωt)
t) and has the following symmetry A_b(ωt)=-A_b(-ωt) as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the pair. (ω
Alternatively, as the modulation code sequence a(ωt) and the demodulation first code sequence a(ωt), the following symmetry a_c(ωt
)=-a_c(-ωt), the second demodulation code sequence A(
A set code series characterized in that the synchronization pull-in time is shortened by using A_c(ωt) having the following symmetry A_c(T/2+ωt)=A_c(T/2-ωt) as ωt). radar using. (2) Signal a(ωt) sinf(ω_ct) generated by 0, π two-phase modulation or balanced modulation using modulation code sequence a(ωt) generated by a modulation code sequence generator (however, f (ω_ct): a function of ω_ct, ω_c: the angular frequency of the carrier wave) is transmitted to a target, and a demodulation code sequence generator is used to demodulate the received signal, which is a reflected wave signal from the target. The first demodulation code sequence a(ωt) created by the demodulation first code sequence a(ωt)
Using each signal of the second demodulation code sequence A(ωt) generated by the demodulation code sequence generator which is orthogonal to
However, using each demodulation signal (T_0: phase amount for synchronizing with the input signal), a demodulator performs a multiplication operation with the received signal to generate an intermediate frequency signal whose amplitude is the autocorrelation function. and an intermediate frequency signal whose amplitude is the self-orthogonal correlation function, and the error signal obtained by multiplication detection or FFT detection of both intermediate frequency signals or other intermediate frequency signals created from both intermediate frequency signals is determined as a voltage. Synchronization is achieved by feeding back to the demodulation code sequence generator via a controlled oscillator, and as the modulation code sequence a(ωt) and demodulation first code sequence a(ωt), a_ with the following symmetry a_a(ωt)=-a_a(ωt+T/2)
a(ωt), and as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the set, the following symmetry A_a(ωt)=−A_a(ωt+T/2 ) with A_
a(ωt), or the following symmetry a_b(T/
a_b(ω) with 2+ωt)=a_b(T/2-ωt)
t) and has the following symmetry A_b(ωt)=-A_b(-ωt) as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the pair. (ωt), or as the modulation code sequence a(ωt) and demodulation first code sequence a(ωt), the following symmetry a_c(ωt
)=-a_c(-ωt), the second demodulation code sequence A(
By using A_c(ωt) with the following symmetry A_c(T/2+ωt)=A_c(T/2-ωt) as ωt), the signal detector output can be synchronized with the reflected wave from the target. After confirming synchronization, the modulation code sequence, the first demodulation code sequence, and the second demodulation code sequence are switched to pseudorandom code sequences having a sharp autocorrelation function, thereby increasing the effect of removing unnecessary signals. A radar using a set code sequence characterized by. (3) Synchronization signal a(ωt) sinf generated by 0, π two-phase modulation or balanced modulation using modulation code sequence a(ωt) generated by a modulation code sequence generator
(ω_ct) In order to synchronously demodulate a radio wave type signal including The signals of the second demodulation code sequence A(ωt) generated by the demodulation code sequence generator are used, and the amplitudes are a[ω(t+T_0)] and A[ω(t+T_0)](
However, using each demodulation signal (T_0: phase amount for synchronizing with the input signal), a demodulator performs a multiplication operation with the received signal to generate an intermediate frequency signal whose amplitude is the autocorrelation function. and an intermediate frequency signal whose amplitude is the self-orthogonal correlation function, and the error signal obtained by multiplication detection or FFT detection of both intermediate frequency signals or other intermediate frequency signals created from both intermediate frequency signals is determined as a voltage. Synchronization is achieved by feeding back to the demodulation code sequence generator via a controlled oscillator, and as the modulation code sequence a(ωt) and demodulation first code sequence a(ωt), a_ with the following symmetry a_a(ωt)=-a_a(ωt+T/2)
a(ωt), and as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the set, the following symmetry A_a(ωt)=−A_a(ωt+T/2 ) with A_
a(ωt), or the following symmetry a_b(T/
a_b(ω) with 2+ωt)=a_b(T/2-ωt)
t) and has the following symmetry A_b(ωt)=-A_b(-ωt) as the second demodulation code sequence A(ωt) which is the output of the demodulation code sequence generator forming the pair. (ωt), or as the modulation code sequence a(ωt) and demodulation first code sequence a(ωt), the following symmetry a_c(ωt
)=-a_c(-ωt), the second demodulation code sequence A(
A set code series characterized in that the synchronization pull-in time is shortened by using A_c(ωt) having the following symmetry A_c(T/2+ωt)=A_c(T/2-ωt) as ωt). A receiving device for communication using. (4) The modulation code sequence and the demodulation first code sequence a_
a(ωt) is created with an even number of bits, and if the code sequence is expressed in 2-bit units, a_a(ωt) = a_a [(-1, -1), (-1, 1
), (1, -1), (1, 1)], and the second demodulation code sequence Aa(ω
t) is A_a(ωt)=±A_a[(-1, 1), (-1, -
1), (1, 1), (1, -1)] A radar using the set code sequence according to claim 1 or 2, which is created as follows. (5) The modulation code sequence and the demodulation first code sequence a_
a(ωt) is created with an even number of bits, and if the code sequence is expressed in 2-bit units, a_a(ωt) = a_a [(-1, -1), (-1, 1
), (1, -1), (1, 1)], and the second demodulation code sequence A_a(ωt) that forms the set is A_a(ωt)=±A_a[(-1, 1), ( -1, -
1), (1, 1), (1, -1)] A receiving device for communication using the set code sequence according to claim 3, which is created as follows. (6) The modulation code sequence and the demodulation first code sequence a_
b(ωt) is made with an even number of bits, and if the code sequence is expressed in 2-bit units, a_b(ωt) = a_b[(-1, -1), (-1, 1
), (1, -1), (1, 1)], and the second demodulation code sequence A_b(ωt) that forms the set is A_b(ωt)=±A_b[(-1, 1), ( -1, -
1), (1, 1), (1, -1)] A radar using the set code sequence according to claim 1 or 2, which is created as follows. (7) The modulation code sequence and the demodulation first code sequence a_
b(ωt) is made with an even number of bits, and if the code sequence is expressed in 2-bit units, a_b(ωt) = a_b[(-1, -1), (-1, 1
), (1, -1), (1, 1)], and the second demodulation code sequence A_b(ωt) that forms the set is A_b(ωt)=±A_b[(-1, 1), ( -1, -
1), (1, 1), (1, -1)] A receiving device for communication using the set code sequence according to claim 3, which is created as follows. (8) The modulation code sequence and the demodulation first code sequence a_
c(ωt) is the second code sequence A for demodulation that is created with an even code length and is paired with the first code sequence a_c(ωt) for demodulation.
_c(ωt) is created in the relationship between code sequences created by switching between positive and negative signs at the center point of the pulse, or as the modulation code sequence or the first demodulation code sequence a(ωt). A_d(ω
t) is created by dividing a_d(1) → A_d(1, -1) a_d(-1) → A_d(-1, 1), respectively. Radar. (9) The modulation code sequence and the demodulation first code sequence a_c(ωt) are created with an even code length, and the demodulation second code sequence A_c is paired with the demodulation first code sequence a_c(ωt). (ωt) is created in the relationship between code sequences created by switching between positive and negative signs at the pulse center point, or a_d as the modulation code sequence or the first demodulation code sequence a(ωt). (ωt) as the second code sequence A(ωt) for demodulation.
t) is created by dividing a_d(1) → A_d(1, -1) a_d(-1) → A_d(-1, 1), respectively. receiving device.