JPH0248826A - Integration type a/d conversion circuit - Google Patents

Abstract

PURPOSE:To make the start time of a reference voltage integration period of a 1st A/D converter and the start time of a reference voltage integration period of a 2nd A/D converter identical and to implement the arithmetic processing of the high-order and the low-order bits in parallel by applying the result of calculation between a selected reference voltage and an analog signal directly to a noninverting input terminal of an integration amplifier built in the 2nd integration type A/D converter. CONSTITUTION:The 1st dual integration type A/D converter 3 generates a digital signal corresponding to a level of an analog input signal and a output signal of the converter 3 is hold in a holding circuit 12. A reference voltage corresponding to a level of a high-order bit in plural reference voltages is generated selectively from a reference voltage generating circuit 13 in response to an output signal of the circuit 12. An output reference voltage of the voltage generating circuit 13 and the analog input signal are calculated by a subtraction circuit 24, the result of the calculation is given to a noninverting input terminal of an integration amplifier 28 of a 2nd dual integration type A/D converter 25 to generate a digital signal equivalent to a low-order bit corresponding to the level of the analog input signal in response to the input signal.

Description

Detailed Description of the Invention (a) Industrial Application Field The present invention relates to an integral type A/D (analog/digital) conversion circuit for converting an analog signal into a digital signal, and particularly relates to an integral type A/D (analog/digital) conversion circuit for converting an analog signal into a digital signal. This invention relates to an integral type A/D conversion circuit designed to achieve

(B) Conventional technology Various A/D conversion circuits for converting analog signals into digital signals have been proposed in the past, and are selectively used depending on the application. As the A/D conversion circuit, an integral type A/D conversion circuit is mainly used, and this is applied to digital multimeters, electronic scales, and the like. Further, as a medium-speed A/D conversion circuit whose conversion time is from several μs to several hundred μs, a successive approximation type A/D conversion circuit is used, and this is applied to PCM communications, digital audio, and the like. Further, as a high-speed A/D conversion circuit with a conversion time of several hundred ns or less, a parallel comparison type A/D conversion circuit is used and has been widely applied in the fields of video signal processing and measurement. Regarding A/D conversion circuits, please refer to 1 Illustrated A/D published on July 30, 1985.
Converter Introduction”.

By the way, a double integral type A/D conversion circuit is known as one type of integral type A/D conversion circuit. The A/D conversion circuit applies the voltage to be measured to the integrating circuit and converts the voltage to be measured for a certain period of time (second
After the input voltage integration period (t, ) in the figure has elapsed, the application of the voltage to be measured is stopped, and instead, a reference voltage having a polarity opposite to that of the voltage to be measured is applied to the integration circuit. (Reference voltage integration period Htr in Figure 2) At the same time, a clock pulse with a known frequency was applied to the counter, and the output voltage of the integration circuit returned to the original reference value (zero in the case of Figure 2). At this point, the supply of black and ivy pulses to the counter is stopped. At this time, the count value counted by the counter corresponds to the voltage to be measured, and a digital value is obtained from the count value of the counter. The double-integration type A/D conversion circuit has many advantages, such as requiring a small number of elements, being unaffected by fluctuations in the constant of integration, and being unaffected by long-term drifts of clock pulses. and is widely used.

(c) Problems to be Solved by the Invention However, the conventional integration method has the disadvantage that the conversion time is slow because the conversion time is determined depending on the time constant during integration. A parallel comparison type A/D conversion circuit as mentioned above is an example of a device with a fast conversion time, but this A/D conversion circuit requires a very large number of elements when obtaining a high-order bit digital signal. Therefore, when integrated into an IC, there were problems such as an increase in chip area and an increase in current consumption. Therefore, a double integration type A/D conversion circuit with a fast conversion time has been desired.

(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and provides a first integral type A/D conversion that generates a digital signal of upper bits corresponding to the level of an analog input signal. a holding circuit that holds the output signal of the integrating circuit in the first integrating type A/D converter; and a holding circuit that holds the output signal of the integrating circuit in the first integrating type A/D converter; a reference voltage generation circuit that selectively generates a corresponding reference voltage; an arithmetic circuit that performs an operation between the output reference voltage of the reference voltage generation circuit and the analog input signal; and an integration circuit that has positive and negative input terminals. a second circuit comprising an amplifier, the output signal of the arithmetic circuit being applied to a positive input terminal of the amplifier, and generating a digital signal of lower bits corresponding to the level of the analog input signal in accordance with the output signal of the arithmetic circuit; It is characterized by consisting of an integral type A/D converter.

(*) Effect According to the present invention, the first integral type A for obtaining the upper bits
The output voltage after the input voltage integration period of the integration circuit built in the /D converter is held, and the reference voltage corresponding to the level of the upper bit is selected from the reference voltage generation circuit according to the output voltage that has been held. Then, the selected reference voltage and the analog input signal are calculated, and the result of the calculation is A/D converted by the second integral type A/D converter. that time,
The selected reference voltage is directly applied to the positive input terminal of an integrating amplifier built in the second integrating type A/D converter. Therefore, the start time of the reference voltage integration period of the first integration type A/D converter and the start time of the reference voltage integration period of the second integration type A/D converter can be made almost the same, Arithmetic processing for obtaining upper bits and lower bits can be performed in parallel.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which (1> is an input terminal to which an analog input signal Vx is applied, and (2) is an input terminal with a polarity opposite to that of the analog input signal Vx. Reference voltage (-vr
ef) is applied to the reference power supply terminal, (3) is the first to third switches (4a) to (4C), and the first integrating circuit 5)
, first comparator (6), first control circuit (7), first
Consists of a counter (8) and a first latch circuit (9),
a first for determining the upper bits of the analog input signal Vx;
(10) is a clock source for supplying clock pulses to the first control circuit (7);
(11) is a fourth switch to which the output signal of the first integrating circuit (5) is applied, and (12) is the fourth switch (
11> is a holding circuit connected to the other end, (13) is a reference voltage generation circuit for obtaining the upper bit analog voltage,
A first resistance group (16 )
and a plurality of comparison circuits (17a) to <17 for comparing the first reference voltage obtained at the connection point of the plurality of resistors (15a) to (15d) and the output signal of the holding circuit (12).
c) a comparison circuit group (18) consisting of a selection circuit (26);
, a second reference power source (19), and the second reference power source (19)
A second resistor group (20g) to (20d) connected in series between the
1), and a switch group (22a) to (22d) for selecting one of the plurality of second standard tolerance voltages obtained at the connection points of the resistors (20a) to (20d).
η). Further, (24) is a subtraction circuit that subtracts the analog input signal Vx and the reference voltage from the reference voltage generation circuit (13), and (25) is a subtraction circuit that subtracts the analog input signal Vx and the reference voltage from the reference voltage generation circuit (13). Integral circuit (28)
, second humparator (29), second control circuit (3G),
The second integrating type A/D converter is composed of a second counter (31) and a second latch circuit (32) and determines the lower bit χ of the analog input signal Vx. This shows the case where the signal Vx is converted into a digital signal with a total of 4 pits, each with upper and lower 2 bits. It is equipped with a resistance of 1. In addition, control signals (A, B, C, D) generated from the first control circuit (7)
are the first to fourth switches (4a), (4b),
(4c), 1 selection circuit (11) that switches and controls
The control signal (E) generated from the switch (26)
Only one of a) to (22d) is turned on. It is assumed that the switches in FIG. 1 are all turned off as shown in the initial state.

Next, the A/D conversion operation will be explained.

(Reset Period) During the reset period, a control signal A is generated from the first control circuit (7) to turn on the first switch (4a).

Then, since the first integrating capacitor (33) is discharged, the output voltage of the first integrating circuit (5) becomes zero as shown in the reset period of FIG.

(Input voltage integration period: tl) When the input voltage integration period starts from the reset period, control signal B is generated from the first control circuit (7), control signal A is stopped, and only the second switch (4b) is turned on. do.

When the second switch (4b) is turned on, integration of the analog input signal Vx starts.

At the same time, a counter built in the first control circuit (7) receives clock pulses from the clock source (10) and starts counting. At this time, the current 11 flowing through the first resistor (34) is X, -V, /R1 (1) [where R1 is the resistance value of the first resistor (34)].

If the output voltage of the first integrating circuit (5) is v, 1, then Vl
l is, ■□BL-11t1/C1・・・・・・・・・・・・・・・
......(2) Therefore, by substituting equation (1) into equation (2), the output voltage v,1 becomes Yet--(1/Ct)(V- /R+)ntT --
--------(3), and descends along the solid line in FIG. Thereafter, when the counter built in the first control circuit (7) generates a L1 count completion signal for a predetermined number of clock pulses, a control signal C is generated from the first control circuit (7).

(Reference voltage integration period: t) The third switch (4c) is turned on in response to the control signal C. When the third switch (4C) is turned on, the signal Vx
The reference voltage -V ref of opposite polarity is the first amplifier (35)
Since the voltage is applied to the negative input terminal (-) of the first capacitor (33), the first capacitor (33) is discharged and a constant current (Vref/Rt
) flows through the first resistor (34). On the other hand, at the same time as the third switch (4C) is turned on, the first control circuit (7) passes the clock pulse from the clock source (10) and the first control circuit (7) passes the clock pulse from the clock source (10).
is applied to the counter (8). Therefore, the first counter (8) starts counting.

Assuming that the initial charging voltage of the first capacitor (33) is VCO, the voltage vc0 is Vco = -V* s - (1/Ct) (V-/
R+ ) nsT (4) during the discharging period of the first capacitor (33), the first integrating circuit (5
) is Vet--(t/ct)(v,
/R+)ntT-(t/ct)(Vref/Rt)t*
mmm (5) [However, t8 is the discharge period. The discharge of the first capacitor (33) continues until the output voltage of the first integrating circuit (5) becomes zero, as shown by the dotted line in Figure 2. It is done. When the output voltage becomes zero, the first
The comparator (6) is inverted and the first control circuit (7) stops supplying clock pulses from the clock source (10) to the first counter (8). At this time, the first
If the count value of the clock pulses of the counter (8) is n, the discharge period t can be expressed as t, n, ·T(6). Therefore, equation (6) can be transformed into equation (5).
Substituting into the equation, if the output voltage v, is set to zero, then from equation (5), the digital value n, n, mH, (vyo/Vref)...
・・・・・・・・・・・・・・・ (7) is obtained. Therefore, the analog input signal v2 can be converted into a digital value n. The digital value n is the signal v8
This indicates the upper bit of 2, and in this example, 2
A bit digital signal is generated and the first latch circuit (9)
is latched at and generated at the first output terminal (36).

Now, the control signal generated from the first control circuit (7>) is as follows.
Timing of switching from period t1 to period t in FIG. 2 (
This occurs at time ta) and turns on the fourth switch (11). The on period of the fourth switch (11), that is, the period during which the control signal is generated, is set at time 0, which is sufficient for the holding circuit (12) to take in the output signal of the first integrating circuit (5). Letting Va be the output voltage of the first integrating circuit (5) in , the voltage Va is held in the holding circuit (12>) and applied to the comparison circuits (17a) to (17c).

Here, the voltage of the first reference power supply (14) is set equal to the output voltage of the first integrating circuit (5) when the maximum analog input signal is applied. For example, if the output voltage waveform of the first integrating circuit (5) when the maximum analog input signal is applied is as shown by the solid line in Figure 3, the voltage of the first reference power supply (14) is set to 1.4. Ru. In the case of the embodiment shown in FIG. 1, since the configuration is such that a 2-bit digital signal is obtained, the voltage -14 is divided into four by resistors (15a) to (15d), and the first reference voltage ff (-vs, -vt, -v
,) get tail.

For example, as shown in FIG. 3, the voltage Va is -■.

If it is between and −■, then the comparison circuit (17a)
Output signals (1, 0, 0) are generated at the output ends of (17c) and applied to the selection circuit 26). Then, in response to the output signal, the selection circuit (26) generates a control signal E to turn on one of the switches (22a) to (22d) of the switch group (23).

The voltage V of the second reference power supply (19) is set equal to the maximum value of the analog input signal applied to the input terminal (1). In this case as well, the voltage V is divided by the resistors (20a) to (20d), and four second reference voltages (V
s, Va-Vt, Vs). In this case, since the switch (22c) is turned on in response to the control signal E, the second reference voltage V is applied to the subtraction circuit (24).

On the other hand, since the analog input signal v8 is applied to the subtraction circuit (24) from the input terminal (1), both signals are subtracted, and the subtraction result ΔV (-V, -V,) is the second It is applied to an integral type A/D converter (25). by the way,
Since the reference voltage generation circuit (13) is constructed using a parallel comparison method, its operating time is very short. Therefore, the operation start time of the second integral type A/D converter (25) almost coincides with time ta in FIG. 2. Now, if the polarity of the subtraction result ΔV is negative, the output voltage of the second integrating circuit (review) instantly becomes -ΔV. In this case, the second integrating A/D converter (25) has an input voltage integration period, after reset,
The reference voltage integration period immediately begins.

(Reference voltage integration period: t) The second control circuit (30)
When the switch (27b) is turned on, the reference power terminal (2)
A reference voltage -V ref from Vref is applied to one end of the second resistor (37). Then, the current I flowing through the second resistor (37) is: 1, -(-ΔV-(-Vref))/Rt n++mm
(8), and the second capacitor (38) is charged by the current I. At this time, the output voltage VH of the second integrating circuit (28) is as follows. Here, the reference voltage integration period t Let n be the count value of the clock pulses in the second counter (31) between Substituting into equation (9), output voltage V
If 11 is set to zero, the voltage ΔV is obtained from equation (9). The right side of equation (11) indicates the digital value of the voltage Δ■, and a 2-bit digital signal is generated from the second counter (31), latched by the second latch circuit (32), and output as the second output. Occurs at terminal (39).

As a result, if the high-order 2-bit digital signal obtained at the first output terminal (36) and the low-order 2-bit digital signal obtained at the second output terminal (39) are arranged serially,
An output digital signal can be obtained as a result of A/D conversion of an input analog signal.

Now, as is clear from equation (11), the digital value ΔV mentioned above is determined by the capacitance C8, the resistance value R8, and the clock period T.
affected by fluctuations in In this case, there is a problem in that variations in resolution occur, and although relative accuracy can be obtained, absolute accuracy cannot be obtained.

FIG. 4 shows the second integral type A/D converter (40) in FIG.
FIG. 2 is a circuit diagram illustrating another embodiment of the invention, in which digital data with absolute precision is obtained.

The operation of the upper bits is the same as in Fig. 1, and
Since the operation is performed as shown in the upper bit integration period in the figure, only the operation of the lower bits will be explained.

The second integral type A/D converter (40)
A control signal F is generated from the control circuit (30) and switches the second switch (41) as shown.

(Input voltage integration period: t,) The output voltage (-ΔV) of the subtraction circuit (24) is connected to the positive input terminal (+) of the third amplifier (42) and the third comparator (4
3) is applied. At this time, the current I flowing through the second resistor (37) becomes: m - ΔV/R1 (12), and the second capacitor (38) is charged by the current I, as shown by the dotted line in Figure 5. As shown in the figure, it gradually decreases from time t. At this time, the output voltage V ss of the third integrating circuit (44) is: · [·t, is the reference voltage integration period, the count value of the second counter (31) in the period t is set as n4, and the output voltage V ss of the third integrating circuit (44) is When equation 12) is substituted into equation (13), the voltage v, , is as follows.

(Reference voltage integration period: t4) As in the case described above, when the counter built in the second control circuit (30) completes counting, the second control circuit (30)
A control signal F is generated from , which switches the second switch (41) in the opposite direction to that shown. At this time, the current flowing through the second resistor (37) is equal to that in the case of equation (8>), and the second capacitor (38) is discharged according to the current (4). ve initial voltage.

Then, the VCO is as follows, and if the voltage across the second capacitor (38) is vo, ■, is as follows. On the other hand, the output voltage v, 4 of the third integrating circuit (44) at this time is: ■, 4--■, -ΔV ・・・・・・・・・・・・・・・
・・・・・・・・・・・・ (17), so the (1st
By substituting the equation (16) into the equation (7), the voltage v, , becomes: Here, the electric current is the voltage v, as shown in the equation (8).
■(-ΔV + Vref)/R1...
...... (19) and the voltage V
If the count value of the second counter (31) until 14 becomes -ΔV is n, then the formula (19) is as follows.・・・・・・
It can be expressed as (20), and when this is rearranged, the voltage ΔV is obtained. Here, the right side of equation (21) is the pressure ΔV
The right side of equation (21), which represents the digital value of , is determined only by the number of clocks and the reference voltage V ref. For that reason,
Digital values with good absolute accuracy can be obtained.

Now, in general, a double integration type A/D conversion circuit requires a maximum of 2×2H clocks (N is the number of clocks in the integration period) during the integration period of the input analog voltage, but in the present invention, the upper bit integration Since the period of 1 and the period of low-order bit integration overlap and are processed in parallel, the maximum number of cloters required is 2 x 2 in the case of Fig. 1.
M/1 piece, in the case of Figure 4 3 x 2N/! It becomes a piece,
For example, in the case of N-16, the number can be significantly reduced compared to the conventional one.

Note that the second integral type A/D converter (25) and the fourth (50) second integral type A/D converter (40) in FIG. In particular, the A/D converter (25) in Fig. 1 does not require charging of the integrating capacitor, so its conversion speed is faster than that of a sample-and-hold type A/D converter. , is ideal when you want to obtain relative digital values.

Furthermore, the operation of the fourth switch (11) may be turned on during the input voltage integration period during the upper bit integration period and then turned off thereafter. If this is done, the operation of the reference voltage generation circuit (13) during the integration period may be changed. The period occupied by the operation can be reduced to substantially zero.

(G) Effects of the Invention As described above, according to the present invention, it is possible to provide an integral type A/D conversion circuit in which the conversion time is significantly shortened. In particular, according to the present invention, the output of the integrating circuit built in the first integrating type A/D converter for obtaining the upper bits is transferred to the second integrating circuit.
Since the input voltage is applied to the positive input terminal of the amplifier built in the integrating type A/D converter, the input voltage integration period in lower bit integration can be omitted.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Figs. 2 and 3 are characteristic diagrams for explaining Fig. 1, and Fig. 4 is a circuit diagram showing an embodiment of the present invention.
A circuit diagram showing another embodiment of the present invention and FIG.
It is a characteristic diagram for providing explanation of a figure. (3)...first double integral type A/D converter, (11
)...Fourth switch, (12)...Holding circuit, (
13)...Reference voltage generation circuit, (24)...Subtraction circuit, (25)...Second integral type A/D converter.

Claims (8)

[Claims] (1) A first integrating A/D converter that generates a high-order bit digital signal corresponding to the level of an analog input signal, and an output signal of an integrating circuit within the first integrating A/D converter. A holding circuit that holds a holding circuit; a reference voltage generating circuit that selectively generates a reference voltage corresponding to the level of the upper bit of a plurality of reference voltages according to an output signal of the holding circuit; an arithmetic circuit that performs an arithmetic operation on the output reference voltage and the analog input signal; and an integration amplifier having positive and negative input terminals; the output signal of the arithmetic circuit is applied to the positive input terminal of the amplifier; a second integral type A that generates a lower bit digital signal corresponding to the level of the analog input signal in accordance with the output signal of the arithmetic circuit;
1. An integral type A/D conversion circuit comprising: a /D converter. (2) The integrating amplifier has an integrating capacitor between the output terminal and the negative input terminal, and a series circuit of a resistor and a switch between the negative input terminal and the reference power supply. The integral type A/D conversion circuit according to claim 1, characterized in that: (3) A first integrating A/D converter that generates a high-order bit digital signal corresponding to the level of the analog input signal, and an output signal of an integrating circuit within the first integrating A/D converter. A holding circuit that holds a holding circuit; a reference voltage generating circuit that selectively generates a reference voltage corresponding to the level of the upper bit of a plurality of reference voltages according to an output signal of the holding circuit; It has an arithmetic circuit that performs an arithmetic operation on the output reference voltage and the analog input signal, and positive and negative input terminals, and the output signal of the arithmetic circuit is applied to the positive input terminal, and two A lower bit corresponding to the level of the analog input signal, comprising an integrating amplifier to which one of the reference power supplies is connected via a resistor, and a comparator for comparing the output signal of the amplifier with the output signal of the arithmetic circuit. A second integrating A/D converter that generates a digital signal. (4) The first integral type A/D converter is a double integral type A/D converter.
4. The integral type A/D conversion circuit according to claim 1, wherein the integral type A/D conversion circuit is comprised of a /D converter. (5) A switch is provided between the output end of the integrating circuit and the input end of the holding circuit, and the switch is connected to a first control circuit built in the first integrating A/D converter. 4. The integral type A/D conversion circuit according to claim 1 or 3, characterized in that the circuit is switched in accordance with a control signal. (6) The reference voltage generating circuit is obtained at a connection point between a first resistor group consisting of a plurality of resistors connected in series between a first reference power source and the ground, and a plurality of resistors of the first resistor group. 1st
a comparison circuit group consisting of a plurality of comparison circuits that compare a reference voltage and an output signal of the holding circuit; a second resistance group consisting of a plurality of resistors connected in series between a second reference power source and ground; The second resistor obtained at the connection point of the plurality of resistors of the second resistor group
Claim 1 comprising: a switch group that applies a reference voltage to the arithmetic circuit; and a selection circuit that selectively drives one switch of the switch group in accordance with an output signal of the comparison circuit group. Integral type A/D described in item or item 3
conversion circuit. (7) The integral type A/D conversion circuit according to claim 1 or 3, wherein the arithmetic operation circuit performs a subtraction operation. (8) A differential type having an input terminal to which an analog signal is applied, a reference power supply terminal to which a reference voltage is applied, and positive and negative input terminals, the positive input terminal being connected to the input terminal. an amplifier, a series circuit consisting of a resistor and a switch connected in series between the negative input terminal of the amplifier and the reference power supply terminal, and a series circuit connected between the output terminal of the amplifier and the negative input terminal. An integrating type A/D conversion circuit characterized by comprising an integrating circuit including an integrating capacitor.