JPH0248875A - Driving method for solid-state image pickup device - Google Patents
Driving method for solid-state image pickup deviceInfo
- Publication number
- JPH0248875A JPH0248875A JP63199545A JP19954588A JPH0248875A JP H0248875 A JPH0248875 A JP H0248875A JP 63199545 A JP63199545 A JP 63199545A JP 19954588 A JP19954588 A JP 19954588A JP H0248875 A JPH0248875 A JP H0248875A
- Authority
- JP
- Japan
- Prior art keywords
- potential
- charge
- photodiode
- transfer electrode
- readout
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の目的コ
(産業上の利用分野)
本発明は固体撮像装置の駆動方法に係シ、特に電荷転送
電極に対する駆動電圧の印加方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention (Field of Industrial Application) The present invention relates to a method for driving a solid-state imaging device, and particularly to a method for applying a driving voltage to a charge transfer electrode.
(従来の技術)
固体撮像装置は小型、軽量、長寿命等の優れた特長を有
しているため、ビデオカメラ等への利用が著しく増加し
ている。この種の固体撮像装置の一部について、第1図
(a)に平面図を示し、そのB −B’線断面を第1図
(b)に示している。即ち、4・・・はそれぞれフォト
ダイオードからなる光電変換部、20は上記光電変換部
4・・・の配列に沿って設けられた電荷読出し部である
。この電荷読出し部20は、電荷蓄積・転送用の電荷転
送チャネル3上に絶縁膜21を介して複数個の転送電極
6〜9゜・・・が電荷転送方向に沿りて配列されて形成
されている。この場合、光電変換部1個に対応して2段
の転送電極(6,y)、(8s9)t・・・が設けられ
ており、この2段の転送電極のうちの前段の転送電極6
,8.・・・の下方には、光電変換部4と電荷転送チャ
ネル3との間にシフトチャネル5が形成されている。ま
た、本例では上記4個の転送電極6.7,8.9を1組
とする複数組の転送電極が設けられている。前記光電変
換部4・・・は、nfi半導体基板1内に形成されたP
ウェル2の表面部に画素となるn型領域が形成されてお
シ、入力光を光電変換して信号電荷を発生すると共にこ
の信号電荷を蓄積する。また、前記電荷転送チャネル3
は、上記Pウェル2の表面部忙電荷転送方向にn型領域
が形成されてなる。また、前記Pウェル2において、画
素用のn型領域4の直下は浅くて不純物濃度が薄いオー
バーフローチャネル10が形成されており、このオーバ
ーフローチャネル10の下方部のn型基板1′が縦聾オ
ーバーフロードレインとなっている。(Prior Art) Solid-state imaging devices have excellent features such as small size, light weight, and long life, so their use in video cameras and the like is increasing significantly. A plan view of a part of this type of solid-state imaging device is shown in FIG. 1(a), and a cross section taken along the line B-B' is shown in FIG. 1(b). That is, 4... are photoelectric conversion units each made of a photodiode, and 20 is a charge readout unit provided along the arrangement of the photoelectric conversion units 4.... The charge readout section 20 is formed by arranging a plurality of transfer electrodes 6 to 9 degrees along the charge transfer direction on the charge transfer channel 3 for charge storage and transfer with an insulating film 21 interposed therebetween. ing. In this case, two stages of transfer electrodes (6, y), (8s9)t... are provided corresponding to one photoelectric conversion section, and the previous stage of the two stages of transfer electrodes is the transfer electrode 6.
,8. A shift channel 5 is formed between the photoelectric conversion section 4 and the charge transfer channel 3 below. Further, in this example, a plurality of sets of transfer electrodes each including the four transfer electrodes 6.7 and 8.9 are provided. The photoelectric conversion section 4... is formed in the NFI semiconductor substrate 1.
An n-type region serving as a pixel is formed on the surface of the well 2, which photoelectrically converts input light to generate signal charges and accumulates the signal charges. Further, the charge transfer channel 3
An n-type region is formed on the surface of the P-well 2 in the charge transfer direction. Further, in the P well 2, a shallow overflow channel 10 with a low impurity concentration is formed directly below the n-type region 4 for the pixel, and the n-type substrate 1' below the overflow channel 10 forms a vertical overflow. It is a drain.
次に、上記固体撮像装置の駆動方法について、第5図に
示す駆動電圧波形および第6図、第7図に示す基板内電
位・電荷分布を参照して説明する。Next, a method for driving the solid-state imaging device will be described with reference to the drive voltage waveform shown in FIG. 5 and the potential/charge distribution within the substrate shown in FIGS. 6 and 7.
即ち、n型基板1に所定の正電圧を印加し、各組の転送
電極におけるある転送段の前段転送電極6の駆動電圧φ
v1 としてOv、その後段転送電極7の駆動電圧φV
、として負電圧(−vL)、電荷転送方向の次段転送段
の前段転送電極8の駆動電圧φV、として−■1、その
後段転送電極9の駆動電圧φv4としてOYを印加した
状態の期間TAには、第1図(b)に示した基板断面に
おける電位・電荷分布は第6図に示すようになりている
。ここで、11は転送チャネル電位、12はシフトチャ
ネル電位、13はフォトダイオードの完全空乏電位、J
4bはオーバーフローチャネル電位、15はオーバー7
0−ドレイン電位であり、Qは電荷である。上記期間T
Aでは、シフトチャネル電位12がほぼOVであシ、シ
フトチャネルが閉じておシ、信号電荷Qは転送されない
。また、オーバーフローチャネル電位J4bは、n型基
板1の電位がOVのときの電位14&から正電位側に上
昇しているので、前記信号電荷Qが過剰となったときに
オー/4−71:I−fヤネル10fgてオーバーフロ
ードレインJ’に流れ込む。That is, a predetermined positive voltage is applied to the n-type substrate 1, and the drive voltage φ of the previous transfer electrode 6 of a certain transfer stage in each set of transfer electrodes is
Ov as v1, drive voltage φV of the subsequent transfer electrode 7
, a negative voltage (-vL), a drive voltage φV of the previous transfer electrode 8 of the next transfer stage in the charge transfer direction, -■1, and a period TA in which OY is applied as the drive voltage φv4 of the subsequent transfer electrode 9. In this case, the potential/charge distribution in the cross section of the substrate shown in FIG. 1(b) is as shown in FIG. 6. Here, 11 is the transfer channel potential, 12 is the shift channel potential, 13 is the full depletion potential of the photodiode, and J
4b is overflow channel potential, 15 is over 7
0 - drain potential and Q is charge. The above period T
At A, the shift channel potential 12 is approximately OV, the shift channel is closed, and the signal charge Q is not transferred. Moreover, since the overflow channel potential J4b has increased from the potential 14& when the potential of the n-type substrate 1 is OV to the positive potential side, when the signal charge Q becomes excessive, -f Yanel 10fg flows into overflow drain J'.
次に、上記した状態から前段転送電極6に時刻1oから
t、1でパルス状に正電圧vHを印加した期間T、には
、第7図に示すような電位・電荷分布となる。この場合
には、転送チャネル電位11′およびシフトチャネル電
位12′がそれぞ46図の場合に比べて上昇しているの
で、信号電荷Qはシフトチャネル5を経て転送チャネル
3へ流れ込む。Next, from the above-described state, during a period T during which a pulsed positive voltage vH is applied to the front-stage transfer electrode 6 from time 1o to time t,1, the potential/charge distribution becomes as shown in FIG. In this case, since the transfer channel potential 11' and the shift channel potential 12' are each higher than in the case of FIG. 46, the signal charge Q flows into the transfer channel 3 via the shift channel 5.
このように、前段転送電極6下の転送チャネル3へ流れ
込んだ信号電荷Qは、各転送電極6〜9゜・・・に所定
のパターンの駆動パルスを印加することによりて電荷読
出し部20を電荷転送方向へ順次転送される。In this way, the signal charge Q that has flowed into the transfer channel 3 under the front-stage transfer electrode 6 charges the charge readout section 20 by applying a predetermined pattern of driving pulses to each transfer electrode 6 to 9°. They are transferred sequentially in the transfer direction.
ところで、前記転送電極6とPウェル2との間で結合容
量C1が形成されておシ、またPウェル2は抵抗成分を
持ち、Pウェル2とn盤基板1との間に容、tcjが存
在するので、フォトダイオード付近を表わす等価回路は
第8図に示すようになる。By the way, a coupling capacitance C1 is formed between the transfer electrode 6 and the P-well 2, and the P-well 2 has a resistance component, and a capacitance, tcj, is formed between the P-well 2 and the n-board substrate 1. Therefore, the equivalent circuit representing the vicinity of the photodiode is as shown in FIG.
ここで、RはPウェル2の抵抗値、B点は上記容量C1
、Cj、抵抗値Rの各一端であシ、フォトダイオード完
全空乏電位13およびオーバーフローチャネル電位14
bはB点の電位を基準に形成される。これに対して、転
送チャネル電位11’、シフトチャネル電位12′は、
転送電極電位φ■1の影響を強く受け、はぼ転送電極電
位φv1に比例して制御される。また、Pウェル2は、
行9列方向に配列されたフォトダイオード4および列方
向に形成された転送チャネル3が存在するので、これら
の外側で接地されている。したがりて、Pウェル2の抵
抗値Rは、フォトダイオード配列の中心部に向かうほど
大きくなりている。Here, R is the resistance value of P well 2, and point B is the capacitance C1 above.
, Cj, and the resistance value R at each end, the photodiode complete depletion potential 13 and the overflow channel potential 14.
b is formed based on the potential at point B. On the other hand, the transfer channel potential 11' and the shift channel potential 12' are
It is strongly influenced by the transfer electrode potential φ■1, and is controlled in proportion to the transfer electrode potential φv1. In addition, P-well 2 is
Since there are photodiodes 4 arranged in rows and nine columns and transfer channels 3 formed in columns, they are grounded outside. Therefore, the resistance value R of the P-well 2 increases toward the center of the photodiode array.
上記したような容量C1,C,、抵抗値Rの存在によシ
、転送電極6に第5図に示したように駆動ノ々ルスφV
、を印加すると、第8図中のB点の電位は、通常、c
t ) cjであるので第9図に示すように変化し、シ
フトチャネル5が閉じる直前(時刻t1の直前)になっ
ても、零電位にならずに正電位となってしまう。Due to the existence of the capacitance C1, C, and the resistance value R as described above, the drive node φV is applied to the transfer electrode 6 as shown in FIG.
, the potential at point B in FIG. 8 is normally c
t ) cj, it changes as shown in FIG. 9, and even just before the shift channel 5 closes (just before time t1), it does not become zero potential but becomes a positive potential.
一方、固体撮像装置に強い光が入射した場合、光電変換
による電荷が過剰となって過剰電荷をオーバーフロード
レインl’l/C排出している状態を第10図に示して
いる。この状態のとき、転送電極6に第5図に示したよ
うに駆動パルスを印加すると、前述したように転送電極
6とPウェル2との間の結合容量C!を介してPウェル
2の電位が時刻t0〜t、の間に上昇する。これに伴っ
て、第11図に示すように、フォトダイオード完全空乏
電位13′、オーバーフローチャネル電位14b′が上
昇し、このオーバー70−チャネル電位14b′とシフ
トチャネル電位12′との電位差が小さくなシ、この結
果、・転送チャネル3へ読み出される電荷量が少なくな
ってしまうという問題がある。この場合、Pウェル2の
抵抗値Rが大きければ大きい程、Pウェル電位が零電位
(接地電位)に回復する時定数が犬きくなシ、オーバー
70−チャネル電位14b′が元の電位14bまで下降
するのに長時間を要し、前記駆動パルスの印加時間(t
o〜1+ )に読み出される電荷量が少なくなる。し
かも、上記Pウェル2の抵抗値Rは、前述したようにフ
ォトダイオード配列の中心部にいくほど大きくなるので
、フォトダイオード配列の中心と周辺とで過剰電荷の排
出が始まる光量(飽和光量)が異なυ、また過剰電荷が
排出されたときの読み出される電荷量(飽和信号量)が
異な)、不均一になるという問題点がある。On the other hand, when strong light is incident on the solid-state imaging device, FIG. 10 shows a state in which the charge generated by photoelectric conversion becomes excessive and the excess charge is discharged to the overflow drain l'l/C. In this state, when a driving pulse is applied to the transfer electrode 6 as shown in FIG. 5, the coupling capacitance between the transfer electrode 6 and the P well 2 C! The potential of the P well 2 rises between time t0 and time t. Along with this, as shown in FIG. 11, the photodiode full depletion potential 13' and the overflow channel potential 14b' rise, and the potential difference between the over 70-channel potential 14b' and the shift channel potential 12' becomes smaller. As a result, there is a problem that the amount of charge read out to the transfer channel 3 decreases. In this case, the larger the resistance value R of the P-well 2, the longer the time constant for the P-well potential to recover to zero potential (ground potential), and the longer the over 70-channel potential 14b' returns to the original potential 14b. It takes a long time to descend, and the application time (t
o~1+) The amount of charge read out becomes smaller. Moreover, as mentioned above, the resistance value R of the P-well 2 increases toward the center of the photodiode array, so that the amount of light (saturated light amount) at which excess charge begins to be discharged at the center and periphery of the photodiode array increases. There is a problem that the difference υ and the amount of charge read out when excess charge is discharged (saturation signal amount) are non-uniform.
(発明が解決しようとする課題)
本発明は1.上記したように固体撮像装置のフォトダイ
オード配列が形成されているウェル領域と転送電極との
結合容量およびウェル領域の抵抗成分が存在し、かつ上
記抵抗成分の値がフォトダイオード配列内の位置により
て異なることに起因して、従来の転送電極駆動方法では
、駆動パルス印加時における上記ウェル領域の電位変動
が大きくなりて読み出し電荷量が少なくなシ、強い光が
入射した場合にフォトダイオード配列内の位置によって
飽和光量、飽和信号量が不均一になるという問題点を解
決すべくなされたもので、駆動時におけるウェル領域の
電位変動およびこれに伴う読み出し電荷量の減少を防止
でき、強い光が入射した場合でもフォトダイオード配列
内の中心部でも周辺部でも均一な飽和光量、飽和信号量
が得られる固体撮像装置の駆動方法を提供することを目
的とする。(Problems to be Solved by the Invention) The present invention has 1. As mentioned above, there is a coupling capacitance between the well region where the photodiode array of the solid-state imaging device is formed and the transfer electrode, and a resistance component of the well region, and the value of the resistance component depends on the position in the photodiode array. Due to these differences, in conventional transfer electrode driving methods, potential fluctuations in the well region become large when driving pulses are applied, resulting in a small amount of readout charge, and when strong light is incident, This was developed to solve the problem that the saturation light amount and saturation signal amount are uneven depending on the position.It prevents potential fluctuations in the well area during driving and the accompanying decrease in readout charge amount, and allows strong light to enter. An object of the present invention is to provide a method for driving a solid-state imaging device that can obtain a uniform saturated light amount and saturated signal amount both at the center and at the periphery of a photodiode array even when
[発明の構成コ
(課題を解決するための手段)
本発明は、入射光を光電変換して信号電荷を発生すると
共にこの信号電荷を蓄積する電荷蓄積層を有する複数の
光電変換部と、この光電変換部に蓄積された信号電荷を
読み出す蓄積領域を有する電荷読み出し部と、前記光電
変換部で発生した過剰電荷を排出する過剰電荷排出部と
を備え、前記複数の光電変換部が半導体基板中のウェル
領域に形成されてなる固体撮像装置の駆動方法において
、前記電荷読み出し部による電荷読み出しに際して、読
み出し駆動パルス電圧が印加される転送電極に対して別
の転送電極に上記駆動パルス電圧の前縁に同期して逆符
号の電圧を印加することを特徴とする。[Structure of the Invention (Means for Solving the Problems) The present invention provides a plurality of photoelectric conversion sections having a charge storage layer that photoelectrically converts incident light to generate signal charges and accumulates the signal charges; A charge readout section having an accumulation region for reading signal charges accumulated in the photoelectric conversion section, and an excess charge discharge section for discharging excess charge generated in the photoelectric conversion section, wherein the plurality of photoelectric conversion sections are arranged in a semiconductor substrate. In the method of driving a solid-state imaging device formed in a well region of the invention, when the charge readout unit reads out the charge, the leading edge of the drive pulse voltage is applied to a transfer electrode other than the transfer electrode to which the readout drive pulse voltage is applied. The feature is that a voltage of opposite sign is applied in synchronization with .
(作用)
上記のように別の転送電極にも逆符号の7J?ルス電圧
を印加することによりて、読み出し駆動パルス電圧が印
加される転送電極によるウェル領域の電位変動を相殺で
きるので、駆動パルス印加時におけるウェル領域の電位
変動が抑制され、フォトダイオード電荷蓄積層からの読
み出し電荷量の減少を抑制できる。また、駆動パルス印
加時間終了直前におけるウェル領域の電位が小さくなる
。(Function) As mentioned above, 7J with the opposite sign also applies to another transfer electrode? By applying a pulse voltage, it is possible to offset potential fluctuations in the well region due to the transfer electrode to which the readout drive pulse voltage is applied, so potential fluctuations in the well region when the drive pulse is applied are suppressed, and the photodiode charge storage layer It is possible to suppress a decrease in the readout charge amount. Further, the potential of the well region immediately before the end of the drive pulse application time becomes small.
従って、フォトダイオード配列内におけるウェル領域の
抵抗値の不均一性の影響を殆んど受けなくなる。これに
よって、フォトダイオード配列の中心部と周辺部とで飽
和光量、飽和信号量が均一に得られるようになる。Therefore, it is hardly affected by non-uniformity in the resistance value of the well region within the photodiode array. As a result, the amount of saturated light and the amount of saturated signal can be uniformly obtained at the center and the periphery of the photodiode array.
(実施例)
以下、図面を参照して本発明の一実施例を詳細に説明す
る。(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.
第2図は、第1図(a) 、 (b)を参照して前述し
たような固体撮像装置におけるフォトダイオード蓄積電
荷を読み出すときの転送電極6〜9.・・・に印加され
る駆動電圧φv1〜φv4 ・・・の波形の一例を示し
ている。即ち、本発明方法の実施対象となる固体撮像装
置は、前述したように入射光を光電変換して信号電荷を
発生すると共に、この信号電荷を蓄積する電荷蓄積層を
有する複数の光電変換部と、この光電変換部に蓄積され
た信号電荷を読み出す蓄積領域を有する電荷読み出し部
と、前記光電変換部で発生した過剰電荷を排出する過剰
電荷排出部とを備え、前記複数の光電変換部が半導体基
板中のウェル領域に形成されておシ、前記電荷転送部の
転送電極が上記Pウェル領域の一部の上方で対向して設
けられている。そして、本例による駆動方法は、フォト
ダイオードから電荷を読み出す前に、たとえば前段転送
電極6.8に接地電位(OV )、後段転送電極7,9
に負電位−vLを印加しておき、電荷読み出し時にたと
えば前段転送電極θに正電位VHの駆動パルスφv1を
印加すると共に、別の前段転送電極8に上記駆動パルス
φv1の前縁に同期して逆符号(本例では−VL電位)
の電圧φvsを印加する。なお、後段転送電極7には負
電位−vLを印加しておくので、この転送電極7下の基
板内電位は低くなっておシ、電荷転送方向に対する電位
障壁が形成されている。FIG. 2 shows transfer electrodes 6 to 9 used when reading out photodiode accumulated charges in a solid-state imaging device as described above with reference to FIGS. 1(a) and 1(b). An example of the waveform of the driving voltages φv1 to φv4 applied to... is shown. That is, the solid-state imaging device to which the method of the present invention is implemented includes a plurality of photoelectric conversion sections that photoelectrically convert incident light to generate signal charges as described above, and have a charge storage layer that accumulates the signal charges. , a charge readout section having an accumulation region for reading signal charges accumulated in the photoelectric conversion section, and an excess charge discharge section for discharging excess charge generated in the photoelectric conversion section, wherein the plurality of photoelectric conversion sections are semiconductors. The charge transfer section is formed in a well region in the substrate, and transfer electrodes of the charge transfer section are provided facing each other above a part of the P well region. Then, in the driving method according to the present example, before reading charges from the photodiode, for example, the front transfer electrode 6.8 is set to a ground potential (OV), and the rear transfer electrode 7, 9 is set to a ground potential (OV).
A negative potential -vL is applied to , and at the time of charge readout, for example, a drive pulse φv1 of a positive potential VH is applied to the front-stage transfer electrode θ, and at the same time, a drive pulse φv1 of a positive potential VH is applied to another front-stage transfer electrode 8 in synchronization with the leading edge of the drive pulse φv1. Reverse sign (-VL potential in this example)
A voltage φvs is applied. Note that, since a negative potential -vL is applied to the subsequent transfer electrode 7, the potential in the substrate under the transfer electrode 7 becomes low, and a potential barrier is formed in the charge transfer direction.
上記駆動方法によれば、読み出し対象となるフォトダイ
オードの付近を費わす等価回路は第3図に示すようにな
シ、第3図中のB点(上記フォトダイオード付近のウェ
ル領域)の電位は第4図に示すように変化する。ここで
、第1図(a) 、 (b)を参照して上記第3図中の
C,* C1t R、Ctを説明する・即ち、Rは上記
フォトダイオード付近のウェル領域2の抵抗値でsb、
ウェル領域2は通常その端部で接地端にコンタクトして
いる。また、C1は上記ウェル領域2と駆動電圧φV、
が印加される転送電極6との間に存在する結合容量、C
2は上記ウェル領域2と駆動電圧φV、が印加される転
送電極8との間に存在する結合容量、Ctは上記ウェル
領域2と基板1との接合容量、VOFDは上記°基板1
に印加されるバイアス電位(オーバーフロードレイン電
位)である。この場合、C1ユ02>Cjの関係がある
ので、駆動パルス印加に対してC5分は殆んど影響せず
、正のAtルス印加によるB点の電位変動と負の7母ル
ス印加によるB点の電位変動とが相殺されるようになる
ので、B点の電位は殆んど上昇しない。このため、第7
図に示したように、7オトダイオ一ド電荷蓄積層電位1
3、オーバーフローチャネル電位14bは殆んど上昇せ
ず、駆動ノヤルス印加終了直前(第1図す中のシフトチ
ャネル5が閉じる直前)におけるB点の電位は従来例の
場合の電位(第9図参照)に比べて無視できるほど小さ
い。したがって、オーバーフローチャネル電位14bと
シフトチャネル電位12′との電位差が不必要に小さく
なることが抑制され、フォトダイオード蓄積層からの読
み出し電荷量が減少することが抑制される。また、フォ
トダイオード配列内におけるウェル領域の抵抗値が不均
一でめったとしても、その影響を殆んど受けなくなる。According to the above driving method, the equivalent circuit surrounding the photodiode to be read out is as shown in FIG. 3, and the potential at point B (well region near the photodiode) in FIG. It changes as shown in FIG. Here, C, * C1t R, and Ct in the above Fig. 3 will be explained with reference to Figs. 1 (a) and (b). In other words, R is the resistance value of the well region 2 near the photodiode. sb,
The well region 2 normally contacts the ground end at its end. Further, C1 is the well region 2 and the drive voltage φV,
The coupling capacitance, C, that exists between the transfer electrode 6 to which C is applied
2 is the coupling capacitance existing between the well region 2 and the transfer electrode 8 to which the drive voltage φV is applied, Ct is the junction capacitance between the well region 2 and the substrate 1, and VOFD is the coupling capacitance between the well region 2 and the substrate 1.
is the bias potential (overflow drain potential) applied to the In this case, since there is a relationship of C1U02>Cj, the C5 component has almost no effect on the application of the drive pulse, and the potential fluctuation at point B due to the application of the positive At pulse and the change in the potential at point B due to the application of the negative At pulse Since the potential fluctuations at point B are canceled out, the potential at point B hardly increases. For this reason, the seventh
As shown in the figure, the potential of the 7-diode charge storage layer 1
3. The overflow channel potential 14b hardly rises, and the potential at point B just before the end of application of the drive noyrals (just before the shift channel 5 in FIG. 1 closes) is the same as the potential in the conventional example (see FIG. 9). ) is negligibly small compared to Therefore, the potential difference between the overflow channel potential 14b and the shift channel potential 12' is suppressed from becoming unnecessarily small, and the amount of charge read from the photodiode accumulation layer is suppressed from decreasing. Furthermore, even if the resistance value of the well region in the photodiode array is non-uniform and rarely occurs, it is hardly affected by this.
即ち、上記駆動方法によれば、第2図中に示した期間T
A、TBに対応する基板内電位・電荷の分布の様子は、
通常は第6図、第7図に示したものと同様に得られ、強
い光が固体撮像装置の受光面(フォトダイオード配列面
)に入射した場合でも、7tトダイオ一ド配列内の中心
部と周辺部とで飽和光量、飽和信号量がそれぞれ均一に
得られるようになる。That is, according to the above driving method, the period T shown in FIG.
The distribution of potential and charge within the substrate corresponding to A and TB is as follows:
Normally, the results are similar to those shown in Figures 6 and 7, and even when strong light is incident on the light receiving surface (photodiode array surface) of the solid-state imaging device, the central part of the 7t diode array The saturated light amount and the saturated signal amount can be uniformly obtained in the peripheral area.
なお、上記実施例では、電荷読み出しに際して転送電極
6に正電圧の読み出し駆動ノ千ルス電圧を印加すると同
時に、この前縁に同期して負電圧を転送電極8に印加し
たが、この負電圧を転送電極7.8.9のいずれかに印
加すれば上記実施例と同様な効果が得られる。また、正
電圧の読み出し駆動パルス電圧を上記転送電極6以外の
他の転送電極7,8.9のいずれかに印加する際には、
これ以外の転送電極のいずれか1つの転送電極(6また
は7または8または9)に上記読み出し駆動パルス電圧
の前縁に同期して負電圧を印加すれば、上記実施例と同
様な効果が得られる。In the above embodiment, when reading the charge, a positive readout driving voltage was applied to the transfer electrode 6, and at the same time, a negative voltage was applied to the transfer electrode 8 in synchronization with the leading edge. If the voltage is applied to any of the transfer electrodes 7, 8, and 9, the same effect as in the above embodiment can be obtained. Furthermore, when applying a positive readout drive pulse voltage to any of the transfer electrodes 7, 8.9 other than the transfer electrode 6,
If a negative voltage is applied to any one of the other transfer electrodes (6, 7, 8, or 9) in synchronization with the leading edge of the readout drive pulse voltage, the same effect as in the above embodiment can be obtained. It will be done.
[発明の効果]
上述したように本発明の固体撮像装置の駆動方法によれ
ば、フォトダイオード蓄積電荷の読み出し駆動時におけ
るウェル領域の電位変動およびこれに伴う読み出し電荷
量の減少を防止でき、強い光が入射した場合でもフォト
ダイオード配列内の中心部でも周辺部でも均一な飽和光
量、飽和信号量が得られるようになる。[Effects of the Invention] As described above, according to the method for driving a solid-state imaging device of the present invention, it is possible to prevent potential fluctuations in the well region and the accompanying decrease in the readout charge amount when driving the readout of the photodiode accumulated charge, and to prevent a strong Even when light is incident, a uniform saturated light amount and saturated signal amount can be obtained both at the center and at the periphery of the photodiode array.
【図面の簡単な説明】
第1図(&)は本発明の固体撮像装置の駆動方法の実施
対象となる固体撮像装置の一部を示す平面ノナターン、
第1図fb)は第1図(、)のB −B’線に沿う断面
図、第2図は本発明方法の一実施例く係る第1図(al
中の転送電極に対する印加電圧を示す波形図、第3図は
第1図価)中のフォトダイオード付近を表わす等何回路
を示す回路図、第4図は第1図(b)中のフォトダイオ
ード付近のウェル領域の電位変化の様子を示す図、第5
図乃至第11図は従来の固体撮像装置の駆動方法に係シ
、第5図は第1図(b)中の転送電極に対する印加電圧
を示す波形図、第6図および第7図は第5図中の期間T
A、 T、 K対応する第1図fbl中の基板内の電位
・電荷分布の様子を示す図、第8図は第1図(b)中の
フォトダイオード付近を表わす等何回路を示す回路図、
第9図は第1図(bl中のフォトダイオード付近のウェ
ル領域の電位変化を示す図、第10図および第11図は
強い光が固体撮像装置に入射した場合における第5図中
の期間TA# T、に対応する基板内電位電荷分布の様
子を示す図である。
1・・・n型基板、2・・・Pウェル、3・・・転送チ
ャネル、4・・・光電変換部、5・・・シフトチャネル
、6〜9・・・転送電極、510・・・オーバーフロー
チャネル、1′・・・オーバーフロードレイン、C,、
C,・・・結合容量、C5・・・接合容量、ル・・ウェ
ル領域の抵抗値。
2Q・・・電荷読み出し部。
出願人代理人 弁理士 鈴 江 武 彦1図
第2図
第3図
第
図
第
図
第
図
第
図
第
図
第10
図
第
図
第11
図[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 (&) shows a planar nonaturn showing a part of a solid-state imaging device to which the solid-state imaging device driving method of the present invention is implemented.
Fig. 1 fb) is a sectional view taken along the line B-B' of Fig. 1 (,), and Fig. 2 is a cross-sectional view of Fig. 1 (al
Figure 3 is a circuit diagram showing the voltage applied to the transfer electrode in Figure 1 (b), Figure 4 is a circuit diagram showing the circuit near the photodiode in Figure 1 (b) Figure 5 showing the state of potential change in the nearby well region.
11 relate to a conventional driving method for a solid-state imaging device, FIG. 5 is a waveform diagram showing the voltage applied to the transfer electrode in FIG. 1(b), and FIGS. Period T in the diagram
A, T, K are diagrams showing the potential and charge distribution inside the substrate in the corresponding Figure 1 fbl, and Figure 8 is a circuit diagram showing some circuits, such as the vicinity of the photodiode in Figure 1 (b). ,
FIG. 9 is a diagram showing potential changes in the well region near the photodiode in FIG. 1 (bl), and FIGS. 10 and 11 are diagrams showing the period TA in FIG. # It is a diagram showing the state of potential charge distribution in the substrate corresponding to T. 1... N-type substrate, 2... P well, 3... Transfer channel, 4... Photoelectric conversion unit, 5 ...Shift channel, 6-9...Transfer electrode, 510...Overflow channel, 1'...Overflow drain, C,,
C,...Coupling capacitance, C5...Junction capacitance, Le...Resistance value of well region. 2Q...Charge reading section. Applicant's Representative Patent Attorney Takehiko Suzue 1 Figure 2 Figure 3 Figure 1 Figure 10 Figure 11
Claims (1)
号電荷を蓄積する電荷蓄積層を有する複数の光電変換部
と、この光電変換部に蓄積された信号電荷を読み出す蓄
積領域を有する電荷読み出し部と、前記光電変換部で発
生した過剰電荷を排出する過剰電荷排出部とを備え、前
記複数の光電変換部が半導体基板中のウェル領域に形成
されてなる固体撮像装置の駆動方法において、前記電荷
読み出し部による電荷読み出しに際して、読み出し駆動
パルス電圧が印加される転送電極に対して別の転送電極
に上記駆動パルス電圧の前縁に同期して逆符号の電圧を
印加することを特徴とする固体撮像装置の駆動方法。A plurality of photoelectric conversion units that photoelectrically convert incident light to generate signal charges and have a charge storage layer that accumulates the signal charges, and a charge readout unit that has an accumulation region that reads out the signal charges accumulated in the photoelectric conversion units. and an excess charge discharging section for discharging excess charge generated in the photoelectric conversion section, and the plurality of photoelectric conversion sections are formed in a well region in a semiconductor substrate. Solid-state imaging characterized by applying a voltage of opposite sign to a transfer electrode to which a read drive pulse voltage is applied in synchronization with the leading edge of the drive pulse voltage, when reading out electric charges by a readout section. How to drive the device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63199545A JPH078030B2 (en) | 1988-08-10 | 1988-08-10 | Driving method for solid-state imaging device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63199545A JPH078030B2 (en) | 1988-08-10 | 1988-08-10 | Driving method for solid-state imaging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0248875A true JPH0248875A (en) | 1990-02-19 |
| JPH078030B2 JPH078030B2 (en) | 1995-01-30 |
Family
ID=16409609
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63199545A Expired - Lifetime JPH078030B2 (en) | 1988-08-10 | 1988-08-10 | Driving method for solid-state imaging device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH078030B2 (en) |
-
1988
- 1988-08-10 JP JP63199545A patent/JPH078030B2/en not_active Expired - Lifetime
Non-Patent Citations (2)
| Title |
|---|
| DFIGN CONSIDERATION OF P-WELL STRUCTURE FOR SOLID STATE IMAGE SENSOR=1985 * |
| DFSIGN CONSIDERATION OF P-WELL STRUCTURE FOR SOLID STATE IMAGE SENSOR=1985 * |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH078030B2 (en) | 1995-01-30 |
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