JPH0248926B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a monolithic reference voltage source. Recently, systems that include so-called analog circuits, such as A/D converters and D/A converters,
Although MOS/LSI is being actively implemented, reference voltage sources are still monolithic MOS/LSI.
Not integrated on LSI. This is because it is difficult to use a PN junction diode such as a Zener diode used in a reference voltage source using a bipolar element from the point of view of process compatibility, and in general in MOS, the threshold voltage (hereinafter abbreviated as V _TH) is difficult to use. ) cannot be used as is because it is difficult to control.

The object of the present invention is to overcome this difficulty and provide a monolithic reference voltage source that can guarantee sufficient accuracy as a reference voltage source.

Hereinafter, the present invention will be explained using the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention. In the figure, 1 is an N-channel MOS transistor with V _THN1 , and 2 is V _THN2 (however _, V _TN2 >
N-channel MOS transistor with V _TH of V _TN1 ), 3 is a monolithic resistor with resistance value R ₁ , 4, 5,
6 are P channels with equal V _TH of V _THP , respectively.
The MOS transistor 7 is a monolithic resistor with a resistance value _R2 . In Figure 1, transistor 1
The gate of transistor 2 and the gate and drain of transistor 2 are connected in common, and the gate and drain of transistor 4 are connected to the gates of transistors 5 and 6. And transistors 4, 1
and resistor 3 form a series circuit between the positive power supply (+V _DD ) and ground, and transistors 5 and 2 and transistor 6 and resistor 7 also form a series circuit between the positive power supply and ground, respectively. The connection point between the transistor 6 and the resistor 7 is the output point 9 of the reference voltage source.

Before going into the explanation of the operation of FIG. 1, the properties of V _TH will be explained. Assuming normal V _TH and V _TH1 , it is expressed by the following equation.

V _TH1 = φMS−Q _SS /C ₀ +2φf−Q _B /C ₀ ...(1) In equation (1), φMS is the work function between the gate electrode and the silicon substrate, and Q _SS is the silicon per unit area. The interfacial charge between the substrate and the oxide film, C ₀ is the gate capacitance per unit area, φf is the Fermi potential, and Q _B is the depletion layer charge per unit area.

Equation (1) contains many terms that depend on process and temperature. Ion implantation is normally used to create two types of V _TH , but when ion implantation is added, V _TH changes as follows.

V _TH2 ≒φMS−Q _SS /C ₀ +2φf−Q _B /C ₀ −Q _i /C ₀ ……(
2) In equation (2), Q _i is the implanted charge weight per unit area. Like equation (1), equation (2) also includes terms that depend on process and temperature, but by subtracting equation (2) from equation (1), the following equation is obtained.

V _TH1 −V _TH2 ≒Q _i /C ₀ ...(3) Equation (3) shows that the difference in V _TH is determined by the ion implantation charge amount Q _i , but this voltage value is
It relies on controllable, reproducible process steps and is temperature independent.

The present invention has been made by taking advantage of this point, and the operation will be explained by returning to FIG. 1 again.

In Figure 1, transistors 1 and 2 are shown for simplicity.
It is assumed that the channel conductivities K (=μC ₀ W/L) of the transistors 4 and 5 are the same, and the channel conductivities K of the transistors 4 and 5 are also the same. Here, μ is the mobility, W is the channel width, and L is the channel length.

Now, since the transistors 4 and 5 constitute a so-called current mirror circuit, the current I ₁ flowing through the transistor 1 and the current I 2 flowing through the transistor ₂ are equal in the normal operating state. Therefore, I ₁
and I ₂ are expressed by the following equation.

I ₁ = K (V _GS1 - V _TH1 ) ² ... (4) I ₂ = K (V _GS2 - V _TH2 ) ² ... (5) Here, V _GS1 and V _GS2 are the values of transistors 1 and 2, respectively. Indicates gate-source voltage.

If I ₁ = I ₂ in (4) and (5), the following equation holds.

V _GS2 −V _GS1 =V _THN2 −V _THN1 ……(6) Assuming that V _THN1 is created by ion implantation,
The right side of equation (6) is equal to Q _i /C ₀ mentioned above, and the left side of equation (6) is equal to the voltage across resistor 3. Therefore, the following equation is obtained.

I ₁ ×R ₁ = Q _i /C ₀ ...(7) Next, if the ratio between the channel conductivity of transistor 6 and the channel conductivity of transistors 4 and 5 is K _R , then the current flowing through resistor 7 is I ₃ is obtained from I ₃ = K _R · I ₁ , and the output voltage V ₀ is expressed by the following equation (8).

V ₀ = I ₃ · R ₂ = K _R · I ₁ · R ₂ = K _R · R ₂ /R ₁ · Q _i /C ₀ ...(8) As mentioned before, the ion implantation charge amount Q _i can be controlled with high precision, and K _R
and R ₂ /R ₁ are not the absolute values of the channel conductivity and resistance, but have meaning as a ratio, so if you pay attention to the pattern design of the integrated circuit, the output voltage can be
This does not become a factor that deteriorates the accuracy of V ₀ and a highly accurate reference voltage source can be obtained. Also, regarding temperature characteristics, K _R and R ₂ /R ₁ are considered to have zero temperature coefficients,
Since Q _i /C ₀ also does not depend on temperature as described above, it becomes a reference voltage source with excellent temperature characteristics.

FIG. 2 is a circuit diagram showing another embodiment of the present invention,
(1) to (5) and (7) are the same resistors and transistors as in the case of FIG. 1, and (8) is an N-channel MOS transistor with a threshold voltage of V _THN2 . The operation of the circuit shown in FIG. 2 is almost the same as that in FIG. This is the point where the output voltage V ₀ becomes the reference voltage. The reference voltage source shown in Fig. 2 has high accuracy and low temperature dependence.
It is the same as that in the figure.

3 and 4 are circuit diagrams showing still other embodiments of the present invention, in which the gates of transistors 1 and 2 and transistors 4 and 5 are connected in the first
Although different from those shown in FIG. 2 and FIG. 2, the operation and characteristics are similar.

5 to 8 are circuit diagrams showing still other embodiments of the present invention, in which 11, 12, and 18 are respectively equal.
N-channel MOS transistor with a threshold voltage of V _THN ; 13 and 17 are monolithic resistors with resistance values R ₁ and R ₂ respectively; 14 is a P-channel MOS transistor with a threshold voltage of V _THP1 ;
5 and 16 are P-channel MOS transistors having a threshold voltage of V _THP2 (here, V _THP2 >V _THP1 ).
The operation of the circuits shown in FIGS. 5 to 8 is basically the same as the operation of the circuits shown in FIGS. 1 to 4. In FIGS. Two types of threshold voltages are realized by implantation, and a reference voltage source is created from the difference between these threshold voltages.

In the above description, the resistor is a monolithic resistor, but it goes without saying that it may be replaced with other active elements that function as a resistor.

[Brief explanation of the drawing]

1 to 8 are circuit diagrams each showing an embodiment of a monolithic reference voltage source according to the present invention. In the figure, 1, 2, 8, 11, 12, 18 are N-channel MOS transistors, 3, 7, 13,
17 is a monolithic resistor, 4, 5, 6, 14, 1
5 and 16 are P-channel MOS transistors.
Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A first MOS transistor of a first conductivity type;
a second MOS transistor of a second conductivity type;
a first series circuit consisting of a resistive element;
a third MOS transistor of the first conductivity type whose threshold voltage is substantially the same as that of the MOS transistor; and a second MOS transistor whose absolute value is greater than the absolute value of the threshold voltage of the second MOS transistor. A second series circuit consisting of a fourth conductivity type MOS transistor and a third series circuit consisting of a fifth MOS transistor and a second resistance element are connected between the first potential point and the second potential point. The gates of the first and third MOS transistors are connected in parallel to the connection point of two MOS transistors constituting one of the first and second series circuits, and , each gate of the second and fourth MOS transistors is connected to the gate of the first MOS transistor.
and the second series circuit, and the gate of the fifth MOS transistor is connected to the gate of the first and third MOS transistors or commonly connected to the gates of the second and fourth MOS transistors, and making the conductivity type of the fifth MOS transistor the same as that of the MOS transistors of the first and second series circuits to which the gates are connected;
Further, a monolithic reference voltage source characterized in that a reference voltage output terminal is provided at a connection point between the fifth MOS transistor and the second resistance element. 2 The threshold voltage of the fifth MOS transistor is
MOS of the second series circuit whose gate is connected
A monolithic reference voltage source according to claim 1, characterized in that the voltage is the same as the threshold voltage of the transistor.